48results about How to "Improve electrostatic discharge ability" patented technology

The invention discloses a dynamic sensing electrostatic protection circuit comprising a dynamic sensing circuit connected between the static end and the earth terminal in parallel, a middle buffer circuit and a static leaking circuit; the middle buffer circuit is used for buffering the dynamic sensing circuit and the static leaking circuit, and performances voltage division and driving; the input end of the middle buffer circuit is connected with the dynamic sensing circuit electrically, the output end is connected with the input end of the static leaking circuit; the middle buffer circuit consists of a PMOS tube and a resistor connected in series, or consists of a NMOS tube and a resistor connected in series. The invention can further reduce the influence of the parasitic grid capacitance to the capacitance selection in the dynamic sensing circuit, and improve the static leaking performance of the dynamic sensing static leaking circuit structure.

The invention relates to a display panel and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a first substrate and a second substrate; arranging a liquid crystal layer and a frame sealing glue layer on the first substrate, wherein the frame sealing glue layer comprises a first frame sealing part and a second frame sealing part, the first frame sealing part surrounds the liquid crystal layer, and the second frame sealing part is located on a cutting path of the second substrate; assembling the first substrate with the second substrate; after the frame sealing glue layer is cured, cutting the second substrate along the cutting path, wherein the second frame sealing part is not cut, and the second frame sealing part comprises a first part exposed outside the second substrate after the cutting; and dropwise adding conducting glue to the cutting edge of the cut second substrate, so as to electrically connect at least one conducting pad on the second substrate to a conducting unit on the first substrate through the cutting edge and the first part of the second frame sealing part. By virtue of the first part of the second frame sealing part, the connecting strength of the conducting glue is increased; and furthermore, the second frame sealing part and the first second frame sealing part are produced in the same manufacture procedure, so that the additional manufacture procedure is omitted.

The invention provides an electrostatic protection device comprising a substrate, a deep N trap is arranged in the substrate, a first N trap, a first P trap and a second N trap are sequentially arranged in the deep N trap from left to right, a first N+ injection region, a first P+ injection region and a second N+ injection region are arranged in the first N trap, the second N+ injection region isbridged between the first N trap and the first P trap, a third N+ injection region, a second P+ injection region and a fourth N+ injection region are arranged in the first P trap, a fifth N+ injectionregion, a third P+ injection region and a sixth N+ injection region are arranged in the second N trap, the fifth N+ injection region is bridged between the first P trap and the second N trap, the first N trap, the first P trap, and the second N trap form a first NPN structure, the second N+ injection region, the first P trap and the third N+ injection region form a second NPN structure. Accordingto the electrostatic protection device, the voltage can be maintained, the trigger voltage can be reduced, and the electrostatic discharge capacity can be enhanced.

The invention discloses a power-to-ground ESD protection unit and a double-power broadband linear voltage stabilizer protection structure. The characteristics of a bipolar transistor BE junction, RC delay and Darlington NPN transistor are utilized to construct a power-to-ground electrostatic protection unit, and the characteristics of the electrostatic protection unit and bipolar transistor BE areutilized to construct a double-power broadband bipolar linear voltage stabilizer full-chip electrostatic protection network. In the normal state of a chip, it is ensured that IO ports are isolated from one another, a full-chip electrostatic leakage access is constructed to the maximum extent, the full-chip antistatic capacity of a double-power bipolar linear voltage stabilizer is improved, and the antistatic protection network can be popularized to other double poles and analog circuits of a BCD technology.

The invention provides an LDMOS static protection device. The LDMOS static protection device comprises a substrate, wherein a deep N trap is arranged on the substrate; the deep N trap is internally provided with a first P trap and a first N trap, the first P trap is internally provided with a first N+ injection area, a second N+ injection area and a first P+ injection area, and the first N trap isinternally provided with a third N+ injection area, a second P+ injection area and a third P+ injection area; the second N+ injection area, the first P trap and the first N trap form a first NPN structure, the first P trap, the first N trap and the third P+ injection area form a first PNP structure, and the first NPN structure and the first PNP structure form a first SCR path; the first N+ injection area, the first P trap and the second N+ injection area form a second NPN structure, the third P+ injection area, the first N trap and the second P+ injection area form a second PNP structure, andthe second NPN structure and the second PNP structure form a second SCR path. According to the LDMOS static protection device, one SCR path is added, so that the electrostatic discharge capacity is improved.

The invention discloses a display panel and a cutting panel, and relates to the technical field of display. The display panel comprises a non-display area, the non-display area comprises at least one crack detection circuit, the crack detection circuit comprises a crack detection signal line, a crack detection unit and at least one built-in electrostatic protection element, and the built-in electrostatic protection element is electrically connected with the crack detection signal line; the built-in electrostatic protection element comprises an electrostatic protection capacitor module; the crack detection unit is arranged in a first sub-non-display area, and at least part of the electrostatic protection capacitor module is arranged in a second sub-non-display area and/or a third sub-non-display area. The first sub non-display area and the second sub non-display area are oppositely arranged. According to the invention, the plurality of electrostatic protection capacitor modules are arranged outside the first sub-non-display area, so that a component for releasing static electricity is prevented from being arranged in the first sub-non-display area with a smaller space, and the crack detection signal line is electrically connected with more electrostatic protection capacitor modules, thereby being beneficial to improving the electrostatic discharge capacity of the crack detection signal line.

The embodiment of the invention provides an electrostatic discharge clamping circuit and a multi-point synchronous electrostatic discharge method. The circuit provided by the embodiment of the invention is connected between a power supply and the ground, the power supply is provided with at least two connecting ends, and the circuit comprises a voltage sampling module which is configured to receive a power supply voltage at a first connecting end of the at least two connecting ends and is used for providing a first control voltage for a first node; the driving module drives the discharging module to work; the first discharging module is used for releasing electrostatic charges of the first connecting end to the ground; and the second discharging module is used for releasing electrostatic charges of at least one part of the at least two connecting ends except the first connecting end to the ground, so that the requirement of synchronously releasing static electricity at different positions through one electrostatic discharge clamping circuit in a super-large-scale chip is met, and the reliability of the super-large-scale chip is improved. And the reliability of the electrostatic discharge clamping circuit and the ESD protection capability of the chip are improved.

The invention discloses an ESD protection circuit structure of a silicon-gate MOS integrated circuit. The ESD protection circuit structure comprises an NMOS (N-channel metal oxide semiconductor) transistor, an internal circuit, a port and an N-type active region injection resistor, and is characterized in that the NMOS transistor is connected with the internal circuit and the port, the NMOS transistor is provided with the N-type active region injection resistor, the N-type active region injection resistor is connected with the internal circuit and the port, and the internal circuit is connected with the port. The NMOS transistor is provided with the N-type active region injection resistor, thereby not only reducing the area of the integrated circuit layout, but also ensuring that most static electricity is firstly discharged through the NMOS transistor and then connected to the internal circuit through the N-type active region injection resistor, being good in electrostatic discharge effect, facilitating circuit protection and being low in cost.

The embodiment of the application discloses an electrostatic protection device, a radio frequency circuit, and an electronic device. The electrostatic protection device comprises a front-end interface, an electrostatic protection circuit and a rear-end circuit. The electrostatic protection circuit is arranged between the front-end interface and the rear-end circuit; and one end of the electrostatic protection circuit is connected with the front-end interface and the other end is connected with the rear-end circuit. The electrostatic protection circuit formed by at least one resistor is used for discharging electrostatic currents transmitted by the front-end interface. Therefore, electrostatic protection on an electronic device is realized.