BCD (binary-coded decimal) decimal counter based on reversible logic

A decimal number and counter technology, applied in the field of low-power combinational logic circuit design, can solve problems such as reading difficulties and energy loss

Inactive Publication Date: 2013-02-06
NANTONG UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The binary counter has the characteristics of simple circuit structure and convenient operation, etc., but most of the contacts in daily life are decimal numbers, especially when the binary number has a large number of digits, it is very diffic

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  • BCD (binary-coded decimal) decimal counter based on reversible logic
  • BCD (binary-coded decimal) decimal counter based on reversible logic
  • BCD (binary-coded decimal) decimal counter based on reversible logic

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Embodiment Construction

[0026] In order to deepen the understanding of the present invention, the present invention will be further described below in conjunction with the embodiments and accompanying drawings. The embodiments are only used to explain the present invention and do not constitute a limitation to the protection scope of the present invention.

[0027] All modules used in the present invention follow the principle that the left end is the input and the right end is the output.

[0028] The present invention is realized through the following technical solutions:

[0029] 1. Select the basic reversible door

[0030] NOT gate (not gate): It is mainly used to realize the inversion of the signal, and its function diagram is as follows figure 1 shown.

[0031] Feynman gate (FG): Function diagram as figure 2 shown. The gate can realize the duplication and inversion of the signal. When the second input signal is set to 0, that is, B=0, the signal copy function can be realized. The replica...

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Abstract

The invention discloses a BCD (binary-coded decimal) decimal counter based on reversible logic. According to the BCD decimal counter based on reversible logic, one FRG (Fredkin gate) gate and one FG (Feynman gate) gate are firstly cascaded to form a reversible D trigger; one JK trigger is constituted by one FRG gate, one NOT and the reversible D trigger; four reversible JK triggers, one F5 gate, two TOF (Toffoli gate) gates, two FG gates and an NG (new gate) gate are finally cascaded to form a reversible BCD synchronous decimal counter; and four reversible JK triggers, two F3 gates, two FG gates and one TOF gate are connected to form a reversible BCD asynchronous decimal counter. The BCD decimal counter based on reversible logic has the advantage that the system energy consumption is reduced.

Description

technical field [0001] The invention relates to the design of low-power combination logic circuits in the field of information technology, in particular to a low-power BCD code decimal counter. Background technique [0002] Counters are one of the most commonly used sequential circuits, not only for counting pulses, but also for frequency division, timing, generation of beat pulses, and other sequential signals. The binary counter has the characteristics of simple circuit structure and convenient operation, but most of the decimal numbers in daily life are decimal numbers, especially when the binary number has a large number of digits, it is very difficult to read, so it is necessary to design a decimal counter. But the traditional decimal counter is irreversible, there is a loss of information bits, and it consumes a lot of energy. [0003] Landauer has confirmed that circuits constructed from traditional irreversible logic gates such as AND gates and XOR gates will inevit...

Claims

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Application Information

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IPC IPC(8): H03K23/72
Inventor 管致锦张海豹鹿玉程学云何金凤鲁灿钢王伟孟春晨马敬超
Owner NANTONG UNIVERSITY
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