Method and device for verifying logic circuit design, electronic equipment and storage medium

A technology of logic circuits and verification methods, applied in computing, electrical digital data processing, special data processing applications, etc., can solve problems such as difficult debugging, complex algorithm models, low operating efficiency, etc., achieve good scalability, improve verification efficiency, The effect of avoiding coding work

Active Publication Date: 2017-10-13
SHENZHEN INTELLIFUSION TECHNOLOGIES CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This technology allows for generating configurations (configuration) and inducing an artificially intelligible response called stimulation). These modifications help verify or troubleshoot problems more efficiently during testing processes. By controlling both the tester's hardware components and software algorithms, this system ensures consistently accurate results even when there may have different inputs/output characteristics between them due to differences in manufacturing process quality control standards used across various devices made up of multiple layers of materials.

Problems solved by technology

This patented describes how complicated mathematical calculations involving certain types of data may require long periods for accurate results due to their complexity. However, it becomes increasingly challenging when trying to maintain accuracy over longer time intervals because these computations involve multiple layers or matrices. Current methods have limitations like requiring simulation environments instead of real hardware devices, making them less efficient at performing simulations compared to actual physical systems. Therefore there needs improvement in testing techniques to improve performance without compromising reliability.

Method used

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  • Method and device for verifying logic circuit design, electronic equipment and storage medium
  • Method and device for verifying logic circuit design, electronic equipment and storage medium
  • Method and device for verifying logic circuit design, electronic equipment and storage medium

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Embodiment Construction

[0045]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0046] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0047] Such as figure 1 as shown, figure 1 It is a system architecture diagram of a preferred embodiment of the verification method for realizing logic circuit design of the present invention. In this preferred e...

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Abstract

The invention provides a method for verifying a logic circuit design. The method comprises the following steps: generating configuration data and stimulation data through a verifying platform; storing the configuration data and the stimulation data into a target memory; transmitting the configuration data and the stimulation data to an object to be verified through the verifying platform; controlling a reference object to read the configuration data and the stimulation data from the target memory through the verifying platform so that the reference object begins to carry out simulation calculation, wherein the object to be verified is a logic circuit code which implements an algorithm by using a first language, and the reference object is a code for implementing the same algorithm by using a second language; controlling the reference object to finish simulation calculation through the verifying platform; acquiring output data of the reference object by the verifying platform; acquiring output data of the object to be verified through the verifying platform; and determining a verified result of the object to be verified according to the output data of the reference object and the object to be verified. The invention further provides a device for verifying the logic circuit design. The purpose of accurately verifying the object to be verified is achieved.

Description

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Claims

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Application Information

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Owner SHENZHEN INTELLIFUSION TECHNOLOGIES CO LTD
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