Electronic device, three-dimensional memory and manufacturing method thereof
A manufacturing method and memory technology, which is applied in the direction of electric solid-state devices, circuits, electrical components, etc., can solve the problems of influence, substrate surface concentration reduction, etc.
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[0046] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the implementation manners in the present invention, all other implementation manners obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of the present invention.
[0047] Please refer to figure 1, when making a three-dimensional memory, in the current manufacturing process, when making a stepped structure of a memory array, a bottom insulating layer, a bottom select gate layer (Bottom Select Gate, BSG), a BSG insulating layer, and a stacked layer are first sequentially formed on the substrate 10 . The stacked layers may include first dielectric layers (eg, silicon oxide) 11 and secon...
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