A load current calculation device for SIMO DC converter

Abstract

The invention discloses a load current calculation device for a SIMO DC converter. The system includes a current sensor, an averaging circuit and an output current integrator. The current sensor mirrors the transient current of a pull-up switch tube S_HS and outputs a sensing voltage Vsen, which is proportional to the inductor current IL during the S_HS conduction time; the averaging circuit first samples the peak value and the valley value of Vsen respectively, and then adds the two to obtain an average sensing voltage Vsen_avg, which is proportional to the average inductor current; the output current integrator multiplies Vsen_avg with each output tube control signal PWM<1:n> respectively to calculate the equivalent voltage VC<1:n> of each load current, and VC<1:n> is proportional to each load current Iload1‑n. Different from the traditional multi-channel output current sensing technology (each channel is connected in series with a sensing resistor or each channel uses a current mirror detection circuit), the device of the present invention can use the pull-up tube current (required for current mode converter) and the output power tube control signal to directly calculate the output load current of each channel. It has a simple structure and reduces the chip area without affecting the efficiency of the converter.

Description

Technical Field

[0001] The invention relates to a switching power supply output current calculation system, in particular to a load current calculation device for a SIMO direct current converter. Background Art

[0002] In a closed-loop control system of a multi-channel output SIMO circuit, the current of each output power tube needs to be monitored in real time to protect the load and the system. However, the technology for simultaneously collecting the current of multiple output channels is not mature at present.

[0003] There are two main methods for multi-channel output current sampling circuits: Method 1 (such as Figure 3 As shown in the figure: For each output Iload1 - Iloadn, a sensing resistor R_sen1 - R_senn is connected in series. When Iloadn flows through R_senn, a certain voltage drop will be generated. This voltage drop can be amplified by the operational amplifier to obtain the sensing voltage Vsenn. This method is more accurate and can sense the load current of each channel in real time. However, the series resistor will consume energy and seriously affect the efficiency of the converter under heavy load conditions. Method 2 (as shown in the figure) Figure 4 As shown in Figure 1): The current of the output power tube is copied in a certain proportion through the current mirror and fed into the sensing resistor. The drain voltage of the mirror tube is clamped by the op amp to make it close to the drain voltage of the output power tube to increase the accuracy of current sensing. This method does not affect the efficiency of the converter, but is limited by the bandwidth and gain of the op amp, and the speed and accuracy of the sensor will be affected. In addition, the structure is complex, the chip area is large, and the design cost is high.

[0004] Therefore, it is necessary to design a load current calculation device with a simple structure, fast sensing speed and no influence on the converter efficiency. Summary of the invention

[0005] The object of the present invention is to provide a load current calculation device for a SIMO DC converter to solve the problems of high material cost, great design difficulty and influence on converter efficiency in the conventional technology mentioned in the above background technology.

[0006] To achieve the above object, the present invention provides the following technical solution: a load current calculation device for a SIMO DC converter ( Figure 1), including: a current sensor, which samples the pull-up power tube current and generates a sensing voltage Vsen after being mirrored by a current mirror, and Vsen is proportional to the inductor current in the pull-up period; an averaging circuit, which obtains the average value Vsen_avg of Vsen by sampling and adding the peak value and valley value of Vsen, and Vsen_avg is proportional to the average value of the inductor current; an output current integrator, which converts Vsen_avg into an equivalent current, and integrates Vsen_avg based on PWM<1:n>, and outputs VC<1:n>, which is the equivalent voltage of each load current.

[0007] Preferably, the working principle of the load current calculation device proposed by the present invention is as follows: Figure 2 As shown in the figure, when the SIMO DC control loop enters the steady state and the inductor current ripple is small, the inductor current IL can be regarded as its DC average IL_avg; in the steady state, because the inductor current IL passes through the output power tubes S_OUT1, S_OUT2, and S_OUT3 respectively when the switching signal PWM<1:3>, each load current is exactly the product of the duty cycle of the switching signal and the inductor current average IL_avg; based on this observation, the current sampler can be used to obtain the sensing voltage Vsen that is proportional to IL, and its average value Vsen_avg can be calculated; by multiplying Vsen_avg with the duty cycle of each switching signal, VC<1:3> can be obtained, and its value is equivalent to each output load.

[0008] Preferably, Figure 5 As shown, the current sensor includes: amplifier AMP1, pull-up power tube S_HS, pull-up mirror tube S_HS_mir, n-type transistor Mn1, p-type transistors Mp1, Mp2 and sense resistor Rs. Amplifiers AMP1 and Mn1 form a clamping circuit to make Vin_clp equal to Vin. Because the source, drain and gate voltages of S_HS and S_HS_mir are the same, and the size ratio of S_HS_mir to S_HS is 1:m, the current in S_HS_mir is 1 / m of the current in S_HS. During the conduction period of the pull-up tube, the current passing through S_HS is the same as the inductor current IL, so the current of S_HS_mir is IL×(1 / m). This current is mirrored through the current mirror Mp1-Mp2 and injected into the output sense voltage Vsen on Rs, and its formula is:

[0009] (1)

[0010] Preferably, Figure 6As shown, the averaging circuit includes: switches S1 - S8, sampling capacitors C1 - C4 (with the same capacitance), the input signal is the induced voltage Vsen, and the output voltage is the induced voltage average value Vsen_avg; Ф_sv1 and Ф_sv2 are valley sampling signals, Ф_sp1 and Ф_sp2 are peak sampling signals. peak) signal, Ф_avg1 and Ф_avg2 are averaging control signals; when Ф_sv1 or Ф_sv2 is high, the valley value of Vsen is sampled by S1 and S7, and its level (Vsen_vly1, Vsen_vly2) is stored in C1 and C3 respectively; when Ф_sp1 or Ф_sp2 is high, the peak value of Vsen is sampled by S2 and S8, and its level (Vsen_pk1, Vsen_pk2) is stored in C2 and C4 respectively; when Ф_avg1 is high, Vsen_vly1 and Vsen_pk1 are added and averaged to output Vsen_avg; when Ф_avg2 is high, Vsen_vly2 and Vsen_pk2 are added and averaged to output Vsen_avg; Ф_avg1 and Ф_avg2 are alternately high to continuously output Vsen_avg.

[0011] Preferably, Figure 7 As shown, the output current integrator includes: amplifier AMP2, n-type transistor Mn2, resistor R0, current mirror tube Mpa0 - Mpan, charging switch S_chg1-n, reset switch S_rst1-n, sampling switch S_sp1-n, sampling capacitor C_sp1-n, and holding capacitor C_hold1-n; the charging switch S_chg1-n is controlled by the output power tube switch signal PWM<1:n> respectively, the reset switch is uniformly controlled by the reset signal Ф_rst, and the sampling signal S_sp1-n is uniformly controlled by the sampling signal Ф_sp. Amplifier AMP2, R0, and Mn2 form a voltage-current conversion circuit. AMP2 clamps the VR point voltage at Vsen_avg, so the current in Mn2 is Vsen_avg / R0; this current is mirrored to each path in Mpa1 - Mpan, and the equivalent voltage VC<1:n> of each load current is obtained by performing integration operation through the capacitor. Assuming that the duty cycle of the nth output power tube is D(n), the capacitance of C_spn is C0 and is much larger than C_holdn, then VC <n>The expression is:

[0012] (2)

[0013] Where T is the duty cycle of the SIMO DC converter;

[0014] Substituting formula (1) into formula (2), we can obtain the equivalent voltage VC of the nth load: <n>Relationship with the average value of the inductor current IL_avg:

[0015] (3)

[0016] Among them, Rs, R0, m, T, C0 are all fixed values, VC <n>It is proportional to IL_avg and its ratio is the duty cycle of the switching signal of the nth output power tube.

[0017] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention does not need to use a series sensing resistor, so it will not affect the converter efficiency; and the present invention only needs to use a current sensor acting on the pull-up tube (a necessary module for the current mode converter), and does not need to additionally design a current sensor for each output power tube, and can calculate the equivalent load of each output, greatly reducing the design cost and chip area. The present invention can be widely used in SIMO systems, and the output load can be protected by monitoring the load current, thereby extending the service life of the SIMO system. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the structure of the load current calculation device proposed by the present invention.

[0019] Figure 2 This is a principle waveform diagram of the load current calculation device (three-way output example) proposed by the present invention.

[0020] Figure 3 It is a schematic diagram of the structure of a traditional current sampling system based on multi-channel series resistance technology.

[0021] Figure 4 It is a structural diagram of a traditional current sampling system based on multi-channel output tube mirror technology.

[0022] Figure 5 This is a schematic diagram of the structure of the current sensor in the load current calculation device proposed by the present invention.

[0023] Figure 6 This is a schematic diagram of the circuit structure for calculating the average value in the load current calculation device proposed by the present invention.

[0024] Figure 7 This is a schematic diagram of the structure of the output current integrator in the load current calculation device proposed by the present invention. DETAILED DESCRIPTION

[0025] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0026] The following will be combined with the drawings in the embodiments of the present invention. The technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments in the present invention, all other embodiments obtained by the skilled person in the art without creative work are within the scope of protection of the present invention.

[0027] The present invention proposes a load current calculation device for a SIMO DC converter, and the present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and a detailed implementation method and a specific operation process are given, but the protection scope of the present invention is not limited to the following embodiments.

[0028] like Figure 1 As shown, the load current calculation device proposed by the present invention includes a current sensor, an averaging circuit and an output current integrator. The current sensor mirrors the current of the pull-up power tube S_HS and outputs a sensing voltage Vsen; the input terminal of the averaging circuit is connected to Vsen and outputs an average sensing voltage Vsen_avg; the input terminal of the output current integrator is connected to Vsen_avg, the control terminal is connected to the output tube control signal PWM<1:n>, and the equivalent voltage VC<1:n> of each load current is output.

[0029] The working principle of the load current calculation device proposed by the present invention is as follows: Figure 2 As shown in the figure, when the SIMO DC control loop enters the steady state and the inductor current ripple is small, the inductor current IL can be regarded as its DC average IL_avg; in the steady state, because the inductor current IL passes through the output power tubes S_OUT1, S_OUT2, and S_OUT3 respectively when the switching signal PWM<1:3>, each load current is exactly the product of the duty cycle of the switching signal and the inductor current average IL_avg; based on this observation, the current sampler can be used to obtain the sensing voltage Vsen that is proportional to IL, and its average value Vsen_avg can be calculated; by multiplying Vsen_avg with the duty cycle of each switching signal, VC<1:3> can be obtained, and its value is equivalent to each output load.

[0030] The current sensor structure is as follows Figure 5 As shown, it includes: amplifier AMP1, pull-up power tube S_HS, pull-up mirror tube S_HS_mir, n-type transistor Mn1, p-type transistors Mp1, Mp2 and induction resistor Rs. Amplifier AMP1 and transistor Mn1 form a clamping circuit, Vin is connected to the positive input of AMP1, Vin_clip is connected to the negative input of AMP1, and the amplifier output is connected to the gate of Mn1. This loop clamps the Vin_clp voltage around Vin. Its working principle is: when Vin rises, the output voltage of AMP1 rises, and the current through Mn1 will also rise, so it will pull up Vin_clp, and finally Vin_clp will be close to Vin, and the degree of closeness depends on the gain of AMP1. Preferably, because the size ratio of S_HS_mir and S_HS transistors is 1:m, and S_HS_mir and S_HS share the source voltage Vsw and the gate control signal PWM_HS, when PWM_HS is at a high potential, the inductor current IL flows into S_HS, and (1 / m)×IL flows into S_HS_mir. This current is mirrored into Mp2 through the current mirror Mp1 - Mp2, and flows into the sensing resistor Rs to output the sensing voltage Vsen, and its expression is shown in formula (1).

[0031] The circuit structure for averaging is as follows: Figure 6 As shown, it includes: switches S1 - S8, sampling capacitors C1 - C4 (with the same capacitance), the input signal is the induced voltage Vsen, the output voltage is the induced voltage average Vsen_avg, Ф_sv1 and Ф_sv2 are valley sampling signals, Ф_sp1 and Ф_sp2 are peak sampling signals, and Ф_avg1 and Ф_avg2 are average control signals. Ф_avg1 and Ф_avg2 are opposite in phase and are alternately high. When the system is in an odd cycle, Ф_avg1 is low and Ф_avg2 is high. At this time, S1 is briefly turned on when Ф_sv1 is high, samples the valley value of Vsen and stores it in C1 as Vsen_vly1, and S2 is briefly turned on when Ф_sp1 is high, samples the peak value of Vsen and stores it in C2 as Vsen_pk1. At this time, S5 and S6 are turned on for a long time when Ф_avg2 is high, and the Vsen_vly2 and Vsen_pk2 sampled in the previous cycle are added to obtain an average, and the potential of the output Vsen_avg is maintained. When the system is in an even cycle, Ф_avg1 is high and Ф_avg2 is low. At this time, S7 is turned on briefly when Ф_sv2 is high, and the valley value of Vsen is sampled and stored in C3 as Vsen_vly2. S8 is turned on briefly when Ф_sp2 is high, and the peak value of Vsen is sampled and stored in C4 as Vsen_pk2. At this time, S3 and S4 are turned on for a long time when Ф_avg1 is high, and the Vsen_vly1 and Vsen_pk1 sampled in the previous cycle are added to obtain an average, and the potential of the output Vsen_avg is maintained.

[0032] The output current integrator structure is as follows: Figure 7 As shown, it includes: an amplifier AMP2, an n-type transistor Mn2, a resistor R0, a current mirror tube Mpa0 - Mpan, a charging switch S_chg1-n, a reset switch S_rst1-n, a sampling switch S_sp1-n, a sampling capacitor C_sp1-n, and a holding capacitor C_hold1-n. The charging switches S_chg1-n are respectively controlled by the output power tube switch signal PWM<1:n>, the reset switches S_rst1-n are uniformly controlled by the reset signal Ф_rst, and the sampling signals S_sp1-n are uniformly controlled by the sampling signal Ф_sp. Amplifiers AMP2, R0, and Mn2 form a voltage-current conversion circuit. AMP2 clamps the VR point voltage at Vsen_avg, so the current in Mn2 is Vsen_avg / R0, and this current flows through Mpa0 and is mirrored to each path in Mpa1 - Mpan. Preferably, in the nth path integrator, when the output power tube switch signal PWM <n>When it is high, S_chgn is turned on, and the current charges C_spn through Mpan. After charging, C_spn maintains the integrated voltage and stores it as V_spn. When V_sp1-n have completed sampling, Ф_sp will be high and turn on S_sp1-n, transfer V_sp1-n to C_hold1-n respectively, and output VC<1:n>, VC <n>The expression of is shown in formula (3), which is the average inductor current IL_avg and PWM <n>After S_sp1-n is turned off, Ф_rst will be high and then turn on S_rst1-n, set V_sp1-n to zero and wait for the next cycle integration.

[0033] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention does not need to use a series sensing resistor, so it will not affect the converter efficiency; and the present invention only needs to use a current sensor acting on the pull-up tube (a necessary module for the current mode converter), and does not need to additionally design a current sensor for each output power tube, and can calculate the equivalent load of each output, greatly reducing the design cost and chip area. The present invention can be widely used in SIMO systems, and the output load can be protected by monitoring the load current, thereby extending the service life of the SIMO system.

[0034] The contents not described in detail in the specification of the present invention belong to the common knowledge of those skilled in the art.

[0035] It should be understood that the above embodiments are merely illustrative of the present invention rather than limiting the present invention, and any inventions that do not exceed the essential spirit of the present invention shall fall within the protection scope of the present invention.< / n> < / n> < / n> < / n> < / n> < / n>

Claims

1. A load current calculation device for a SIMO DC converter, characterized in that: It includes a current sensor, an averaging circuit and an output current integrator; the current sensor mirrors and pulls up the power tube current, and outputs a sensing voltage Vsen; the averaging circuit input terminal is connected to Vsen, and outputs an average sensing voltage Vsen_avg; the output current integrator input terminal is connected to Vsen_avg, the control terminal is connected to the output tube control signal PWM<1:n>, and outputs the equivalent voltage VC<1:n> of each load current; The current sensor comprises: a pull-up power tube S_HS, whose drain is connected to the input power supply voltage point Vin, whose source is connected to the switch power supply switching point Vsw, and whose gate is connected to the control signal PWM_HS; a pull-up mirror tube S_HS_mir, whose size is in a 1:m ratio with S_HS, and whose drain, source and gate are connected in the same way as S_HS; an amplifier AMP1, whose positive input terminal is connected to Vin, whose negative input terminal is connected to the clamping signal Vin_clp of Vin, and whose output is connected to the gate of the buffer tube Mn1; the buffer tube Mn1, whose source is connected to Vin_clp, and whose drain is connected to Vpg; the common gate voltage of the current mirror tubes Mp1 and Mp2 is Vpg, the sources of Mp1 and Mp2 are both connected to the bootstrap voltage Vboot, Mp1 forms a diode connection mode, its drain is connected to Vpg, and the drain of Mp2 is connected to the output sensing voltage Vsen; the terminal 1 of the sensing resistor Rs is connected to the Vsen point, and its terminal 2 is grounded; The averaging circuit comprises: switches S1-S8 and sampling capacitors C1-C4, the input signal is the induced voltage Vsen, and the output voltage is the induced voltage average value Vsen_avg; wherein the negative electrode of C1 is grounded, and the positive electrode is connected to the Vsen_vly1 point; terminal 1 of switch S1 is connected to Vsen_vly1, terminal 2 is connected to Vsen, and the control terminal is connected to the valley sampling (samplevalley) signal Φ_sv1; terminal 1 of switch S2 is connected to Vsen, terminal 2 is connected to Vsen_pk1, and the control terminal is connected to the peak sampling (samplepeak) signal Φ_sp1; the positive electrode of sampling capacitor C2 is connected to Vsen_pk1, and the negative electrode is grounded; terminal 1 of switch S3 is connected to Vsen_vly1, terminal 2 is connected to Vsen_avg, and the control terminal is connected to the average (average) signal Φ_avg1; terminal 1 of switch S4 is connected to Vsen_vly1, terminal 2 is connected to Vsen_avg, and the control terminal is connected to the average (average) signal Φ_avg1; terminal 1 of switch S4 is connected to Vsen, terminal 2 is connected to Vsen_pk1, and the control terminal is connected to the peak sampling (samplepeak) signal Φ_sp1; Connected to Vsen_avg, terminal 2 connected to Vsen_pk1, and the control terminal is also connected to Ф_avg1; C3 positive electrode connected to Vsen_vly2, and negative electrode grounded; switch S5 terminal 1 connected to Vsen_vly2, terminal 2 connected to Vsen_avg, and the control terminal connected to the average signal Ф_avg2; switch S6 terminal 1 connected to Vsen_avg, terminal 2 connected to Vsen_pk2, and the control terminal is also connected to Ф_avg2; C4 positive electrode connected to Vsen_pk2, and negative electrode grounded; switch S7 terminal 1 connected to Vsen_vly2, terminal 2 connected to Vsen, and the control terminal connected to the valley sampling (samplevalley) signal Ф_sv2; switch S8 terminal 1 connected to Vsen, terminal 2 connected to Vsen_pk2, and the control terminal connected to the peak sampling (samplepeak) signal Ф_sv2; The output current integrator comprises: an amplifier AMP2, whose positive input terminal is connected to Vsen_avg, whose negative input terminal is connected to VR, and whose output terminal is connected to the gate of an n-type transistor Mn2; a resistor R0, whose terminal 1 is connected to VR, and whose terminal 2 is grounded; a source of Mn2 is connected to VR, and whose drain is connected to a common gate voltage Vpag of a p-type current mirror tube Mpa0-n; the sources of the p-type current mirror tubes Mpa0-n are all connected to a power supply voltage; Mpa1, a charging switch S_chg1, a reset switch S_rst1, a sampling capacitor C_sp1, and the sampling switch S_sp1 and the charge holding capacitor C_hold1 form a current integrator for the first output; a charging switch S_chg1, whose terminal 1 is connected to the drain of Mpa1, whose terminal 2 is connected to the sampling voltage V_sp1 of the first path, and whose control terminal is connected to the output switch tube control signal PWM of the first path. <1> ; Reset switch S_rst1, its terminal 1 is connected to Vsp1, its terminal 2 is grounded, and its control terminal is connected to the common reset signal Ф_rst; sampling capacitor C_sp1 terminal 1 is connected to V_sp1, terminal 2 is grounded; sampling switch S_sp1, its terminal 1 is connected to V_sp1, and its terminal 2 is connected to the equivalent voltage VC of the load current of the first path <1> , whose control terminal is connected to the common sampling signal Ф_sp; the current integrator of the nth output includes Mpan, a charging switch S_chgn, a reset switch S_rstn, a sampling capacitor C_spn, a sampling switch S_spn and a voltage holding capacitor C_holdn, and its connection method is the same as that of the 1st output current integrator.

2. A load current calculation device for a SIMO DC converter according to claim 1, characterized in that: When the ripple of the inductor current IL is small, each load current Iload1-n is proportional to the average value IL_avg of the inductor current, and its proportionality coefficient is the duty cycle of each output power tube control signal PWM<1:n>.

3. A load current calculation device for a SIMO DC converter according to claim 1, characterized in that: The way it works includes the following steps: Step 1: Use a current sensor to mirror the current of the pull-up power tube S_HS and output a sensing voltage Vsen, which is proportional to the inductor current during the pull-up period; Step 2: Use an averaging circuit to sample the peak and valley values ​​of Vsen respectively, and perform an average calculation on them to obtain an average voltage Vsen_avg of Vsen; Step 3: Use the output current integrator to convert Vsen_avg into an equivalent current, and integrate Vsen_avg based on PWM<1:n> to output VC<1:n>, which is the equivalent voltage of each load current.

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