FFT calculation zero-filling control device and method based on data reading indication control

Abstract

The present invention discloses a FFT calculation zero-filling control device and method based on data reading indication control, the device comprises a storage space for receiving M data required for FFT calculation collected in real time by a real-time data collection module for storage, and further comprises: a data reading module for storing the M data required for FFT calculation according to the number of calculation points N supported by the FFT processor. x Generate the corresponding N x The original access address stream is mapped to N actual storage spaces. x The actual access address is generated according to the original access address stream and the number of acquisition points M of the real-time data acquisition module, and the zero-filling judgment signal corresponding to each access address is generated synchronously; the data reading control module is used to receive the data reading request, according to the N output of the data reading module x The actual access address and the corresponding zero-fill judgment signal control the output of N from the storage space x The invention has the advantages of simple implementation method, low complexity and cost, and high execution efficiency and accuracy.

Description

Technical Field

[0001] The present invention relates to the technical field of FFT (Fast Fourier Transform) processors, and in particular to a FFT calculation zero-filling control device and method based on data reading indication control. Background Art

[0002] A large number of FFT calculations need to be performed in the FFT processor. In order to complete the FFT calculation, multiple sets of data need to be collected in real time for calculation. The number of collected data input points that the FFT processor can support depends on the FFT algorithm used. For example, if the FFT uses a radix-N algorithm (N is usually 2 or 4), the hardware device can only support N x (x=1,2,...x max , The maximum number of points supported by the designed FFT) is the input of the data collection point. In practical applications, the number of data collection points M is usually equal to N. x is inconsistent, but satisfies the following relationship: N x-1 <M<N x , that is, the number of data points M collected at one time cannot reach the N required for FFT calculation x Point number requirement, so it is necessary to fill the number of collected data points with zeros to expand it to N x , thus meeting the FFT operation requirements.

[0003] In the prior art, the collected data in the FFT processor is usually written into a readable and writable RAM in sequence in the form of a data stream. After all the collected data are written, the FFT processor reads out the corresponding data in sequence for calculation. If a zero-filling operation is required during this process, a zero-filling module is usually added, and the zero-filling module controls the zero-filling at the end of the data stream.

[0004] As Figure 1 Taking the FFT processor shown in the figure as an example, a real-time data acquisition module, an FFT data storage RAM and a data reading module are usually provided in the FFT processor. The real-time data acquisition module is used to collect the data required for FFT calculation in real time and store it in the FFT data storage RAM. The data reading module accesses the data stored in the RAM by generating an access address to perform FFT calculation. In order to implement the zero-filling operation during the FFT calculation process, it is usually necessary to set a zero-filling device between the real-time data acquisition module and the FFT data storage RAM. When the real-time data acquisition module starts to store data in the FFT data storage RAM, the zero-filling device obtains the number of data currently stored at one time M, and then counts the points to determine whether the M value is N. x , if not N x Then you need to fill in zeros and calculate M and N x (N x-1 <M<Nx ) x -M is the number of zero padding; after the real-time data acquisition module stores M data in the FFT data storage RAM, the zero padding device continues to generate N zero padding at the end of the data stream of the real-time data acquisition module. x -M samples of all-zero data stream, and according to the storage address of the Mth data of the real-time data acquisition module, N x -M samples storage address, store the required zero-filled data into FFT data storage RAM, fill M data with zeros to N x data and store them in the FFT data storage RAM, that is, before the M data are stored in the storage space, they are padded with zeros and expanded to N x As can be seen from the above, in order to realize the zero-padding operation in the FFT calculation process, the traditional method needs to perform operations such as point number judgment, zero-padding judgment, zero-padding quantity calculation, and zero-padding address generation, which makes the FFT zero-padding process complex to implement, consumes a lot of resources, and has low efficiency. Summary of the invention

[0005] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides an FFT calculation zero-padding control device and method based on data reading indication control, which has a simple implementation method, low complexity and cost, and high execution efficiency and accuracy, and can simply and quickly complete the zero-padding operation of FFT calculation data from the perspective of data reading.

[0006] In order to solve the above technical problems, the technical solution proposed by the present invention is:

[0007] A FFT calculation zero-filling control device based on data reading indication control includes a storage space for receiving M data required for FFT calculation collected in real time by a real-time data collection module for storage, and also includes:

[0008] The data reading module is used to read the FFT calculation data stored in the storage space according to the number of calculation points N that the FFT processor can support. x Generate the corresponding N x original access address streams, mapping the original access address streams to N x The actual access addresses are output to the storage space, and the zero-filling judgment signal corresponding to each access address is synchronously generated according to the original access address stream and the number of collection points M of the real-time data collection module and output to the data reading control module, wherein the first judgment signal is configured for the M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal;

[0009] The data read control module is used to output N when the storage space receives a data read request. xWhen data is stored, the data in the storage space is directly output or a zero-filling operation is performed according to the zero-filling judgment signal. If it is the first judgment signal, the storage data in the storage space is directly output, and if it is the second judgment signal, the zero-filling operation is performed.

[0010] Furthermore, the data reading module includes:

[0011] The address generation unit is used to generate an address according to the number of calculation points N supported by the FFT processor. x , generating N x The original access address stream is mapped to the actual storage space N x The actual access address is outputted to the zero-filling judgment unit;

[0012] The zero-filling judgment unit is used to compare and judge the original access address stream with the number of acquisition points M of the real-time data acquisition module, and generate a zero-filling judgment signal corresponding to each access address.

[0013] Furthermore, the address generation unit includes:

[0014] The original address generation subunit is used to generate the address according to the number of calculation points N that the FFT processor can support. x Generate 0~(N x -1) is output to the access address generation subunit;

[0015] The access address generation subunit is used to generate 0~(N x -1) are mapped to actual access addresses of actual storage spaces respectively.

[0016] Furthermore, the zero-filling judgment unit is started synchronously with the access address generating subunit, so as to synchronously generate a zero-filling judgment signal corresponding to the address during the process of generating the actual access address.

[0017] Furthermore, the data reading module also includes a point number judgment unit connected to the original address generation subunit, which is used to judge the number of acquisition points M of the real-time data acquisition module and determine the number of calculation points N that the FFT processor can support. x , output to the original address generation subunit.

[0018] Furthermore, the data reading control module comprises a zero-filling signal judgment unit and a control selection unit connected to each other. When the storage space receives a data reading request, the data reading module (2) receives a zero-filling signal judgment unit and a control selection unit connected to each other. x N access addresses access the storage space x In the process of data, the zero-filling signal judgment unit judges N xIf the first judgment signal is determined, the control selection unit controls the direct output of the data in the storage space to read out the M data stored in the storage space normally; if the second judgment signal is determined, the control selection unit controls the zero-filling operation to read out the corresponding N data. x -The output data of M addresses are replaced by 0 output.

[0019] An FFT processor includes an FFT calculation module for reading N x The invention also includes the above-mentioned FFT calculation zero-filling control device connected to the FFT calculation module, so as to convert the M data required for the real-time collected FFT calculation into N data by zero-filling operation. x After the data are obtained, they are provided to the FFT calculation module.

[0020] A method for controlling zero padding in FFT calculation based on data reading indication control, comprising the steps of:

[0021] Step S1: The real-time data acquisition module collects M data required for FFT calculation in real time and stores them in the designated storage space;

[0022] Step S2: Start the data reading module, which calculates the number of calculation points N supported by the FFT processor. x Generate the corresponding N x original access address streams, mapping the original access address streams to N x The actual access address is generated according to the original access address stream and the number of acquisition points M of the real-time data acquisition module, and the zero-filling judgment signal corresponding to each access address is generated synchronously, wherein the first judgment signal is configured for the M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal;

[0023] Step S3: When the storage space receives a data read request, it generates a x The actual access address controls the output of N from the storage space x individual data;

[0024] Step S4: the data reading control module controls the direct output of the data in the storage space or performs a zero-filling operation according to the zero-filling judgment signal, wherein if it is the first judgment signal, the storage data in the storage space is controlled to be directly output, and if it is the second judgment signal, the zero-filling operation is controlled.

[0025] Furthermore, the step S2 includes:

[0026] Step S201. Obtain the real-time acquisition points M of the real-time data acquisition module and start the data reading module;

[0027] Step S202: Determine the number of acquisition points M of the real-time data acquisition module and determine the number of calculation points N that the FFT processor can support. x ;

[0028] Step S203. Based on the number of calculation points N supported by the FFT processor x Generate 0~(N x -1)'s original read address stream,;

[0029] Step S204. Generate 0~(N x -1) are mapped into actual access addresses of actual storage space respectively; and the original access address stream is compared and judged with the acquisition point number M of the real-time data acquisition module to generate a zero-filling judgment signal corresponding to each access address.

[0030] Further, the step S4 includes: if it is determined that it is the first judgment signal, the control selection unit controls the data of the storage space to be directly output so as to normally read out the M data stored in the storage space; if it is the second judgment signal, the control selection unit controls the zero padding operation to read out the corresponding N data. x -The output data of M addresses are replaced by 0 output.

[0031] Compared with the prior art, the present invention has the advantages that: the present invention realizes the zero-filling indication control of FFT calculation data from the perspective of FFT calculation data reading, by generating an access address according to a read request in a data reading module according to the number of acquisition points M and the number of calculation points N that the FFT processor can support. x The number of points is used to generate a corresponding zero-fill judgment signal, so as to use different judgment signals to correspond to whether each access address is normally output or needs to perform a zero-fill operation. Then, when the data reading control module outputs data from the storage space, the control is controlled according to the zero-fill judgment signal to indicate whether the data is directly output from the storage space or to perform a zero-fill operation. The zero-fill operation of the FFT calculated data can be quickly completed during the data reading process, without the need to perform complex operations such as point number judgment, zero-fill judgment, zero-fill quantity calculation, and zero-fill address generation as required by traditional zero-fill operations. The entire zero-fill implementation process is simple and easy to execute, which can greatly reduce the complexity of the zero-fill operation in the FFT calculation process, improve the execution efficiency and accuracy, and also reduce the hardware resources required to implement the zero-fill operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic diagram of the structural principle of performing zero padding on FFT calculation data in a traditional FFT processor.

[0033] Figure 2It is a structural diagram of the FFT calculation zero-padding control device based on data reading indication control in this embodiment.

[0034] Figure 3 It is a schematic diagram of the implementation flow of zero-padding implemented by the FFT calculation zero-padding control device based on data reading indication control in this embodiment.

[0035] Figure 4 It is a schematic diagram of the principle of implementing FFT calculation based on zero-padding operation in this embodiment.

[0036] Legend: 1. Real-time data acquisition module; 2. Data reading module; 201. Address generation unit; 221. Original address generation subunit; 222. Access address generation subunit; 202. Zero filling judgment unit; 203. Point number judgment unit; 3. Data reading control module. DETAILED DESCRIPTION

[0037] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0038] As shown in the disclosure of the present invention, unless the context clearly indicates an exception, the words "a", "an", "a kind" and / or "the" do not specifically refer to the singular, but may also include the plural. The words "first", "second" and similar words used in the disclosure of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. .

[0039] like Figure 2 As shown, the FFT calculation zero-filling control device based on data reading indication control in this embodiment includes a storage space for receiving and storing M data required for FFT calculation collected in real time by the real-time data collection module 1, and also includes:

[0040] The data reading module 2 is used to read the FFT calculation data stored in the storage space according to the number of calculation points N supported by the FFT processor. x Generate the corresponding N x The original access address stream is mapped to N actual storage spaces. xThe actual access addresses are output to the storage space, and the zero-filling judgment signal corresponding to each access address is synchronously generated according to the original access address stream and the number of collection points M of the real-time data collection module 1 and output to the data reading control module 3, wherein the first judgment signal is configured for M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal;

[0041] The data reading control module 3 is used to output N when the storage space receives a data reading request. x When data is stored, the data in the storage space is directly output or a zero-filling operation is performed according to the zero-filling judgment signal. If it is the first judgment signal, the storage data in the storage space is directly output, and if it is the second judgment signal, the zero-filling operation is performed.

[0042] This embodiment implements zero-filling indication control of FFT calculation data from the perspective of FFT calculation data reading, by generating an access address according to a read request in the data reading module 2, according to the number of acquisition points M and the number of calculation points N that the FFT processor can support. x Points are counted and corresponding zero-filling judgment signals are generated, so that different judgment signals are used to correspond to whether each access address is output normally or needs to perform a zero-filling operation. In combination with the data reading control module 3, when outputting data from the storage space, the zero-filling judgment signal indicates whether to directly output data from the storage space or perform a zero-filling operation. The zero-filling operation on the FFT calculated data can be quickly completed during the data reading process, without the need to perform complex operations such as point number judgment, zero-filling judgment, zero-filling quantity calculation, and zero-filling address generation as required by traditional zero-filling operations. The entire zero-filling implementation process is simple and easy to execute, which can greatly reduce the complexity of the zero-filling operation in the FFT calculation process, improve the execution efficiency and accuracy, and also reduce the hardware resources required to implement the zero-filling operation.

[0043] In this embodiment, the data reading module 2 specifically includes:

[0044] The address generating unit 201 is used to generate an address according to the number of calculation points N supported by the FFT processor. x , generating N x The original access address stream is mapped to the actual storage space N x The actual access address is outputted to the zero-filling judgment unit 202;

[0045] The zero-filling judgment unit 202 is used to compare and judge the original access address stream with the number of collection points M of the real-time data collection module 1, and generate a zero-filling judgment signal corresponding to each access address.

[0046] The data reading module 2 of this embodiment not only has an address conversion function, so as to generate a corresponding access address for reading data from the storage space and complete flexible sample reading, but also has a zero-filling judgment function, so as to synchronously generate a corresponding zero-filling judgment signal for each address in the process of mapping the original access address stream to the actual access address. When there are M access addresses, the corresponding configuration is a first judgment signal, and the remaining N x -M access addresses are configured as the second judgment signal, so that different judgment signals are used to identify each address, and then combined with the zero-filling judgment signal, it can instruct the control to read N from the storage space. x After collecting the data in real time, it is determined whether to output it directly or perform zero-filling operation.

[0047] In this embodiment, the address generation unit 201 specifically includes:

[0048] The original address generating subunit 221 is used to generate the original address according to the number of calculation points N supported by the FFT processor. x Generate 0~(N x -1) is output to the access address generation subunit 222;

[0049] The access address generation subunit 222 is used to generate 0~(N x -1) are mapped to actual access addresses of actual storage spaces respectively.

[0050] In this embodiment, the zero-filling judgment unit 202 is started synchronously with the access address generating subunit 222, so that when the address generating unit 201 maps the original access address stream to the actual access address, a corresponding zero-filling judgment signal is synchronously generated for each address.

[0051] In this embodiment, the data reading module 2 further includes a point number determination unit 203 connected to the original address generation subunit 221, which is used to determine the number of acquisition points M of the real-time data acquisition module 1 and determine the number of calculation points N that the FFT processor can support. x , output to the original address generation subunit 221.

[0052] When the data reading module 2 performs data reading, the point number judgment unit 203 first obtains the actual number of acquisition points M provided by the outside, and obtains the calculation point number information N that the corresponding FFT processor can support through range judgment. x , output to the original address generation subunit 221; the original address generation subunit 221 calculates the number of points according to the information N x Generate 0~(N x-1) is output to the access address generation subunit 222 and the zero-filling judgment unit 202; the access address generation subunit 222 completes various mapping transformations of the original read address stream according to different settings of the user to form N x access address and output it to the storage space; the zero-filling judgment unit 202 makes a real-time judgment on the original read address stream and the input acquisition point number M information, generates a zero-filling judgment signal synchronized with the access address generation subunit 222 and outputs it to the data reading control module 3.

[0053] In a specific application embodiment, the data reading module 2 can add a synchronous zero-filling judgment function based on the original data reading module in the FFT processor, so that in the process of generating the actual access address, the original access address stream is compared with the number of acquisition points M of the real-time data acquisition module 1 to generate a zero-filling judgment signal corresponding to each access address. When the storage space receives a data read request to output data, the data reading control module 3 controls the type of data output according to the indication of the zero-filling judgment signal, so that the M real-time collected data are output normally, and the subsequent N x The data of the -M addresses are replaced with 0 output to implement a zero-filling operation, so that the zero-filling indication control of the FFT calculation data can be completed by utilizing the data reading process.

[0054] In this embodiment, the data reading control module 3 specifically includes a zero-filling signal judgment unit and a control selection unit that are interconnected. When a data reading request is received, the data reading module 2 accesses the storage space through the access address, and the zero-filling signal judgment unit judges the corresponding zero-filling judgment signal in turn. If it is judged to be the first judgment signal, the control selection unit controls to directly read out the data stored in the storage space. At this time, the output is the M data collected in real time by the real-time data collection module 1 and stored in the storage space. If it is the second judgment signal, the control selection unit controls to replace the output data of the corresponding address with 0 output to achieve the zero-filling operation. At this time, the output is the corresponding N x -M addresses are filled with zero data. The data reading module 2 reads data from the storage space according to the generated N x Each address will read N x data, the N x The data includes M FFT calculation data collected and stored in real time, and the remaining N x-M is not FFT calculation data, and reading directly may result in reading wrong data. In this embodiment, the data reading control module 3 is combined to perform output control of the read data, and the zero-filling signal judgment unit judges the zero-filling judgment signal. Since different types of judgment signals are used in the zero-filling judgment signal to identify the storage addresses of M correct FFT calculation data and the remaining N addresses that need to be zero-filled, x -M addresses (i.e., addresses that need zero padding operation), therefore, according to the judgment result of the zero padding judgment unit, the addresses (first judgment signal) identifying the M correct FFT calculation data are directly output for storage data, and the addresses (first judgment signal) identifying the remaining N x -M addresses that need to be filled with zero are replaced with 0, so that N zero-filled addresses are finally formed x The data is given to the FFT calculation module.

[0055] In a specific application embodiment, during the FFT calculation process, first, the real-time data acquisition module 1 acquires M data in real time and sends a write request to the storage space; after the storage space receives the write request sent by the real-time data acquisition module 1, the M data acquired by the real-time data acquisition module 1 is written according to the address; the data reading module 2 generates a read request according to the user setting, and performs address conversion to generate N x The actual access address is synchronized according to the number of acquisition points M and the number of reading points N. x Generate a corresponding zero-fill judgment signal. If the data is output normally, it is configured as the first judgment signal. If the data needs to be filled with zero, it is configured as the second judgment signal. When the storage space receives the read request sent by the data reading module 2, the storage space outputs N x The data is given to the FFT calculation module, and the data reading control module 3 controls whether to directly output the data of the storage space or perform a zero-padding operation according to the zero-padding judgment signal provided by the data reading module 2. If the zero-padding judgment signal is the first judgment signal, the data of the storage space unit is controlled to be directly output. If it is the second judgment signal, a zero-padding operation is performed.

[0056] This embodiment also provides an FFT processor, including an FFT calculation module, for reading N x The invention also includes the above-mentioned FFT calculation zero-filling control device connected to the FFT calculation module, which is used to convert the M data required for the real-time collected FFT calculation into N data by zero-filling operation. x After the data are obtained, they are provided to the FFT calculation module.

[0057] The specific steps of implementing the FFT calculation zero-padding control based on data reading indication control based on the above device in this embodiment include:

[0058] Step S1: The real-time data acquisition module 1 collects M data required for FFT calculation in real time and stores them in a designated storage space;

[0059] Step S2: Start the data reading module 2, and the data reading module 2 calculates the number of calculation points N supported by the FFT processor. x Generate the corresponding N x The original access address stream is mapped to N actual storage spaces. x The actual access address is generated according to the original access address stream and the number of acquisition points M of the real-time data acquisition module 1, and the zero-filling judgment signal corresponding to each access address is generated synchronously, wherein the first judgment signal is configured for the M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal;

[0060] Step S3: When the storage space receives a data read request, it generates a x The actual access address is output from the storage space N x individual data;

[0061] Step S4: the data reading control module 3 controls the direct output of the data in the storage space or performs a zero-filling operation according to the zero-filling judgment signal, wherein if it is the first judgment signal, the storage data in the storage space is controlled to be directly output, and if it is the second judgment signal, the zero-filling operation is controlled.

[0062] In this embodiment, the steps of step S2 specifically include:

[0063] Step S201. Obtain the real-time acquisition points M of the real-time data acquisition module 1 and start the data reading module 2;

[0064] Step S202: Determine the number of acquisition points M of the real-time data acquisition module 1 and determine the number of calculation points N that the FFT processor can support. x ;

[0065] Step S203. Based on the number of calculation points N supported by the FFT processor x Generate 0~(N x -1)'s original read address stream,;

[0066] Step S204. Generate 0~(N x -1) are mapped to actual access addresses of actual storage space respectively; and the original access address stream is compared with the number of acquisition points M of the real-time data acquisition module 1 to generate a zero-filling judgment signal corresponding to each access address.

[0067] In this embodiment, step S4 specifically includes: if it is judged that it is the first judgment signal, the control selection unit controls the data of the storage space to be directly output so as to normally read out the M data stored in the storage space; if it is the second judgment signal, the control selection unit controls the zero padding operation to read out the corresponding N data. x -The output data of M addresses are replaced by 0 output.

[0068] In a specific application embodiment, Figure 3 As shown, the detailed steps of implementing FFT calculation zero-filling using the FFT calculation zero-filling control device based on data reading indication control of the present invention are as follows:

[0069] 1) Real-time data acquisition module 1 collects M data to be calculated by FFT and writes them into storage space (such as RAM, etc.).

[0070] 2) The storage space receives the write request sent by the real-time data acquisition module 1 and writes the M acquired data into the storage space.

[0071] 3) The real-time acquisition points M are input into the data reading module 2, and the data reading module 2 is started.

[0072] 4) The point number determination unit 203 in the data reading module 2 determines the number M and determines the number of operation points N that the FFT calculation module can support. x Output to the original address generation subunit 221.

[0073] 5) The original address generation subunit 221 in the data reading module 2 generates the address according to the number of operation points N x , generating 0~(N x -1) is output to the access address generation subunit 222 and the zero filling judgment unit.

[0074] 6) The access address generation subunit 222 in the data reading module 2 transforms the original read address according to the user setting, generates the read address of the actual storage space, and outputs it to the storage space.

[0075] 7) The zero-filling judgment unit 202 in the data reading module 2 judges the number M and the original reading address, generates a zero-filling judgment signal synchronized with the data reading module access address generation subunit 222, and outputs it to the data reading control module 3.

[0076] 8) When the storage space receives a read request from the data reading module 2, it reads the corresponding N according to the read address. x The sample data is output to the data reading control module 3.

[0077] 9) The data reading control module controls the execution of normal data transmission or zero filling operation according to the zero filling judgment signal, and finally outputs Nx The zero-filled sample data is sent to the FFT calculation module for FFT calculation, such as Figure 4 shown.

[0078] The above is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Therefore, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A FFT calculation zero-filling control device based on data reading indication control, comprising a storage space for receiving M data required for FFT calculation collected in real time by a real-time data collection module (1) for storage, characterized in that: Also includes: The data reading module (2) is used to read the FFT calculation data stored in the storage space according to the number of calculation points N supported by the FFT processor when it is necessary to read the FFT calculation data stored in the storage space. x Generate the corresponding N x original access address streams, mapping the original access address streams to N x The actual access addresses are output to the storage space, and a zero-filling judgment signal corresponding to each access address is synchronously generated according to the original access address stream and the number of collection points M of the real-time data collection module (1) and output to the data reading control module (3), wherein the first judgment signal is configured for the M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal; The data reading control module (3) is used to output N when the storage space receives a data reading request. x When the corresponding zero-fill judgment signal is detected, the data in the storage space is directly output or a zero-fill operation is performed according to the zero-fill judgment signal. If the first judgment signal is detected, the storage data in the storage space is directly output. If the second judgment signal is detected, the output data of the corresponding address is replaced with 0 to perform a zero-fill operation. At this time, the output is the corresponding N x - Zero-filled data for M addresses.

2. The FFT calculation zero-padding control device based on data reading indication control according to claim 1, characterized in that: The data reading module (2) comprises: An address generating unit (201) is used to generate an address according to the number of calculation points N supported by the FFT processor. x , generating N x The original access address stream is mapped to the actual storage space N x An actual access address is outputted to the original access address stream to the zero filling judgment unit (202); The zero-filling judgment unit (202) is used to compare and judge the original access address stream with the number of collection points M of the real-time data collection module (1), and generate a zero-filling judgment signal corresponding to each access address.

3. The FFT calculation zero-padding control device based on data reading indication control according to claim 2, characterized in that: The address generating unit (201) comprises: The original address generating subunit (221) is used to generate an address according to the number of calculation points N supported by the FFT processor. x Generate 0~(N x -1) is output to the access address generation subunit (222); The access address generation subunit (222) is used to generate 0~(N x -1) are mapped to actual access addresses of actual storage spaces.

4. The FFT calculation zero-padding control device based on data reading indication control according to claim 3, characterized in that: The zero-filling judgment unit (202) is started synchronously with the access address generating subunit (222) so as to synchronously generate a zero-filling judgment signal corresponding to the address during the process of generating the actual access address.

5. The FFT calculation zero-padding control device based on data reading indication control according to claim 4, characterized in that: The data reading module (2) further comprises a point number determination unit (203) connected to the original address generation subunit (221) for determining the number of acquisition points M of the real-time data acquisition module (1) and determining the number of calculation points N that the FFT processor can support. x , output to the original address generation subunit (221).

6. The FFT calculation zero-padding control device based on data reading indication control according to any one of claims 1 to 5, characterized in that: The data reading control module (3) comprises a zero-filling signal judgment unit and a control selection unit connected to each other. When the storage space receives a data reading request, the data reading module (2) receives a zero-filling signal judgment unit and a control selection unit connected to each other. x N access addresses access the storage space x In the process of data, the zero-filling signal judgment unit judges N x The control selection unit controls the direct output of the data in the storage space to read out the M data stored in the storage space normally; if it is the second judgment signal, the control selection unit controls the output data of the corresponding address to be replaced with 0 output to achieve the zero-filling operation.

7. An FFT processor, comprising an FFT calculation module, for reading N x The FFT calculation is performed on the data, which is characterized by: The invention also includes an FFT calculation zero-filling control device as claimed in any one of claims 1 to 6 connected to the FFT calculation module, so as to convert the M data required for the real-time collected FFT calculation into N data by performing zero-filling operation. x After the data are obtained, they are provided to the FFT calculation module.

8. A method for controlling zero padding in FFT calculation based on data reading indication control, characterized in that the steps include: Step S1: The real-time data acquisition module (1) acquires M data required for FFT calculation in real time and stores them in a designated storage space; Step S2: Start the data reading module (2), and the data reading module (2) calculates the number of calculation points N supported by the FFT processor. x Generate the corresponding N x original access address streams, mapping the original access address streams to N x actual access addresses, and synchronously generates zero-filling judgment signals corresponding to each access address according to the original access address stream and the number of collection points M of the real-time data collection module (1), wherein the first judgment signal is configured for M access addresses, and the remaining N x -M access addresses are configured as the second judgment signal; Step S3: When the storage space receives a data read request, it generates a x The actual access address controls the output of N from the storage space x individual data; Step S4: the data reading control module (3) determines the corresponding zero-filling judgment signal, and controls the direct output of the data in the storage space or replaces the output data of the corresponding address with 0 output to perform a zero-filling operation according to the zero-filling judgment signal, wherein if it is judged to be the first judgment signal, the storage data in the storage space is controlled to be directly output, and if it is judged to be the second judgment signal, the zero-filling operation is controlled.

9. The FFT calculation zero-padding control method based on data reading indication control according to claim 8, characterized in that: The step S2 comprises: Step S201. Obtain the real-time acquisition points M of the real-time data acquisition module (1), and start the data reading module (2); Step S202: Determine the number of acquisition points M of the real-time data acquisition module (1) and determine the number of calculation points N that the FFT processor can support. x ; Step S203. Based on the number of calculation points N supported by the FFT processor x Generate 0~(N x -1)'s original read address stream; Step S204. Generate 0~(N x -1) are respectively mapped into actual access addresses of actual storage space; and the original access address stream is compared and judged with the acquisition point number M of the real-time data acquisition module (1) to generate a zero-filling judgment signal corresponding to each access address.

10. The FFT calculation zero-padding control method based on data reading indication control according to claim 8 or 9, characterized in that: The step S4 includes: if it is determined that it is the first judgment signal, the control selection unit controls the data of the storage space to be directly output so as to normally read out the M data stored in the storage space; if it is the second judgment signal, the control selection unit controls the zero padding operation to read out the corresponding N data. x -The output data of M addresses are replaced by 0 output.

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