Highly integrated, high linearity, low noise amplifier circuit

Abstract

The present invention provides a highly integrated, high-linearity, low-noise amplifier circuit, and relates to the technical field of amplifier circuits. The amplifier circuit is matched through a differential architecture, and the input matching transformer, the output matching transformer, and the source degenerate inductor are highly integrated. It has input matching, output matching, and high-linearity, low-noise amplification functions, while greatly improving the integration of the amplifier circuit, and realizing further low-cost design.

Description

Technical Field

[0001] The present invention relates to the technical field of amplifier circuits, and in particular to a high-integration, high-linearity, and low-noise amplifier circuit. Background Art

[0002] Low-noise amplifier circuits are widely used in electronic systems such as phased array radar and wireless communications. Their linearity, noise, and integration affect the core indicators and system cost of transceiver circuits.

[0003] The traditional differential structure high linearity low noise amplifier circuit adopts three different structures of input matching transformer, output matching transformer and source degenerate inductor to realize input matching, output matching and high linearity functions respectively.

[0004] However, the input matching, output matching and source degenerate inductance of the traditional amplifier circuit are composed of three different structures, and the area cannot be reused, resulting in a large circuit size, limiting the improvement of circuit integration, and making it impossible to achieve further low-cost design. Summary of the invention

[0005] In view of the deficiencies of the prior art, the present invention provides a highly integrated, highly linear, and low-noise amplifier circuit, which solves the problem that the amplifier circuit has low integration and cannot achieve further low-cost design.

[0006] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0007] A highly integrated, high-linearity, low-noise amplifier circuit, the amplifier circuit comprising: a first primary coil L1, a first secondary coil L2, a first transistor M1, a second transistor M2, a second primary coil L3, a second secondary coil L4, a first source degenerate inductor L5, and a second source degenerate inductor L6;

[0008] The first primary coil L1 and the first secondary coil L2 form an input matching transformer; the second primary coil L3 and the second secondary coil L4 form an output matching transformer;

[0009] The two ends of the first primary coil L1 are input ends of the amplifier circuit, and the two ends of the first secondary coil L2 are connected to the gate of the first transistor M1 and the gate of the second transistor M2 respectively;

[0010] Two ends of the second primary coil L3 are respectively connected to the drain of the first transistor M1 and the drain of the second transistor M2, and two ends of the second secondary coil L4 are output ends of the amplifier circuit;

[0011] The center of the second primary coil L3 is connected to a power source to supply power to the first transistor M1 and the second transistor M2;

[0012] The source of the first transistor M1 is grounded via a first source degenerate inductor L5;

[0013] The source of the second transistor M2 is grounded via a second source degenerate inductor L6.

[0014] Preferably, the coil of the input matching transformer, the coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are stacked;

[0015] The coil of the input matching transformer is wired in an "8" shape;

[0016] The coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are arranged on the outer ring of the coil of the input matching transformer.

[0017] Preferably, the amplifying circuit further comprises: a first neutralizing capacitor C1 and a second neutralizing capacitor C2;

[0018] The drain of the first transistor M1 and the gate of the second transistor M2 are connected via a first neutralization capacitor C1;

[0019] The gate of the first transistor M1 and the drain of the second transistor M2 are connected via a second neutralization capacitor C2.

[0020] The present invention provides a highly integrated, high linearity, low noise amplifier circuit. Compared with the prior art, it has the following beneficial effects:

[0021] In the present invention, the amplifier circuit is matched in an integrated manner through a differential architecture, and the input matching transformer, output matching transformer and source degenerate inductor are highly integrated. It has input matching, output matching and high linearity and low noise amplification functions, while greatly improving the integration of the amplifier circuit and achieving further low-cost design. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 Schematic diagram of the principle circuit of the amplifier circuit in the embodiment of the present invention;

[0024] Figure 2 is an axonometric diagram of an amplifier circuit in an embodiment of the present invention;

[0025] Figure 3 is an axonometric exploded view of an amplifier circuit in an embodiment of the present invention;

[0026] Figure 4 It is a front view of the amplifier circuit in the embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] The embodiment of the present application solves the problem that the integration of the amplifier circuit is low and further low-cost design cannot be achieved by providing a highly integrated, highly linear and low-noise amplifier circuit.

[0029] The technical solution in the embodiment of the present application is to solve the above technical problems, and the overall idea is as follows:

[0030] In the embodiment of the present invention, the amplifier circuit is matched in an integrated manner through a differential architecture, and the input matching transformer, the output matching transformer and the source degenerate inductor are highly integrated. It has input matching, output matching and high linearity and low noise amplification functions, while greatly improving the integration of the amplifier circuit and achieving further low-cost design.

[0031] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0032] Example:

[0033] like Figure 1 to Figure 4 As shown, the present invention provides a highly integrated, high-linearity, low-noise amplifier circuit, the amplifier circuit comprising: a first primary coil L1, a first secondary coil L2, a first transistor M1, a second transistor M2, a second primary coil L3, a second secondary coil L4, a first source degenerate inductor L5, and a second source degenerate inductor L6;

[0034] The first primary coil L1 and the first secondary coil L2 form an input matching transformer with a coupling coefficient of K12; the second primary coil L3 and the second secondary coil L4 form an output matching transformer with a coupling coefficient of K34;

[0035] The two ends of the first primary coil L1 are input ends of the amplifier circuit, and the two ends of the first secondary coil L2 are connected to the gate of the first transistor M1 and the gate of the second transistor M2 respectively;

[0036] Two ends of the second primary coil L3 are respectively connected to the drain of the first transistor M1 and the drain of the second transistor M2, and two ends of the second secondary coil L4 are output ends of the amplifier circuit;

[0037] The center of the second primary coil L3 is connected to a power source to supply power to the first transistor M1 and the second transistor M2;

[0038] The source of the first transistor M1 is grounded via a first source degenerate inductor L5;

[0039] The source of the second transistor M2 is grounded via a second source degenerate inductor L6.

[0040] The amplifier circuit realizes a high linearity and low noise amplifier design by optimizing the source degenerate inductance value.

[0041] The amplifier circuit is matched in an integrated manner through a differential architecture, and the input matching transformer, output matching transformer and source degenerate inductor are highly integrated. It has input matching, output matching and high linearity and low noise amplification functions, while greatly improving the integration of the amplifier circuit and achieving further low-cost design.

[0042] like Figure 2 to Figure 4 As shown, the coil of the input matching transformer, the coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are stacked;

[0043] The coil of the input matching transformer is wired in an "8" shape, which reduces the size of the coil and reduces the coupling between the input transformer and the outside.

[0044] The coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are arranged on the outer coil of the input matching transformer;

[0045] The amplifier circuit realizes the arrangement of the input matching transformer, the output matching transformer and the source degenerate inductor under the condition of a size similar to that of a traditional input matching transformer through an integrated matching structure of "8"-shaped wiring and stacked wiring, thereby reducing the overall size of the amplifier circuit by more than 50%, further improving the integration of the amplifier circuit.

[0046] The amplifying circuit further includes: a first neutralizing capacitor C1 and a second neutralizing capacitor C2;

[0047] The drain of the first transistor M1 and the gate of the second transistor M2 are connected via a first neutralization capacitor C1;

[0048] The gate of the first transistor M1 and the drain of the second transistor M2 are connected via a second neutralization capacitor C2;

[0049] The amplifier circuit eliminates the parasitic capacitance of the first transistor M1 and the second transistor M2 by introducing the first neutralization capacitor C1 and the second neutralization capacitor C2, thereby improving the stability of the amplifier circuit.

[0050] In summary, compared with the prior art, the present invention has the following beneficial effects:

[0051] 1. In the embodiment of the present invention, the amplifier circuit is matched in an integrated manner through a differential architecture, and the input matching transformer, the output matching transformer and the source degenerate inductor are highly integrated. It has input matching, output matching and high linearity and low noise amplification functions, while greatly improving the integration of the amplifier circuit and achieving further low-cost design.

[0052] 2. The amplifier circuit realizes the arrangement of the input matching transformer, the output matching transformer and the source degenerate inductor under the condition of a size similar to that of the traditional input matching transformer through an integrated matching structure of "8"-shaped wiring and stacked wiring, so that the overall size of the amplifier circuit is reduced by more than 50%, further improving the integration of the amplifier circuit.

[0053] 3. In the embodiment of the present invention, the amplifier circuit eliminates the parasitic capacitance of the first transistor M1 and the second transistor M2 by introducing the first neutralization capacitor C1 and the second neutralization capacitor C2, thereby improving the stability of the amplifier circuit.

[0054] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0055] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A highly integrated, high linearity, low noise amplifier circuit, characterized in that: The amplifier circuit includes: a first primary coil L1, a first secondary coil L2, a first transistor M1, a second transistor M2, a second primary coil L3, a second secondary coil L4, a first source degenerate inductor L5 and a second source degenerate inductor L6; The first primary coil L1 and the first secondary coil L2 form an input matching transformer; the second primary coil L3 and the second secondary coil L4 form an output matching transformer; The two ends of the first primary coil L1 are input ends of the amplifier circuit, and the two ends of the first secondary coil L2 are connected to the gate of the first transistor M1 and the gate of the second transistor M2 respectively; Two ends of the second primary coil L3 are respectively connected to the drain of the first transistor M1 and the drain of the second transistor M2, and two ends of the second secondary coil L4 are output ends of the amplifier circuit; The center of the second primary coil L3 is connected to a power source to supply power to the first transistor M1 and the second transistor M2; The source of the first transistor M1 is grounded via a first source degenerate inductor L5; The source of the second transistor M2 is grounded via a second source degenerate inductor L6; The coil of the input matching transformer, the coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are stacked; The coil of the input matching transformer is wired in an "8" shape; The coil of the output matching transformer, the first source degenerate inductor L5 and the second source degenerate inductor L6 are arranged on the outer ring of the coil of the input matching transformer.

2. The highly integrated, high linearity, low noise amplifier circuit according to claim 1, characterized in that: The amplifying circuit further includes: a first neutralizing capacitor C1 and a second neutralizing capacitor C2; The drain of the first transistor M1 and the gate of the second transistor M2 are connected via a first neutralization capacitor C1; The gate of the first transistor M1 and the drain of the second transistor M2 are connected via a second neutralization capacitor C2.

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