Image sensor and method for manufacturing the same

Abstract

The present application relates to an image sensor and a method for preparing the same, including providing an initial semiconductor structure, wherein the outer surface layer on one side of the initial semiconductor structure is a barrier layer; forming a first functional layer on the barrier layer; forming a plurality of first isolation structures arranged at intervals in the first functional layer and the barrier layer; forming a second functional layer on the first functional layer; forming a plurality of second isolation structures arranged at intervals in the second functional layer; the second isolation structure and the first isolation structure are arranged correspondingly; forming a third functional layer on the second functional layer; forming a plurality of third isolation structures arranged at intervals in the third functional layer; the third isolation structure and the second isolation structure are arranged correspondingly; the first isolation structure, the second isolation structure and the third isolation structure arranged correspondingly form a deep trench isolation structure, and a photoelectric element is formed between two adjacent deep trench isolation structures. The method for preparing the image sensor of the present application can reduce the difficulty of the manufacturing process and reduce the crosstalk between adjacent photoelectric elements.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to an image sensor and a method for preparing the same. Background Art

[0002] With the development of semiconductor technology, backside illumination (BSI) image sensors have been widely used due to their advantages of low noise and good photosensitivity compared to front-illuminated image sensors. However, in the traditional backside illumination image sensor process, high-energy ion implantation is used to form photoelectric components in the front-end process, which will lead to unsatisfactory crosstalk between different photoelectric components. Summary of the invention

[0003] Based on this, it is necessary to provide an image sensor and a preparation method thereof that can reduce crosstalk.

[0004] In a first aspect, the present application provides a method for preparing an image sensor, comprising:

[0005] Providing an initial semiconductor structure; wherein an outer surface layer on one side of the initial semiconductor structure is a barrier layer;

[0006] forming a first functional layer on the barrier layer;

[0007] forming a plurality of first isolation structures arranged at intervals in the first functional layer and the barrier layer;

[0008] forming a second functional layer on the first functional layer;

[0009] A plurality of second isolation structures are formed in the second functional layer and are arranged at intervals; the second isolation structures are arranged corresponding to the first isolation structures;

[0010] forming a third functional layer on the second functional layer;

[0011] A plurality of third isolation structures are formed in the third functional layer and are arranged in intervals; the third isolation structure and the second isolation structure are arranged correspondingly; wherein the first isolation structure, the second isolation structure and the third isolation structure arranged correspondingly form a deep trench isolation structure, and a photoelectric element is formed between two adjacent deep trench isolation structures.

[0012] In one embodiment, the first isolation structures arranged at intervals are formed in the first functional layer and the barrier layer, including:

[0013] A plurality of first grooves are formed in the first functional layer and the barrier layer;

[0014] depositing a first isolation material in the first groove to form the first isolation structure;

[0015] The second isolation structures are formed in the second functional layer in a plurality of interval arrangements, including:

[0016] A plurality of second grooves are formed in the second functional layer; the plurality of second grooves are arranged corresponding to the first isolation structure;

[0017] Depositing a second isolation material in the second groove to form the second isolation structure;

[0018] The third isolation structures are formed in the third functional layer and arranged at intervals, including:

[0019] A plurality of third grooves are formed in the third functional layer; the third grooves are arranged corresponding to the second isolation structures;

[0020] A third isolation material is deposited in the third groove to form the third isolation structure.

[0021] In one embodiment, the first isolation material, the second isolation material and the third isolation material each include at least one element of the third main group.

[0022] In one embodiment, the first isolation material includes silicon boride, the second isolation material includes aluminum, and the third isolation material includes silicon gallium.

[0023] In one embodiment, providing an initial semiconductor structure includes:

[0024] Providing a substrate; wherein a plurality of shallow trench isolation structures corresponding to the deep trench isolation structures are formed in the substrate;

[0025] An ion implantation process is used to form a barrier layer in the substrate; the barrier layer is in contact with the bottom of the shallow trench isolation structure;

[0026] The substrate on one side of the barrier layer away from the shallow trench isolation structure is removed to expose the barrier layer, so as to form the initial semiconductor structure.

[0027] In one embodiment, the material of the barrier layer includes boron.

[0028] In one embodiment, the method further comprises:

[0029] forming an isolation gate on the deep trench isolation structure;

[0030] A filter is formed between two adjacent isolation gates.

[0031] In one embodiment, forming an isolation gate on the deep trench isolation structure includes:

[0032] forming a first dielectric layer, a second dielectric layer and a third dielectric layer in sequence on the third functional layer; wherein the first dielectric layer, the second dielectric layer and the third dielectric layer are made of different materials;

[0033] The first dielectric layer, the second dielectric layer and the third dielectric layer are etched to form a plurality of isolation gates arranged at intervals.

[0034] In one of the embodiments, in a direction from the isolation gate to the deep trench isolation structure, the width of the isolation gate has an increasing trend.

[0035] In a second aspect, the present application further provides an image sensor, which is prepared using the method for preparing an image sensor provided by any of the above embodiments.

[0036] The unexpected effect of the present application is: by providing an initial semiconductor structure provided with a barrier layer, forming a first functional layer on the barrier layer, and forming a plurality of first isolation structures arranged at intervals in the first functional layer and the first barrier layer, further, forming a second functional layer on the first functional layer, and forming a plurality of second isolation structures arranged at intervals in the second functional layer, and finally, forming a third functional layer on the second functional layer, and forming a plurality of third isolation structures arranged at intervals in the third functional layer, so that the depth-to-width ratio of the first isolation structure, the second isolation structure and the third isolation structure is reduced while ensuring that the deep trench isolation structure finally formed has a large depth-to-width ratio, thereby reducing the difficulty of manufacturing the image sensor. In addition, the deep trench isolation structure finally formed can effectively reduce the crosstalk between adjacent photoelectric elements due to its large depth-to-width ratio, thereby improving the photosensitivity of the image sensor. Furthermore, by forming the first isolation structure, the second isolation structure and the third isolation structure through separate processes, and forming a deep trench isolation structure by the first isolation structure, the second isolation structure and the third isolation structure, the problem of reaching the limits of photolithography and etching when forming a deep trench isolation structure can also be effectively alleviated when the size of the image sensor is very small. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1is a flow chart of a method for preparing an image sensor provided in an embodiment;

[0039] Figure 2 A schematic cross-sectional view of a structure obtained by providing an initial semiconductor structure in a step of an embodiment;

[0040] Figure 3 It is a cross-sectional schematic diagram of a structure obtained by forming a plurality of first isolation structures arranged at intervals in the first functional layer and the barrier layer in a step in an embodiment;

[0041] Figure 4 It is a schematic cross-sectional view of a structure obtained by forming a plurality of second isolation structures arranged at intervals in a second functional layer in a step in an embodiment;

[0042] Figure 5 It is a schematic cross-sectional view of a structure obtained by forming a plurality of third isolation structures arranged at intervals in a third functional layer in a step in an embodiment;

[0043] Figure 6 is a flow chart of forming a plurality of first isolation structures arranged at intervals in a first functional layer and a barrier layer in one embodiment;

[0044] Figure 7 is a flow chart of forming a plurality of second isolation structures arranged at intervals in a second functional layer in one embodiment;

[0045] Figure 8 is a flow chart of forming a plurality of third isolation structures arranged at intervals in a third functional layer in one embodiment;

[0046] Fig. 9 A flowchart of an initial semiconductor structure is provided in one embodiment;

[0047] Fig.10 It is a schematic cross-sectional view of a structure obtained by forming a barrier layer in a substrate by an ion implantation process in a step of an embodiment;

[0048] Fig.11 A schematic cross-sectional view of a structure obtained by removing a substrate on a side of a barrier layer away from a shallow trench isolation structure to expose the barrier layer in an embodiment to form an initial semiconductor structure;

[0049] Fig.12 is a flow chart of a method for preparing an image sensor provided in an embodiment;

[0050] Fig.13 is a flow chart of forming an isolation gate on a deep trench isolation structure in one embodiment;

[0051] Fig.14 It is a cross-sectional schematic diagram of a structure obtained by sequentially forming a first dielectric layer, a second dielectric layer and a third dielectric layer on a third functional layer in steps in an embodiment;

[0052] Fig.15 It is a schematic cross-sectional view of a structure obtained by etching the first dielectric layer, the second dielectric layer and the third dielectric layer to form a plurality of isolation gates arranged at intervals in one embodiment;

[0053] Fig.16 The cross-sectional view of a structure obtained by forming a filter between two adjacent isolation gates in a step in an embodiment is shown.

[0054] Description of reference numerals:

[0055] 100-initial semiconductor structure, 110-barrier layer, 120-substrate, 130-shallow trench isolation structure, 200-photoelectric element, 210-first functional layer, 220-second functional layer, 230-third functional layer, 300-deep trench isolation structure, 310-first isolation structure, 320-second isolation structure, 330-third isolation structure, 400-isolation gate, 410-first dielectric layer, 420-second dielectric layer, 430-third dielectric layer, 500-filter. DETAILED DESCRIPTION

[0056] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0058] It should be understood that when an element or layer is referred to as being "on, "adjacent to, "connected to, or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, "directly adjacent to, "directly connected to, or "directly coupled to" other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0059] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0060] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0061] In one embodiment, Figure 1 As shown, the present application provides a method for preparing an image sensor, including steps S10-S70.

[0062] S10 , providing an initial semiconductor structure 100 .

[0063] like Figure 2 As shown, one outer surface layer of the initial semiconductor structure 100 is a barrier layer 110. The barrier layer 110 may be made of insulating materials such as silicon oxide, and the barrier layer 110 is provided to prevent crosstalk between the semiconductor structure subsequently formed on the upper portion of the barrier layer and the semiconductor structure below the barrier layer.

[0064] S20 , forming a first functional layer 210 on the barrier layer 110 .

[0065] The first functional layer 210 may be formed by depositing the first functional layer material on the barrier layer using a chemical vapor deposition process.

[0066] S30 , forming a plurality of first isolation structures 310 arranged at intervals in the first functional layer 210 and the barrier layer 110 .

[0067] like Figure 3 As shown, a plurality of first isolation structures 310 arranged at intervals may be formed in the first functional layer 210 and the barrier layer 110 by using processes such as photolithography, etching, and deposition. The bottom height of the first isolation structure 310 is the same as the bottom height of the barrier layer 110, and the top height of the first isolation structure 310 is the same as the top height of the first functional layer 210. The cross-sectional shape of the first isolation structure 310 may be a trapezoid, that is, in the direction from the initial semiconductor structure 100 to the top of the first isolation structure 310, the width of the first isolation structure 310 has a decreasing trend.

[0068] S40 , forming a second functional layer 220 on the first functional layer 210 .

[0069] The second functional layer 220 may be formed by depositing the second functional layer material on the barrier layer using a chemical vapor deposition process.

[0070] S50 , forming a plurality of second isolation structures 320 arranged at intervals in the second functional layer 220 , wherein the second isolation structures 320 and the first isolation structures 310 are arranged correspondingly.

[0071] like Figure 4 As shown, a plurality of second isolation structures 320 arranged at intervals can be formed in the second functional layer 220 by photolithography, etching, deposition and other processes. The second isolation structure 320 contacts the first isolation structure 310, and the top height of the second isolation structure 320 is the same as the top height of the second functional layer 220.

[0072] S60 , forming a third functional layer 230 on the second functional layer 220 .

[0073] A third functional layer material may be deposited on the second functional layer 220 by a chemical vapor deposition process to form the third functional layer 230. It should be noted that the first functional layer material, the second functional layer material, and the third functional layer material are different and all include elements of the fifth main group. Exemplarily, the first functional layer material may include silicon phosphide (SiP), the second functional layer material may include silicon arsenide (SiAs), and the third functional layer material may include silicon antimonide (SiSb).

[0074] S70 , forming a plurality of third isolation structures 330 arranged at intervals in the third functional layer 230 , wherein the third isolation structures 330 and the second isolation structures 320 are disposed correspondingly.

[0075] like Figure 5 As shown, a plurality of third isolation structures 330 arranged at intervals can be formed in the third functional layer 230 by photolithography, etching, deposition and other processes. The third isolation structure 330 contacts the second isolation structure 320, and the top height of the third isolation structure 330 is the same as the top height of the third functional layer 230.

[0076] The first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 are arranged correspondingly to form a deep trench isolation structure 300, and the optoelectronic element 200 is formed between two adjacent deep trench isolation structures 300. It can be understood that the number of the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 is the same, and the second isolation structure 320 is arranged between the first isolation structure 310 and the third isolation structure 330. The first functional layer 210, the second functional layer 220 and the third functional layer 230 between adjacent deep trench isolation structures 300 constitute the optoelectronic element 200.

[0077] In the embodiment of the present application, by providing an initial semiconductor structure 100 provided with a barrier layer 110, forming a first functional layer 210 on the barrier layer, and forming a plurality of first isolation structures 310 arranged at intervals in the first functional layer 210 and the first barrier layer, further forming a second functional layer 220 on the first functional layer 210, and forming a plurality of second isolation structures 320 arranged at intervals in the second functional layer 220, and finally forming a third functional layer 230 on the second functional layer 220, and forming a plurality of third isolation structures 330 arranged at intervals in the third functional layer 230, the aspect ratios of the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 are reduced while ensuring that the deep trench isolation structure 300 finally formed has a large aspect ratio, thereby reducing the difficulty of manufacturing the image sensor. In addition, the deep trench isolation structure 300 finally formed can effectively reduce the crosstalk between adjacent photoelectric elements 200 due to its large aspect ratio, thereby improving the photosensitivity of the image sensor. Furthermore, the method of forming the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 through separate processes and forming the deep trench isolation structure 300 by the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 can also effectively alleviate the problem of reaching the limits of lithography and etching when forming the deep trench isolation structure 300 when the image sensor size is very small.

[0078] In one embodiment, Figure 6 As shown, a plurality of first isolation structures 310 arranged at intervals are formed in the first functional layer 210 and the barrier layer, including steps S301 - S302 .

[0079] S301 , a plurality of first grooves are formed in the first functional layer 210 and the barrier layer.

[0080] A plurality of first grooves arranged at intervals may be formed in the first functional layer 210 and the barrier layer by using processes such as photolithography and etching. The cross-sectional shape of the first groove may be a trapezoid.

[0081] S302 , depositing a first isolation material in the first groove to form a first isolation structure 310 .

[0082] A deposition process may be used to deposit a first isolation material in the first groove to form a first isolation structure 310. Optionally, a process such as mechanical polishing may be used to planarize the formed semiconductor structure so that the top height of the first isolation structure 310 is the same as the top height of the first functional layer 210.

[0083] In the embodiment of the present application, the first isolation structure 310 formed has a smaller aspect ratio than the deep trench isolation structure 300 finally formed.

[0084] In one embodiment, Figure 7 As shown, a plurality of second isolation structures 320 arranged at intervals are formed in the second functional layer 220 , including steps S501 - S502 .

[0085] S501 , a plurality of second grooves are opened in the second functional layer 220 , and the plurality of second grooves are arranged corresponding to the first isolation structure 310 .

[0086] A plurality of second grooves arranged at intervals may be formed in the second functional layer 220 by using processes such as photolithography and etching. The bottom of the second groove contacts the first isolation structure 310. The cross-sectional shape of the second groove may be a trapezoid or a rectangle.

[0087] S502 , depositing a second isolation material in the second groove to form a second isolation structure 320 .

[0088] A deposition process may be used to deposit a second isolation material in the second groove to form the second isolation structure 320. Optionally, a process such as mechanical polishing may be used to planarize the formed semiconductor structure so that the top height of the second isolation structure 320 is the same as the top height of the second functional layer 220.

[0089] In the embodiment of the present application, the formed second isolation structure 320 has a smaller aspect ratio than the finally formed deep trench isolation structure 300 .

[0090] In one embodiment, Figure 8 As shown, a plurality of third isolation structures 330 arranged at intervals are formed in the third functional layer 230 , including steps S701 - S702 .

[0091] S701 , a plurality of third grooves are opened in the third functional layer 230 , and the third grooves are arranged corresponding to the second isolation structures 320 .

[0092] A plurality of third grooves arranged at intervals may be formed in the third functional layer 230 by using processes such as photolithography and etching. The bottom of the third groove contacts the second isolation structure 320. The cross-sectional shape of the third groove may be a trapezoid.

[0093] S702 , depositing a third isolation material in the third groove to form a third isolation structure 330 .

[0094] A deposition process may be used to deposit a third isolation material in the third groove to form a third isolation structure 330. Optionally, a process such as mechanical polishing may be used to planarize the formed semiconductor structure so that the top height of the third isolation structure 330 is the same as the top height of the third functional layer 230.

[0095] In the embodiment of the present application, the formed third isolation structure 330 has a smaller aspect ratio than the finally formed deep trench isolation structure 300 .

[0096] It can be understood that in the above embodiment, when the device size of the image sensor is very small, by sequentially forming the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330, the process difficulty of each etching is reduced while ensuring that the deep trench isolation structure 300 formed in the end has a large aspect ratio. In addition, compared with the method of forming the deep trench isolation structure 300 by etching once after the functional layer is formed in the traditional process, the present application can also effectively alleviate the problem that the limits of photolithography and etching are easily reached when forming the deep trench isolation structure 300 when the size of the image sensor is very small.

[0097] In one embodiment, the first isolation material, the second isolation material and the third isolation material each include at least one element of the third main group. Optionally, the first isolation material includes silicon boride, the second isolation material includes aluminum, and the third isolation material includes silicon gallium.

[0098] In one embodiment, Fig. 9 As shown, an initial semiconductor structure is provided, including steps S101-S103.

[0099] S101, providing a substrate, in which a plurality of shallow trench isolation structures corresponding to the deep trench isolation structures are formed.

[0100] The substrate can be made of semiconductor material, insulating material, conductor material or any combination thereof. The substrate can be a single-layer structure or a multi-layer structure. For example, the substrate can be a silicon (Si) substrate, a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate or other III / V semiconductor substrates or II / VI semiconductor substrates. Alternatively, for example, the substrate can be a layered substrate including Si / SiGe, Si / SiC, silicon on insulator (SOI) or silicon germanium on insulator. Therefore, the type of substrate should not limit the scope of protection of the present disclosure. The thickness of the substrate can be between 2.5 microns and 3.5 microns, and illustratively, it can be 3 microns. A plurality of shallow trench isolation structures arranged at intervals are formed in the substrate.

[0101] S102 , forming a barrier layer 110 in the substrate 120 by using an ion implantation process, wherein the barrier layer 110 is in contact with the bottom of the shallow trench isolation structure 130 .

[0102] like Fig.10As shown, an ion implantation process can be used to perform ion implantation along a side of the substrate 120 away from the shallow trench isolation structure 130 to form a barrier layer 110. It can be understood that the ion implantation is performed in the opposite direction of the OY direction. The barrier layer 110 is in contact with the bottom of the shallow trench isolation structure 130. It should be noted that the bottom of the shallow trench isolation structure 130 described here refers to the surface along one side of the OY direction. Optionally, the material of the barrier layer 110 may include boron. The barrier layer 110 can prevent crosstalk between the optoelectronic element and the shallow trench isolation structure formed by the subsequent process.

[0103] S103 , removing the substrate on one side of the barrier layer 110 away from the shallow trench isolation structure 130 to expose the barrier layer 110 , so as to form an initial semiconductor structure 100 .

[0104] like Fig.11 As shown, a mechanical polishing process may be used to remove the substrate on one side of the barrier layer 110 away from the shallow trench isolation structure 130 to expose the barrier layer 110 , thereby forming an initial semiconductor structure 100 .

[0105] In one embodiment, Fig.12 As shown, the method for preparing the image sensor further includes steps S80 - S90 .

[0106] S80 , forming an isolation gate 400 on the deep trench isolation structure 300 .

[0107] Specifically, Fig.13 As shown, forming the isolation gate 400 on the deep trench isolation structure 300 includes steps S801 - S802 .

[0108] S801 , forming a first dielectric layer 410 , a second dielectric layer 420 and a third dielectric layer 430 in sequence on the third functional layer 230 .

[0109] like Fig.14 As shown, a deposition process may be used to sequentially deposit a first dielectric layer material, a second dielectric layer material, and a third dielectric layer material on the third functional layer 230 to form a first dielectric layer 410, a second dielectric layer 420, and a third dielectric layer 430. The first dielectric layer material, the second dielectric layer material, and the third dielectric layer material may include a high dielectric constant material. For example, the first dielectric layer material may include thallium oxide, the second dielectric layer material may include aluminum, and the third dielectric layer material may include titanium nitride.

[0110] S802 , etching the first dielectric layer 410 , the second dielectric layer 420 and the third dielectric layer 430 to form a plurality of isolation gates 400 arranged at intervals.

[0111] like Fig.15As shown, the first dielectric layer 410, the second dielectric layer 420 and the third dielectric layer 430 can be etched by photolithography and etching processes to form a plurality of spaced isolation gates 400. The isolation gates 400 and the deep trench isolation structure 300 are arranged correspondingly. Since the isolation gates 400 are made of high dielectric constant materials, they have good insulation properties and can reduce leakage.

[0112] S90 , forming a filter 500 between two adjacent isolation gates 400 .

[0113] Furthermore, if Fig.16 As shown, a filter material is deposited between two adjacent isolation gates 400 to form a filter 500. The filter 500 may include a blue filter, a green filter, and a red filter. Filters for filtering light of different wavelengths may be formed between a plurality of adjacent isolation gates 400.

[0114] In some embodiments, in a direction from the isolation gate to the deep trench isolation structure, the width of the isolation gate has a tendency to increase, which can enhance the isolation effect and reduce current leakage.

[0115] It should be understood that, although the steps in the above-mentioned flowcharts are shown in sequence according to the diagrams, these steps are not necessarily executed in sequence according to the order shown in the diagrams. Unless there is a clear description in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in each figure may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0116] In one embodiment, the present application also provides an image sensor (refer to Figure 5), which can be prepared by the preparation method of the image sensor provided by any of the above embodiments. Specifically, the image sensor includes an initial semiconductor structure 100, a first functional layer 210, a second functional layer 220, a third functional layer 230, a first isolation structure 310, a second isolation structure 320 and a third isolation structure 330. Among them, the initial semiconductor structure 100 includes a barrier layer, and the bottom height of the first functional layer 210 is the same as the bottom height of the barrier layer. The first functional layer 210, the second functional layer 220 and the third functional layer 230 are stacked, the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 are stacked, and the top height of the first functional layer 210 is the same as the top height of the first isolation structure 310, the top height of the second functional layer 220 is the same as the top height of the second isolation structure 320, and the top height of the third functional layer 230 is the same as the top height of the third functional layer 230. The first isolation structure 310 , the second isolation structure 320 and the third isolation structure 330 constitute a deep trench isolation structure 300 , and the first functional layer 210 , the second functional layer 220 and the third functional layer 230 between two adjacent deep trench isolation structures 300 constitute an optoelectronic element 200 .

[0117] The image sensor has the following advantages: first, although the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 have a small depth-to-width ratio, the deep trench isolation structure 300 formed by their combination has a large depth-to-width ratio, which reduces the process difficulty of the image sensor; second, the deep trench isolation structure 300 finally formed can effectively reduce the crosstalk between adjacent photoelectric elements 200 due to its large depth-to-width ratio, thereby improving the photosensitivity of the image sensor; third, since the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 are formed by separate processes when manufacturing the image sensor, the deep trench isolation structure 300 is formed by the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330, which can effectively alleviate the problem of reaching the limits of lithography and etching when forming the deep trench isolation structure 300 when the image sensor size is very small.

[0118] Optionally, in a direction from the first isolation structure to the third isolation structure, the width of the deep trench isolation structure has a decreasing trend, so that the luminous flux of the incident light entering the photoelectric element can be increased.

[0119] Optionally, the materials of the first isolation structure, the second isolation structure and the third isolation structure all include elements of the third main group, which have better insulation effect and can reduce crosstalk between adjacent optoelectronic elements. Exemplarily, the first isolation material includes boron silicon, the second isolation material includes aluminum, and the third isolation material includes gallium silicon.

[0120] Optionally, the materials of the first functional layer, the second functional layer and the third functional layer all include elements of the fifth main group. Exemplarily, the material of the first functional layer includes silicon phosphide, the material of the second functional layer includes silicon arsenide, and the material of the third functional layer includes silicon antimonide.

[0121] The unexpected effect of the present application is that by providing an initial semiconductor structure 100 provided with a barrier layer, forming a first functional layer 210 on the barrier layer, and forming a plurality of first isolation structures 310 arranged at intervals in the first functional layer 210 and the first barrier layer, further forming a second functional layer 220 on the first functional layer 210, and forming a plurality of second isolation structures 320 arranged at intervals in the second functional layer 220, and finally forming a third functional layer 230 on the second functional layer 220, and forming a plurality of third isolation structures 330 arranged at intervals in the third functional layer 230, the aspect ratios of the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 are reduced while ensuring that the deep trench isolation structure 300 finally formed has a large aspect ratio, thereby reducing the difficulty of manufacturing the image sensor. In addition, the deep trench isolation structure 300 finally formed can effectively reduce the crosstalk between adjacent photoelectric elements 200 due to its large aspect ratio, thereby improving the photosensitivity of the image sensor. Furthermore, the method of forming the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 through separate processes and forming the deep trench isolation structure 300 by the first isolation structure 310, the second isolation structure 320 and the third isolation structure 330 can also effectively alleviate the problem of reaching the limits of lithography and etching when forming the deep trench isolation structure 300 when the image sensor size is very small.

[0122] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0123] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0124] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing an image sensor, characterized in that: include: Providing an initial semiconductor structure; wherein an outer surface layer on one side of the initial semiconductor structure is a barrier layer; forming a first functional layer on the barrier layer; A plurality of first grooves are formed in the first functional layer and the barrier layer; A first isolation material is deposited in the first groove to form a first isolation structure; the first isolation material includes boronized silicon; in a first direction, the width of the first isolation structure has a decreasing trend; the first direction is the direction in which the initial semiconductor structure points to the first isolation structure; the width of the first isolation structure is the size of the first isolation structure in a second direction, and the second direction is perpendicular to the first direction; forming a second functional layer on the first functional layer; A plurality of second grooves are formed in the second functional layer; the plurality of second grooves are arranged corresponding to the first isolation structure; A second isolation material is deposited in the second groove to form a second isolation structure; the second isolation structure and the first isolation structure are arranged correspondingly; the second isolation material includes aluminum; in the first direction, the width of the second isolation structure is the same or has a decreasing trend; forming a third functional layer on the second functional layer; A plurality of third grooves are formed in the third functional layer; the third grooves are arranged corresponding to the second isolation structures; A third isolation material is deposited in the third groove to form a third isolation structure; the third isolation structure and the second isolation structure are arranged correspondingly; the third isolation material includes gallium silicon; in the first direction, the width of the third isolation structure has a decreasing trend; The first isolation structure, the second isolation structure and the third isolation structure that are arranged correspondingly form a deep trench isolation structure, and a photoelectric element is formed between two adjacent deep trench isolation structures.

2. The method according to claim 1, characterized in that The method of providing an initial semiconductor structure comprises: Providing a substrate; wherein a plurality of shallow trench isolation structures corresponding to the deep trench isolation structures are formed in the substrate; An ion implantation process is used to form a barrier layer in the substrate; the barrier layer is in contact with the bottom of the shallow trench isolation structure; The substrate on one side of the barrier layer away from the shallow trench isolation structure is removed to expose the barrier layer, so as to form the initial semiconductor structure.

3. The method according to claim 1, characterized in that: The material of the barrier layer includes boron element.

4. The method according to claim 1, characterized in that: The method further comprises: forming an isolation gate on the deep trench isolation structure; A filter is formed between two adjacent isolation gates.

5. The method according to claim 4, characterized in that The step of forming an isolation gate on the deep trench isolation structure comprises: forming a first dielectric layer, a second dielectric layer and a third dielectric layer in sequence on the third functional layer; wherein the first dielectric layer, the second dielectric layer and the third dielectric layer are made of different materials; The first dielectric layer, the second dielectric layer and the third dielectric layer are etched to form a plurality of isolation gates arranged at intervals.

6. The method according to claim 4, characterized in that In a direction from the isolation gate to the deep trench isolation structure, the width of the isolation gate has a tendency to increase.

7. The method according to claim 4, characterized in that The filters include a blue light filter, a green light filter and a red light filter.

8. An image sensor, characterized in that: The image sensor is prepared by the method for preparing the image sensor according to any one of claims 1 to 7.

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