Solar cell, preparation method thereof and photovoltaic module

Abstract

The invention discloses a solar cell, a preparation method thereof and a photovoltaic module. The preparation method comprises the following steps: providing a substrate; forming a conductive layer on one side of the substrate; a passivation layer and a composite mask layer are formed on the side, away from the substrate, of the conductive layer, the passivation layer is provided with a plurality of first hollowed-out areas, the first hollowed-out areas are at least arranged at intervals in the preset direction, and the preset direction is parallel to the surface of the side, away from the substrate, of the conductive layer; the composite mask layer at least comprises a first sub-mask layer and a second sub-mask layer, the first sub-mask layer is provided with a plurality of second hollow-out areas, the second sub-mask layer is provided with a plurality of third hollow-out areas, the first hollow-out areas and the second hollow-out areas are in one-to-one correspondence, and the projections of the first hollow-out areas and the second hollow-out areas on the conductive layer are overlapped; the projection of the first hollow area on the conductive layer is located in the projection of the third hollow area on the conductive layer. The problem that the passivation layer is damaged in the process of patterned windowing of the passivation layer of the solar cell is solved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a solar cell sheet, a preparation method thereof, and a photovoltaic module. Background Art

[0002] A solar cell is a device that converts light energy into electrical energy. It converts sunlight into electrical energy through the photoelectric effect. It is a clean, renewable energy technology. When sunlight shines on the surface of the battery, the photon energy is absorbed by the battery and excites the electrons in the battery. The electrons jump to the conduction band to form electron-hole pairs. These electron-hole pairs separate under the action of the electric field, thereby generating current and completing the photoelectric conversion. Summary of the invention

[0003] The present application provides a solar cell, a preparation method thereof and a photovoltaic module to solve the problem in the related art that the solar cell may damage the passivation layer during the process of patterning and opening windows on the passivation layer.

[0004] According to one aspect of the present application, a method for preparing a solar cell is provided, comprising: providing a substrate; forming a conductive layer on one side of the substrate; forming a passivation layer and a composite mask layer on a side of the conductive layer facing away from the substrate, the passivation layer being located between the composite mask layer and the conductive layer, wherein: the passivation layer has a plurality of first hollow regions, the first hollow regions are arranged at intervals at least along a preset direction, the preset direction is parallel to a surface of the conductive layer facing away from the substrate; the composite mask layer comprises at least a first sub-mask layer and a second sub-mask layer, the first sub-mask layer is located between the second sub-mask layer and the passivation layer, the first sub-mask layer has a plurality of second hollow regions, the second sub-mask layer has a plurality of third hollow regions, the first hollow regions correspond one to one with the second hollow regions, and the projections of the first hollow regions and the second hollow regions on the conductive layer overlap, and the projection of the first hollow region on the conductive layer is located in the projection of the third hollow region on the conductive layer.

[0005] Optionally, the steps of forming a passivation layer and a composite mask layer include: forming a preliminary passivation layer on a side of the conductive layer facing away from the substrate; forming a first sub-mask layer on a side of the preliminary passivation layer facing away from the conductive layer, the first sub-mask layer having a plurality of second hollow regions; forming a second sub-mask layer on a side of the first sub-mask layer facing away from the substrate, the second sub-mask layer having a plurality of third hollow regions; performing a first patterning process on the preliminary passivation layer to obtain a plurality of first hollow regions.

[0006] Optionally, the steps of forming a first sub-mask layer and a second sub-mask layer include: forming a first sub-preparatory mask layer on a side of the preliminary passivation layer away from the conductive layer; forming a second sub-preparatory mask layer on a side of the first sub-preparatory mask layer away from the substrate; performing a second patterning treatment on the second sub-preparatory mask layer to form a plurality of third hollow areas; performing a third patterning treatment on the first sub-preparatory mask layer to form a plurality of second hollow areas, and the second patterning treatment and the third patterning treatment have different processes.

[0007] Optionally, the steps of forming a passivation layer and a composite mask layer include: forming a preliminary passivation layer on a side of the conductive layer away from the substrate; forming a first sub-mask layer on a side of the preliminary passivation layer away from the conductive layer, the first sub-mask layer having a plurality of second hollow regions; forming a second sub-preparatory mask layer on a side of the first sub-mask layer away from the substrate, the second sub-preparatory mask layer having a plurality of third preliminary hollow regions; performing a first patterning process on the preliminary passivation layer to obtain a plurality of first hollow regions; performing a fourth patterning process on the third preliminary hollow region to obtain a plurality of third hollow regions, the plurality of third hollow regions being distributed in a grid shape.

[0008] Optionally, the preparation method further includes: preparing electrode wires in the first hollow area, the third hollow area, and the second hollow area, wherein the electrode wires are electrically connected to the conductive layer.

[0009] Optionally, the preparation process of the electrode wire includes one of the following: electroplating and low-temperature sintering.

[0010] Optionally, the width of the third hollow area in a preset direction is 5 μm to 20 μm, and the preset direction is perpendicular to an extension direction of the third hollow area or an arrangement direction of the plurality of third hollow areas, and perpendicular to a thickness direction of the conductive layer.

[0011] According to another aspect of the present application, a solar cell is provided, which is prepared by a method for preparing a solar cell, and the solar cell comprises: a substrate; a conductive layer, located on one side of the substrate; a passivation layer, located on the side of the conductive layer facing away from the substrate, the passivation layer having a plurality of first hollowed-out areas, the first hollowed-out areas being arranged at intervals at least along a preset direction, the preset direction being parallel to the surface of the conductive layer facing away from the substrate; a composite mask layer, comprising at least a first sub-mask layer and a second sub-mask layer, the first sub-mask layer being located between the second sub-mask layer and the passivation layer, the second sub-mask layer having a plurality of third hollowed-out areas, the first sub-mask layer having a plurality of second hollowed-out areas, the first hollowed-out areas corresponding to the second hollowed-out areas one by one, and the projections of the first hollowed-out areas and the second hollowed-out areas on the conductive layer overlap, and the projection of the first hollowed-out areas on the conductive layer is located in the projection of the third hollowed-out areas on the conductive layer.

[0012] Optionally, the solar cell further includes electrode wires, which are located in the first hollow region, the third hollow region and the second hollow region and are electrically connected to the conductive layer.

[0013] According to another aspect of the present application, a photovoltaic assembly is provided, comprising a plurality of solar cells.

[0014] Through the preparation method of the solar cell of the present application, a drift layer, a conductive layer, a passivation layer and a composite mask layer are formed on the substrate, wherein the passivation layer is located between the composite mask layer and the substrate, and the composite mask layer includes a first sub-mask layer and a second sub-mask layer. The first hollow area in the passivation layer corresponds to the second hollow area of ​​the first sub-mask layer one by one, and the projections of the first hollow area and the second hollow area on the conductive layer have an overlapping area, and the projection of the first hollow area on the conductive layer is located in the projection of the third hollow area of ​​the second sub-mask layer on the conductive layer. The scheme of forming a composite mask layer in the battery can improve the corrosion resistance of the passivation layer during the patterning process of the passivation layer, protect the passivation layer to the maximum extent, and ensure the final grid line width requirement. The problem of solar cells damaging the passivation layer during the process of patterning the passivation layer window is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0016] Figure 1 A schematic diagram of the process structure of a method for preparing a solar cell provided in an embodiment of the present application is shown;

[0017] Figure 2 The cross-sectional structure diagram of the base body after providing a substrate and forming a conductive layer on the substrate in the method for preparing a solar cell of the present application is shown;

[0018] Figure 3 Shown in Figure 2 A schematic diagram of a cross-sectional structure of a substrate after a preliminary passivation layer, a first sub-preparatory mask layer and a second sub-preparatory mask layer are formed on the conductive layer formed in the process;

[0019] Figure 4 Shown in Figure 3 A schematic diagram of a cross-sectional structure of a substrate after a second hollow region and a third hollow region are respectively formed in a first sub-preparation mask layer and a second sub-preparation mask layer formed on a conductive layer formed in the process;

[0020] Figure 5 Shown in Figure 4A schematic diagram of the cross-sectional structure of the substrate after the second hollow region and the third hollow region are formed in the preliminary passivation layer, and the first hollow region is formed in the preliminary passivation layer;

[0021] Figure 6 It shows a Figure 4 and Figure 5 The shape of the hollowed-out area;

[0022] Figure 7 Shows another Figure 4 and Figure 5 The shape of the hollowed-out area;

[0023] Figure 8 Shows another Figure 4 and Figure 5 The shape of the hollowed-out area;

[0024] Fig. 9 Shown in Figure 3 A schematic diagram of a cross-sectional structure of a substrate after a second hollow region and a third hollow region are respectively formed in a first sub-preparation mask layer and a second sub-preparation mask layer on the conductive layer formed in the process;

[0025] Fig.10 Shown in Fig. 9 A schematic diagram of the cross-sectional structure of the substrate after the second hollow region and the third preliminary hollow region are formed in the preliminary passivation layer, the first hollow region is formed in the preliminary passivation layer, and the second sub-mask is patterned again to form the third hollow region in the third preliminary hollow region;

[0026] Fig.11 Shows Fig.10 The shape of the third hollow area in the figure.

[0027] The above drawings include the following reference numerals:

[0028] 10. substrate; 20. conductive layer; 30. passivation layer; 31. first hollow region; 32. preliminary passivation layer; 40. composite mask layer; 50. first sub-mask layer; 51. second hollow region; 52. first sub-preparatory mask layer; 60. second sub-mask layer; 61. third hollow region; 62. second sub-preparatory mask layer; 63. third preliminary hollow region. DETAILED DESCRIPTION

[0029] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0030] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] At present, solar cells use medium- and high-temperature silver paste for under-burning superimposed laser sintering technology or high-temperature silver paste to directly burn through the passivation layer to achieve the window effect, and use the laser melting effect to remove the insulating passivation layer to achieve the window effect. The silver paste route has high consumption and high cost, and requires a high-temperature sintering process. During the process, it will cause thermal damage to the battery, increase energy consumption, and is not compatible with the low-temperature metallization route. For film layers containing amorphous, poly, and microcrystalline, the instantaneous high temperature of laser ablation will cause them to crystallize, destroy the film structure, and cause roughening and melting of the film surface, with poor compatibility.

[0033] According to one aspect of the present application, Figure 1 As shown, a method for preparing a solar cell is provided, comprising:

[0034] Step S101: providing a substrate;

[0035] Step S102: forming a conductive layer on one side of the substrate;

[0036] Step S103: forming a passivation layer and a composite mask layer on the side of the conductive layer away from the substrate, the passivation layer is located between the composite mask layer and the conductive layer, wherein: the passivation layer has a plurality of first hollow areas, the first hollow areas are arranged at intervals at least along a preset direction, and the preset direction is parallel to the surface of the conductive layer away from the substrate; the composite mask layer includes at least a first sub-mask layer and a second sub-mask layer, the first sub-mask layer is located between the second sub-mask layer and the passivation layer, the first sub-mask layer has a plurality of second hollow areas, the second sub-mask layer has a plurality of third hollow areas, the first hollow areas correspond to the second hollow areas one by one, and the projections of the first hollow areas and the second hollow areas on the conductive layer overlap, and the projection of the first hollow areas on the conductive layer is located in the projection of the third hollow areas on the conductive layer.

[0037] Through the above-mentioned preparation method of solar cells, a drift layer, a conductive layer, a passivation layer and a composite mask layer are formed on the substrate, wherein the passivation layer is located between the composite mask layer and the substrate, and the composite mask layer includes a first sub-mask layer and a second sub-mask layer. The first hollow area in the passivation layer corresponds to the second hollow area of ​​the first sub-mask layer one by one, and the projections of the first hollow area and the second hollow area on the conductive layer have an overlapping area, and the projection of the first hollow area on the conductive layer is located in the projection of the third hollow area of ​​the second sub-mask layer on the conductive layer. The scheme of forming a composite mask layer in the battery can improve the corrosion resistance of the passivation layer during the patterning process of the passivation layer, protect the passivation layer to the maximum extent, and ensure the final grid line width requirements. The problem of solar cells damaging the passivation layer during the process of patterning the passivation layer window is solved.

[0038] First, if Figure 2 As shown, the above step S101 and step S102 are performed: providing a substrate 10 and forming a conductive layer 20 on one side of the above substrate 10 .

[0039] Specifically, the substrate can be a silicon substrate, and the thickness of the substrate can be 90μm to 150μm. After the battery manufacturing process is completed to the passivation layer, the passivation layer can be a single film layer or a composite film layer such as SiN, SiO and SiON, or a composite film layer superimposed with aluminum oxide, etc. The total thickness of the passivation layer can be 50nm to 200nm; the material of the conductive layer can be N-type doped silicon, P-type doped silicon, N-type doped polysilicon or P-type doped polysilicon, etc. Then, the above structure is annealed to improve the density of the passivation layer, reduce micro defects and impurity ions in the silicon wafer, enhance the passivation effect, and also improve its ability to resist potential induced degradation (PID).

[0040] After forming the conductive layer, as Figures 3 to 7 As shown, step S103 is performed: a passivation layer 30 and a composite mask layer 40 are formed on the side of the conductive layer 20 away from the substrate 10, and the passivation layer 30 is located between the composite mask layer 40 and the conductive layer 20, wherein: the passivation layer 30 has a plurality of first hollow regions 31, and the first hollow regions 31 are arranged at intervals at least along a preset direction, and the preset direction is parallel to the surface of the conductive layer 20 away from the substrate 10; the composite mask layer 40 includes at least a first sub-mask layer 50 and a second sub-mask layer 60, and the first The sub-mask layer 50 is located between the second sub-mask layer 60 and the passivation layer 30, the first sub-mask layer 50 has a plurality of second hollow areas 51, the second sub-mask layer 60 has a plurality of third hollow areas 61, the first hollow areas 31 correspond one to one with the second hollow areas 51, and the projections of the first hollow areas 31 and the second hollow areas 51 on the conductive layer 20 overlap, and the projection of the first hollow area 31 on the conductive layer 20 is located in the projection of the third hollow area 61 on the conductive layer 20.

[0041] In some optional embodiments, such as Figures 3 to 7 As shown, the steps of forming the passivation layer 30 and the composite mask layer 40 include: forming a preliminary passivation layer 32 on the side of the conductive layer 20 away from the substrate 10; forming a first sub-mask layer 50 on the side of the preliminary passivation layer 32 away from the conductive layer 20, the first sub-mask layer 50 having a plurality of second hollow regions 51; forming a second sub-mask layer 60 on the side of the first sub-mask layer 50 away from the passivation layer 30, the second sub-mask layer 60 having a plurality of third hollow regions 61; performing a first patterning process on the preliminary passivation layer 32 to obtain a plurality of the first hollow regions 31.

[0042] In the above optional implementation, if Figures 3 to 5 As shown, a conductive layer 20 is formed on a substrate 10, a preliminary passivation layer 32, a first sub-mask layer 50 having a second hollow region 51, and a second sub-mask layer 60 having a third hollow region 61 are formed on the conductive layer 20, and the preliminary passivation layer 32 is patterned according to the second hollow region 51 so that the preliminary passivation layer 32 forms a plurality of first hollow regions 31, thereby obtaining the passivation layer 30. Figures 6 to 8As shown, the first hollow area 31, the second hollow area 51 and the third hollow area 61 can be circular, rectangular and linear, the spacing between adjacent edges of the pattern is 3 to 20 μm, the process used for patterning can be photolithography and wet chemical etching, the chemicals used for wet chemical etching are HF, NH5F2, NH4F single solution or mixed solution, the concentration is 1% to 10%, and the immersion time is 1 to 60 minutes.

[0043] In some optional embodiments, such as Figure 3 and Figure 4 As shown, the steps of forming the above-mentioned first sub-mask layer 50 and the above-mentioned second sub-mask layer 60 include: forming a first sub-preparation mask layer 52 on the side of the above-mentioned preliminary passivation layer 32 away from the above-mentioned conductive layer 20; forming a second sub-preparation mask layer 62 on the side of the above-mentioned first sub-preparation mask layer 52 away from the above-mentioned substrate 10; performing a second patterning treatment on the above-mentioned second sub-preparation mask layer 62 to form a plurality of third hollow areas 61; performing a third patterning treatment on the above-mentioned first sub-preparation mask layer 52 to form a plurality of second hollow areas 51, and the processes of the above-mentioned second patterning treatment and the above-mentioned third patterning treatment are different.

[0044] In the above optional implementation, if Figure 3 As shown, the second hollow region and the third hollow region have the same pattern. A first sub-preparation mask layer 52 and a second sub-preparation mask layer 62 are formed on the preparatory passivation layer 32, and the second sub-preparation mask layer 62 is firstly subjected to a second patterning process, such as Figure 4 As shown, a first sub-mask layer 50 having a third hollowed-out area is obtained, the coating thickness of the second sub-preparatory mask layer 62 can be 5μm to 10μm, and the second patterning process can be an exposure and development process; then the first sub-preparatory mask layer is subjected to a third patterning process according to the third hollowed-out area 61 to obtain a second sub-mask layer 60 having a second hollowed-out area 51, the material of the first sub-preparatory mask layer is Cu and Al, etc., and the third patterning process can be PVD deposition, electron beam evaporation, thermal evaporation and other processes, and the whole surface is masked. The material of the second sub-preparatory mask layer can be: photoresist, photoresist and solder resist ink, and the deposition process can be a screen printing process, a spin coating process and a scraping process. The second patterning process and the third patterning process use different preparation processes, and the patterning process used closer to the passivation layer 30 is more gentle and easy to control, which reduces the damage to the passivation layer 30.

[0045] In some optional embodiments, such as Figures 9 to 11As shown, the steps of forming the passivation layer 30 and the composite mask layer 40 include: forming a preliminary passivation layer 32 on the side of the conductive layer 20 away from the substrate 10; forming a first sub-mask layer 50 on the side of the preliminary passivation layer 32 away from the conductive layer 20, the first sub-mask layer 50 having a plurality of second hollow regions 51; forming a second sub-preparatory mask layer on the side of the first sub-mask layer 50 away from the substrate 10, the second sub-preparatory mask layer having a plurality of third preliminary hollow regions 63; performing a first patterning process on the preliminary passivation layer to obtain a plurality of the first hollow regions 31; performing a fourth patterning process on the third preliminary hollow regions 63 to obtain a plurality of the third hollow regions 61, the plurality of the third hollow regions 61 being distributed in a grid shape.

[0046] In the above optional implementation, if Figures 9 and 10 As shown, the patterns of the hollow regions of the first sub-mask layer 50 and the second sub-mask layer 60 are different. The second sub-preparation mask layer has a plurality of third preparatory hollow regions 63, and the first sub-preparation mask layer is patterned according to the third preparatory hollow regions 63 to form the second hollow region 51. The second hollow region 51 and the third preparatory hollow region 63 have the same pattern, and the second sub-preparation mask layer is patterned so that adjacent third preparatory hollow regions 63 are connected to form the third hollow region 61. Fig.11 As shown, the third hollow area 61 is distributed in a grid shape.

[0047] In some optional embodiments, the preparation method further comprises: preparing electrode wires in the first hollow region, the third hollow region and the second hollow region, wherein the electrode wires are electrically connected to the conductive layer.

[0048] In the above optional implementation manner, electrode lines are formed in the first hollow area, the second hollow area and the third hollow area, and the electrode lines are electrically connected to the conductive layer through the above hollow areas.

[0049] In some optional embodiments, the preparation process of the electrode wire includes one of the following: electroplating and low-temperature sintering.

[0050] In the above optional implementation, the damage caused by electroplating and low-temperature sintering is small, and the solar cell prepared by the above preparation process has little damage to the passivation layer, thereby improving the corrosion resistance of the passivation layer during the patterning process.

[0051] In some optional embodiments, the width of the third hollow area in a preset direction is 5 μm to 20 μm, and the preset direction is perpendicular to the extension direction of the third hollow area or the arrangement direction of multiple third hollow areas, and perpendicular to the thickness direction of the conductive layer.

[0052] In the above optional implementation manner, by setting the width of the above third hollowed-out area to the above numerical range, the metallization line width of the prepared solar cell is small and the effect of light shielding is small.

[0053] A mask layer can also be formed on the conductive layer. For example, a conductive layer, a preliminary passivation layer and a preliminary mask layer are formed on the substrate. The process for preparing the preliminary mask layer can be a screen printing process, a spin coating process and a scraping process. The materials can be: photoresist, photoresist and solder resist ink. The preliminary mask layer can be etched by an exposure and development process to form a hollow area. According to the above-mentioned hollow area, a single solution or a mixed solution of HF, NH5F2, NH4F is used for etching to open a window in the preliminary passivation layer to form a hollow area, and then a non-high temperature sintering process such as electroplating or silver-clad copper is used to form an electrode in the hollow area, and the electrode is in contact with the conductive layer through the hollow area.

[0054] The technical solution of the present application can be used for full back electrode contact cells with busbar-free technology (0BB, Zero Busbar) or multi-busbar technology (MBB, MULTI-BUSBAR), full back electrode contact cells (IBC, Interdigitated Back Contact), full back contact cell solar cells (ABC, All Back Contact), composite passivated back contact cells (HPBC, Hybrid Passivated Back Contact), emitter back passivated cells (PERC, Passivated Emitter and Rear Cell), tunneling oxide passivated contact cells (TOPcon, Tnuuel Oxide Passivated contact), TOPcon-IBC cells, crystalline silicon heterojunction solar cells (HJT, Heterojunction with Intrinsic Thin-layer), perovskite stacked cells, flexible cells and other photovoltaic cells. Test the tunneling resistance or other arbitrary thin layer resistance.

[0055] According to another aspect of the present application, a solar cell is provided. Figure 5As shown, the solar cell is prepared by the above-mentioned preparation method of the solar cell, and the above-mentioned solar cell comprises: a substrate 10; a conductive layer 20, located on one side of the above-mentioned substrate 10; a passivation layer 30, located on the side of the above-mentioned conductive layer 20 away from the above-mentioned substrate 10, and the above-mentioned passivation layer 30 has a plurality of first hollow regions 31, and the above-mentioned first hollow regions 31 are arranged at intervals along at least a preset direction, and the above-mentioned preset direction is parallel to the surface of the above-mentioned conductive layer 20 away from the above-mentioned substrate 10; a composite mask layer 40, comprising at least a first sub-mask layer 50 and a second sub-mask layer 60, and the above The first sub-mask layer 50 is located between the second sub-mask layer 60 and the passivation layer 30, the second sub-mask layer 60 has a plurality of third hollow areas 61, the first sub-mask layer 50 has a plurality of second hollow areas 51, the first hollow areas 31 correspond to the second hollow areas 51 one by one, and the projections of the first hollow areas 31 and the second hollow areas 51 on the conductive layer 20 overlap, and the projection of the first hollow area 31 on the conductive layer 20 is located in the projection of the third hollow area 61 on the conductive layer 20.

[0056] The solar cell prepared by the above-mentioned solar cell preparation method has a composite film layer structure, and the scheme of forming a composite mask layer in the cell can improve the corrosion resistance of the passivation layer during the patterning process of the passivation layer, protect the passivation layer to the maximum extent, and ensure the final grid line width requirement. The problem of solar cells damaging the passivation layer during the process of patterning the passivation layer is solved.

[0057] In some optional embodiments, the solar cell sheet further includes electrode wires, and the electrode wires are located in the first hollow region, the third hollow region, and the second hollow region, and are electrically connected to the conductive layer.

[0058] In the above optional implementation, the material of the electrode line can be Ag and Cu, the line width is 5 to 80 μm, and the electrode line that forms ohmic contact with the conductive layer can be formed by non-high temperature sintering processes such as electroplating or silver-clad copper.

[0059] According to another aspect of the present application, a photovoltaic assembly is provided, comprising a plurality of the above-mentioned solar cells.

[0060] The preparation method of the TOPCon battery will be specifically described below in combination with specific embodiments and comparative examples.

[0061] Example 1

[0062] The present application provides a method for preparing a solar cell, comprising:

[0063] Providing a silicon-based substrate with a thickness of 100 μm;

[0064] Forming an N-type doped silicon conductive layer on the front side of the substrate with a thickness of 30 nm;

[0065] forming a preliminary passivation layer of SiN material on the conductive layer with a thickness of 50 nm;

[0066] Forming a first sub-preparation mask layer and a second sub-preparation mask layer on the preparatory passivation layer, wherein the first sub-preparation mask layer is made of Al with a thickness of 10 nm, and the second sub-preparation mask layer is made of photoresist with a thickness of 10 μm;

[0067] Applying an exposure and development process to the second preliminary sub-mask layer to form a second sub-mask layer having a plurality of spaced third hollow regions;

[0068] Using an electron beam evaporation process on the first preliminary sub-mask layer according to the third hollowed-out area to form a first sub-mask layer having a plurality of spaced second hollowed-out areas;

[0069] The prepared passivation layer is wet chemically etched according to the second hollow area and the third hollow area to form a passivation layer having a plurality of intervals of the first hollow area, the concentration of the chemical solution is 2%, and the immersion time is 10 minutes;

[0070] Electrode wires are prepared in the first hollow region, the second hollow region and the third hollow region by using a low temperature sintering process. The material of the electrode wires is Ag and the width is 20 μm.

[0071] The preparation process on the back side of the substrate is the same as above.

[0072] Example 2

[0073] The present application provides a method for preparing a solar cell, which is different from Example 1 in that the electrode wires are prepared by electroplating.

[0074] Comparative Example 1

[0075] A method for preparing a solar cell is provided. Based on Example 1, a low-temperature sintering process is not used, but a conventional screen printing process is used to prepare electrode lines.

[0076] Comparative Example 2

[0077] A method for preparing a solar cell is provided. The method differs from Example 1 in that a mask layer + wet chemical etching is not used. Instead, a laser is used to open the film in the area requiring patterning, and then a low-temperature slurry is directly printed on the passivation layer, and the electrode lines are prepared by a sintering process.

[0078] Comparative Example 3

[0079] A method for preparing a solar cell is provided, which is different from Example 1 in that a mask layer + wet chemical etching is not used, but a laser film is opened in the area requiring patterning, and then electrode lines are directly prepared by an electroplating process.

[0080] The performance of the solar cells prepared by the solar cell preparation methods in the above Examples 1 to 2 and Comparative Examples 1 to 3 was tested, and the test results are as follows:

[0081] Table 1

[0082]

[0083] From the above experimental data, it can be seen that the short-circuit current, rated capacity and open-circuit voltage of Examples 1 to 2 are higher than those of Comparative Examples 1 to 3, which shows that the embodiments in the present application can improve the output power and output capacity of the battery, and have a stronger ability to store electrical energy.

[0084] The preparation method of the back contact battery will be specifically described below in combination with specific embodiments and comparative examples.

[0085] Example 3

[0086] The present application provides a method for preparing a back contact battery, comprising:

[0087] Providing a silicon-based substrate with a thickness of 100 μm;

[0088] forming an N-type doped conductive layer on a portion of the back surface of the substrate, and forming a P-type doped conductive layer on another portion of the back surface of the substrate, wherein the thickness of the N-type doped conductive layer and the P-type doped conductive layer are both 30 nm;

[0089] forming a preliminary passivation layer of SiN material on the conductive layer with a thickness of 50 nm;

[0090] Forming a first sub-preparation mask layer and a second sub-preparation mask layer on the preparatory passivation layer, wherein the first sub-preparation mask layer is made of Al with a thickness of 10 nm, and the second sub-preparation mask layer is made of photoresist with a thickness of 10 μm;

[0091] Applying an exposure and development process to the second preliminary sub-mask layer to form a second sub-mask layer having a plurality of spaced third hollow regions;

[0092] Using an electron beam evaporation process on the first preliminary sub-mask layer according to the third hollowed-out area to form a first sub-mask layer having a plurality of spaced second hollowed-out areas;

[0093] The prepared passivation layer is wet chemically etched according to the second hollow area and the third hollow area to form a passivation layer having a plurality of intervals of the first hollow area, the concentration of the chemical solution is 2%, and the immersion time is 10 minutes;

[0094] Electrode wires are prepared in the first hollow region, the second hollow region and the third hollow region by using an electroplating process. The material of the electrode wires is Cu and the width is 120 μm.

[0095] A passivation layer and an anti-reflection layer are formed on the front side of the substrate, and the thickness of the passivation layer and the anti-reflection layer are both 10 nm.

[0096] Comparative Example 4

[0097] A method for preparing a back-contact battery is different from Example 4 in that a mask layer + etching solution is not used, and laser film opening is directly used, and then an electroplating process is used to prepare electrode lines.

[0098] Comparative Example 5

[0099] A method for preparing a back contact battery is different from Example 4 in that a high-temperature wire mesh sintering process is used to prepare electrode lines, and the line width of the electrode lines is 15 μm.

[0100] The performance of the solar cell prepared by the method for preparing the solar cell in the above-mentioned embodiment 3 and comparative examples 4 to 5 was tested, and the test results are as follows:

[0101] Table 2

[0102]

[0103] From the above experimental data, it can be seen that the photoelectric conversion efficiency, fill factor and open circuit voltage in Example 3 are higher than those in Comparative Examples 4 and 5, indicating that the photoelectric conversion efficiency of the battery in the present application is higher than that in the prior art, and the output capacity is stronger. The present application adopts a composite film layer process and a low-temperature electroplating process to significantly improve the corrosion resistance of the passivation layer during the patterning process, while protecting the passivation layer, it also ensures the gate line width, and improves the photoelectric conversion efficiency of the battery.

[0104] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0105] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0106] 1) The method for preparing solar cells of the present application adopts a scheme of forming a composite mask layer in the cell, which can improve the corrosion resistance of the passivation layer during the patterning process of the passivation layer, protect the passivation layer to the maximum extent, and ensure the final grid line width requirement. The problem of solar cells damaging the passivation layer during the process of patterning the passivation layer window is solved.

[0107] 2) The method for preparing the solar cell of the present application adopts electroplating and low-temperature sintering processes to reduce the damage caused when opening the passivation layer, thereby improving the cell efficiency of the solar cell.

[0108] 3) The solar cell preparation method of the present application sets the width of the electrode line within the range of 5 μm to 20 μm, so that the metallization line width of the solar cell is small, which has little effect on light shielding, thereby improving the photoelectric conversion efficiency of the cell.

[0109] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a solar cell, characterized in that: include: providing a substrate; forming a conductive layer on one side of the substrate; A passivation layer and a composite mask layer are formed on the side of the conductive layer away from the substrate, and the passivation layer is located between the composite mask layer and the conductive layer, wherein: the passivation layer has a plurality of first hollow areas, and the first hollow areas are arranged at intervals along at least a preset direction, and the preset direction is parallel to the surface of the conductive layer away from the substrate; the composite mask layer includes at least a first sub-mask layer and a second sub-mask layer, the first sub-mask layer is located between the second sub-mask layer and the passivation layer, the first sub-mask layer has a plurality of second hollow areas, the second sub-mask layer has a plurality of third hollow areas, the first hollow areas correspond to the second hollow areas one by one, and the projections of the first hollow areas and the second hollow areas on the conductive layer overlap, and the projection of the first hollow area on the conductive layer is located in the projection of the third hollow area on the conductive layer.

2. The preparation method according to claim 1, characterized in that: The steps of forming the passivation layer and the composite mask layer include: forming a preliminary passivation layer on a side of the conductive layer facing away from the substrate; forming a first sub-mask layer on a side of the preliminary passivation layer away from the conductive layer, wherein the first sub-mask layer has a plurality of second hollow regions; forming a second sub-mask layer on a side of the first sub-mask layer facing away from the substrate, wherein the second sub-mask layer has a plurality of third hollow regions; The preliminary passivation layer is subjected to a first patterning process to obtain a plurality of the first hollow regions.

3. The preparation method according to claim 2, characterized in that: The steps of forming the first sub-mask layer and the second sub-mask layer include: forming a first sub-preparation mask layer on a side of the preliminary passivation layer away from the conductive layer; forming a second sub-preparation mask layer on a side of the first sub-preparation mask layer facing away from the substrate; performing a second patterning process on the second preliminary sub-mask layer to form a plurality of third hollow regions; The first sub-preparation mask layer is subjected to a third patterning process to form a plurality of second hollow regions, and the second patterning process and the third patterning process are different in process.

4. The preparation method according to claim 2, characterized in that: The steps of forming the passivation layer and the composite mask layer include: forming a preliminary passivation layer on a side of the conductive layer facing away from the substrate; forming a first sub-mask layer on a side of the preliminary passivation layer away from the conductive layer, wherein the first sub-mask layer has a plurality of second hollow regions; forming a second sub-preparation mask layer on a side of the first sub-mask layer away from the substrate, wherein the second sub-preparation mask layer has a plurality of third preparatory hollow regions; Performing a first patterning process on the preliminary passivation layer to obtain a plurality of the first hollow regions; The third prepared hollowed-out area is subjected to a fourth patterning process to obtain a plurality of the third hollowed-out areas, and the plurality of the third hollowed-out areas are distributed in a grid shape.

5. The preparation method according to claim 4, characterized in that: The preparation method further comprises: Electrode wires are prepared in the first hollow region, the third hollow region and the second hollow region, and the electrode wires are electrically connected to the conductive layer.

6. The preparation method according to claim 5, characterized in that: The preparation process of the electrode wire includes one of the following: electroplating and low-temperature sintering.

7. The preparation method according to claim 1, characterized in that: The width of the third hollow region in a preset direction is 5 μm to 20 μm, and the preset direction is perpendicular to an extension direction of the third hollow region or an arrangement direction of a plurality of the third hollow regions, and perpendicular to a thickness direction of the conductive layer.

8. A solar cell, characterized in that: The solar cell is prepared by the method for preparing a solar cell according to any one of claims 1 to 7, wherein the solar cell comprises: substrate; A conductive layer, located on one side of the substrate; a passivation layer, located on a side of the conductive layer away from the substrate, the passivation layer having a plurality of first hollow regions, the first hollow regions being arranged at intervals at least along a preset direction, the preset direction being parallel to a surface of the conductive layer away from the substrate; A composite mask layer comprises at least a first sub-mask layer and a second sub-mask layer, wherein the first sub-mask layer is located between the second sub-mask layer and the passivation layer, the first sub-mask layer has a plurality of second hollow regions, the second sub-mask layer has a plurality of third hollow regions, the first hollow regions correspond to the second hollow regions one by one, and the projections of the first hollow regions and the second hollow regions on the conductive layer overlap, and the projection of the first hollow region on the conductive layer is located in the projection of the third hollow region on the conductive layer.

9. The solar cell according to claim 8, characterized in that: The solar cell sheet further includes electrode wires, which are located in the first hollow area, the third hollow area, and the second hollow area and are electrically connected to the conductive layer.

10. A photovoltaic module, characterized in that: The invention comprises a plurality of solar cells according to any one of claims 8 to 9.

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