Field programmable gate array (FPGA)-based radiation-resistant holder camera system

Abstract

The invention relates to the technical field of radiation-resistant electronics, in particular to a radiation-resistant pan-tilt camera system based on an FPGA (Field Programmable Gate Array). The system comprises a holder, a camera, a driving circuit, an irradiation-resistant reinforced SRAM type FPGA, a current sensor, an encoder and a remote control end. The image acquisition and processing module and the motor feedback control module adopt a triple redundancy design; the holder control and calculation module supports selection of a single-mode redundancy circuit and a triple-mode redundancy circuit. The system is good in anti-radiation performance, rapid and accurate in holder control, and high in reliability and stability.

Description

Technical Field

[0001] The invention relates to the field of radiation-resistant electronic technology, and in particular to a radiation-resistant pan-tilt camera system based on FPGA. Background Art

[0002] The nuclear industry is a key industrial field that places extremely high demands on the reliability and fault tolerance of the PTZ monitoring system, and needs to ensure the safety, stability and efficiency of its operation. There are challenges of high radiation environments near the production and processing of key nuclear industrial facilities. For example, inside and around nuclear reactors, there are radiation sources, radiation particles and radiation energy, which can cause serious interference and damage to equipment and electronic systems. At the same time, there are also challenges of high precision, rapid response and diversified scenario applications near key facilities. For example, there are tasks in the application scenarios of key nuclear industrial facilities that require rapid response and high-precision control of the PTZ, such as nuclear fuel loading and unloading, radiation monitoring and equipment maintenance.

[0003] The electronic components and design structures used in ordinary monitoring PTZ systems cannot withstand the radiation environment near key nuclear industrial facilities. Under the radiation, the electronic components of the PTZ system are easily damaged irreversibly, causing them to fail to work properly, and the failure rate and maintenance requirements increase sharply, affecting the operating efficiency and safety of nuclear power plants. In addition, traditional PTZ systems generally use microcontrollers as the main controllers of the motors, and their response speed cannot meet the response speed and accuracy requirements of nuclear industrial facilities. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a radiation-resistant pan-tilt camera system based on FPGA, which has good radiation resistance, fast and accurate pan-tilt control, and high reliability and stability.

[0005] The present invention provides a radiation-resistant pan-tilt camera system based on FPGA, comprising: a pan-tilt, a camera, a driving circuit, a radiation-resistant reinforced SRAM type FPGA, a current sensor, an encoder, and a remote control terminal;

[0006] The radiation-resistant reinforced SRAM FPGA receives and feeds back commands from the remote control terminal, and sends a control signal to the drive circuit after performing calculations based on the results of command analysis;

[0007] The radiation-resistant reinforced SRAM FPGA includes an image acquisition and processing module, a pan / tilt control and calculation module, and a motor feedback control module;

[0008] The image data output by the camera's image sensor is directly connected to the image acquisition and processing module;

[0009] The driving circuit is connected to the pan / tilt motor, and the pan / tilt motor is connected to the camera to drive the camera to rotate;

[0010] The current sensor is connected to the pan-tilt head to detect the current when the motor of the pan-tilt head rotates, and the detection result is input into the pan-tilt head control and calculation module;

[0011] The encoder is connected to the camera to detect the position information of the current camera after rotation, and the detection result is input into the pan / tilt control and calculation module;

[0012] The PTZ control and calculation module determines the target position or target angle that the PTZ needs to reach according to the target position or angle set in the instruction, compares the detection results of the received flow sensor and encoder with the target position or target angle, and outputs the calculation results to the motor feedback control module;

[0013] The motor feedback control module feeds back the results of speed and current feedback regulation to the PTZ motor through the drive circuit;

[0014] The image acquisition and processing module and the motor feedback control module adopt a triple redundancy design;

[0015] The PTZ control and computing module supports the selection of single-mode and triple-mode redundant circuits.

[0016] In a specific embodiment of the present invention, the image acquisition and processing module includes an image sensor control module, an image data acquisition module, a central controller, a standard image format output module, a cache module, an image processing module, and the central controller uniformly controls other modules;

[0017] The image data acquisition module is connected to the cache module, the cache module is connected to the image processing module, the image processing module is connected to the standard image format output module, and finally outputs to the interface protocol module;

[0018] The image sensor control module drives the image sensor to transmit the image data of the camera to the radiation-resistant reinforced SRAM type FPGA, and the image data acquisition module reorganizes the original image input by the image sensor and then inputs it to the cache module;

[0019] The image processing module reads the image in the buffer module, converts it into an image through the standard image format output module, and then outputs it to the remote control terminal.

[0020] In a specific embodiment of the present invention, the image processing module divides the input pixel points of the image into a plurality of small blocks or rows.

[0021] Multiple rows are connected in series, with pixel data outputted simultaneously at the end of each row for reorganization to allow parallel processing on a radiation-hardened SRAM FPGA;

[0022] Multiple parallel processing units process simultaneously, with each processing unit responsible for performing image processing operations on an image block or row;

[0023] Each processing unit executes the same image processing algorithm for one image block or row, and uses the parallel computing capability of the radiation-hardened SRAM FPGA to process multiple image blocks or rows simultaneously;

[0024] By using the data channels, caches and control signals inside the radiation-resistant FPGA to implement data transmission and synchronization mechanisms, data transmission and processing synchronization between parallel processing units.

[0025] In a specific embodiment of the present invention, the PTZ control and calculation module includes a delay control unit t1-tN, triggers FF0-FF2, a control and calculation unit and an interface protocol unit;

[0026] The pan-tilt control and calculation module receives the external input clock CLK, enable signal Enable and mode selection signal ModeSel; according to the different line delay differences of each module in the triple module, different delay control units t1-tN are configured, so that the signal delays of the triggers FF0-FF2 reaching each module of the triple module are the same, and the clock and enable signals are synchronized; the control and calculation unit calculates according to the output signals of the triggers FF0-FF2, and the calculation results are sent to the voting logic circuit through the interface protocol processing unit. The voting logic circuit uses majority voting to compare and make decisions on the outputs of a main module and two replica modules; the output selection circuit selects the final output according to the voting results.

[0027] In a specific embodiment of the present invention, the radiation-resistant reinforced SRAM FPGA also includes a fault detection module for detecting faults between triple modules. If a fault is detected, the faulty module copy is switched to a normal copy through a multiplexer switching circuit, and the voting logic circuit performs an XOR operation based on the calculation results of each module. The result is fed back to the module according to the selector for selection and voting output.

[0028] In a specific embodiment of the present invention, the radiation-resistant reinforced SRAM FPGA is divided into three fixed interval areas, each of which contains a certain number of basic logic units; the modules that require triple redundancy design are respectively implemented in the three interval areas, and logic locking is performed after synthesis and layout and routing are completed;

[0029] With the same operation, the image processing and acquisition module and the motor feedback control module are designed with triple redundancy.

[0030] The image processing and acquisition module includes a main module and two replica modules;

[0031] The motor feedback control module includes a main module and two replica modules;

[0032] The master module and the replica modules are connected in the same order and perform the same tasks in parallel;

[0033] Each replica module provides the same clock signal and control signals.

[0034] Compared with the prior art, the radiation-resistant pan / tilt camera system based on FPGA of the present invention has the following beneficial effects:

[0035] (1) In the present invention, based on the radiation-resistant reinforced SRAM type FPGA and the redundant FPGA internal module design, the radiation resistance and fault tolerance of the pan-tilt camera system are improved, the probability of system failure is reduced, and the stability and reliability of the operation of the pan-tilt camera system are improved.

[0036] (2) In the present invention, thanks to the fast response capability of the radiation-resistant reinforced SRAM FPGA, the pan-tilt camera system has excellent real-time performance, can quickly respond to control instructions, achieve precise position and motion control, and improve the control accuracy and stability of the pan-tilt in the radiation environment.

[0037] (3) In the present invention, by utilizing the parallel computing capability and real-time image processing capability of the radiation-hardened SRAM FPGA, efficient motion control algorithms and real-time image processing algorithms can be implemented at the hardware level. This can greatly improve the response speed of the PTZ camera system, enabling it to process real-time image data more quickly.

[0038] (4) In the present invention, through the configurable system architecture and flexible module design, the pan-tilt camera system can be flexibly applied in different tasks and working scenarios to adapt to different application requirements and environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 It represents the framework of the radiation-resistant PTZ camera system based on FPGA;

[0040] Figure 2 It represents the radiation-resistant FPGA PTZ control and computing module;

[0041] Figure 3 Represents part of the control link of the radiation-tolerant PTZ camera system;

[0042] Figure 4 Represents the image acquisition and processing module;

[0043] Figure 5 Represents a flowchart of the image processing process;

[0044] Figure 6It represents the layout distribution diagram after the logic of triple module redundancy module in radiation-resistant hardened SRAM FPGA is locked;

[0045] Figure 7 Represents the voting logic circuit. DETAILED DESCRIPTION

[0046] In order to further understand the present invention, the embodiments of the present invention are described below in conjunction with examples, but it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the present invention.

[0047] The embodiment of the present invention discloses a radiation-resistant pan-tilt camera system based on FPGA, such as Figure 1 As shown, it includes: pan / tilt, camera, drive circuit, radiation-resistant reinforced SRAM FPGA, current sensor, encoder, and remote control terminal;

[0048] The radiation-resistant reinforced SRAM FPGA receives and feeds back commands from the remote control terminal, and sends a control signal to the drive circuit after performing calculations based on the results of command analysis;

[0049] The radiation-resistant reinforced SRAM FPGA includes an image acquisition and processing module, a pan / tilt control and calculation module, and a motor feedback control module;

[0050] The image data output by the camera's image sensor is directly connected to the image acquisition and processing module;

[0051] The driving circuit is connected to the pan / tilt motor, and the pan / tilt motor is connected to the camera to drive the camera to rotate; the horizontal rotation direction of the camera is 0° to 360° left and right, and the pitch rotation direction is -90° to 90°;

[0052] The current sensor is connected to the pan-tilt head to detect the current when the motor of the pan-tilt head rotates, and the detection result is input into the pan-tilt head control and calculation module;

[0053] The encoder is connected to the camera to detect the position information of the current camera after rotation, and the detection result is input into the pan / tilt control and calculation module;

[0054] The PTZ control and calculation module determines the target position or target angle that the PTZ needs to reach according to the target position or angle set in the instruction, compares the detection results of the received flow sensor and encoder with the target position or target angle, calculates the error value, and outputs the calculation result to the motor feedback control module;

[0055] The motor feedback control module feeds back the results of the feedback adjustment of the speed and current to the pan / tilt motor through the drive circuit, and controls the speed of the pan / tilt motor by appropriately adjusting the duty cycle;

[0056] The PTZ control and calculation module includes a delay control unit t1-tN, triggers FF0-FF2, a control and calculation unit and an interface protocol unit. Figure 2 As shown;

[0057] The pan / tilt control and calculation module receives the external input clock CLK, enable signal Enable and mode selection signal ModeSel; configures different delay control units t1-tN according to the different line delay differences of each module in the triple module, so that the signal delay reaching the trigger FF0-FF2 of each module of the triple module is the same, and the clock and enable signal are synchronized;

[0058] The pan-tilt control and computing module supports the selection of single-mode and triple-mode redundant circuits, which is determined by the mode selection signal ModeSel. In the case of single mode, the clocks and enable signals of the other two replica modules will be turned off to save power consumption and reduce heat. At the same time, the single mode has an independent data output port.

[0059] In the case of triple-module redundancy, the control and calculation unit performs calculations based on the output signals of triggers FF0-FF2, and the calculation results are sent to the voting logic circuit through the interface protocol processing unit. The voting logic circuit uses majority voting to compare and decide on the outputs of a main module and two replica modules; the output selection circuit selects the final output based on the voting results.

[0060] The image acquisition and processing module and the motor feedback control module adopt a triple redundancy design;

[0061] The image acquisition and processing module is as follows Figure 4 As shown, it includes an image sensor control module, an image data acquisition module, a central controller, a standard image format output module, a cache module, an image processing module, and the central controller uniformly controls other modules;

[0062] The image data acquisition module is connected to the cache module, the cache module is connected to the image processing module, the image processing module is connected to the standard image format output module, and finally outputs to the interface protocol module;

[0063] The image sensor control module drives the image sensor to transmit the image data of the camera to the radiation-resistant reinforced SRAM type FPGA, and the image data acquisition module reorganizes the original image input by the image sensor and then inputs it to the cache module;

[0064] The image processing module reads the image in the buffer module, converts it into an image through the standard image format output module, and then outputs it to the remote control terminal.

[0065] The image processing module divides the input pixels of the image into multiple small blocks or rows, for example Figure 5 As shown, line buffer #1 to line buffer #K are connected in series, and pixel data is simultaneously output at the end of each line buffer for data reorganization so as to be processed in parallel on a radiation-hardened SRAM FPGA. The size of the pixel row division is adjusted according to the requirements of the FPGA resources and the image processing algorithm.

[0066] Multiple parallel processing units process simultaneously, and each processing unit is responsible for performing image processing operations on an image block or row; the processing operations include filtering, edge detection, feature extraction, etc.;

[0067] Each processing unit executes the same image processing algorithm for one image block or row, and uses the parallel computing capability of the radiation-resistant hardened SRAM FPGA to process multiple image blocks or rows simultaneously;

[0068] By using the data channels, caches and control signals inside the radiation-resistant hardened SRAM FPGA to implement data transmission and synchronization mechanisms, data transmission and processing synchronization between parallel processing units.

[0069] The radiation-resistant reinforced SRAM FPGA is divided into three fixed spacing areas, each spacing area contains a certain number of basic logic units (LABs); the modules that require triple redundant design are implemented in the three spacing areas respectively, and logic lock is performed after synthesis and layout and routing are completed;

[0070] In the same operation, the image processing and acquisition module and the motor feedback control module are designed with triple redundancy. The image processing and acquisition module includes a main module and two replica modules; the motor feedback control module includes a main module and two replica modules; Figure 6 As shown, M×N LAB Logic A1 is the main module of the image processing and acquisition module, A2 and A3 are two copies of the image processing and acquisition module. M×N LAB Logic B1 is the main module of the motor feedback control module, B2 and B3 are two copies of the motor feedback control module;

[0071] The main module and the replica modules are connected in the same order and execute the same tasks in parallel, ensuring that the input and initial state of each module are the same, achieving consistency in processing and results;

[0072] Each replica module is provided with the same clock signal and control signals to ensure that they start and end calculation at the same time.

[0073] If any of the primary and replica modules are affected by errors caused by irradiation, the other two modules can detect and correct the errors through voting.

[0074] If the voting results are consistent, then the result is selected as the final output. If the voting results are inconsistent, the output selection needs to be made based on the majority decision logic.

[0075] Voting is done based on the majority principle, that is, the result that appears most times in the output of the main module and the replica module is taken as the final output.

[0076] The radiation-resistant reinforced SRAM FPGA also includes a fault detection module for detecting faults between the three modules. If a fault is detected, the faulty replica module is switched to a normal replica through a multiplexer switching circuit. The voting logic circuit performs an XOR operation based on the calculation results of each module, and the result is fed back to the module according to the selector for selection and voting output. The voting logic circuit is as follows Figure 7 shown.

[0077] The pan-tilt motor, current sensor, encoder, drive circuit, pan-tilt control and calculation module, and motor feedback control module constitute a feedback control link, such as Figure 3 shown.

[0078] During the movement of the PTZ motor, the encoder will detect the position, the current sensor will detect the current, and then pass through the first filter shaping circuit and the second filter shaping circuit respectively, and then output to the radiation-resistant reinforced SRAM FPGA for A / D conversion calculation and position calculation. The calculated current current (I) and current position (S) are input into the PTZ control and calculation module, which determines the target position or target angle that the PTZ needs to reach according to the target position or angle set in the instruction.

[0079] The feedback control voltage (Vfb) and feedback control current (Ifb) calculated by the PTZ control and calculation module are output to the motor drive control module. The speed setting in the motor drive control module is multiplied by the feedback control voltage (Vfb). The result is used to adjust the speed and then multiplied by the feedback control current (Ifb). The final result is converted into PWM output, such as Figure 3 shown.

[0080] The result of the motor drive control module is input to the selector for output selection, and then acts on the drive circuit, which drives the motor to rotate.

[0081] The present invention has the following advantages:

[0082] (1) The PTZ camera system uses radiation-resistant reinforced SRAM FPGA and redundant design, including triple module redundancy, reconfiguration redundancy and hardware redundancy. Through multiple independently working modules, redundant computing and redundant control are realized to reduce the impact of radiation on the PTZ camera system, improve the system's fault tolerance and availability, and protect the system's internal circuits and components from failures or performance damage caused by radiation.

[0083] (2) Utilizing the programmable characteristics of radiation-hardened SRAM FPGA, a flexible and reconfigurable gimbal camera control and computing system was designed for use in irradiation environments. The system can flexibly adapt to the diverse application scenarios of the nuclear industry, including motor drive modules, sensor data processing modules, image acquisition and processing modules, etc.

[0084] (3) Utilize the fast computing power of radiation-hardened SRAM FPGA to achieve fast execution of real-time control algorithms. These algorithms include position control, feedback control, etc., to ensure accurate positioning and smooth movement of the PTZ camera system in radiation environments, while ensuring the system's response speed and control accuracy.

[0085] (4) By utilizing the parallel computing power and real-time image processing capabilities of the radiation-resistant hardened SRAM FPGA, efficient motion control algorithms and real-time image processing algorithms can be implemented in radiation environments, thereby improving the processing speed of the pan-tilt control system and enabling it to process real-time image data faster.

[0086] The above embodiments are only used to help understand the method and core idea of ​​the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

[0087] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A radiation-resistant PTZ camera system based on FPGA, characterized in that: include: PTZ, camera, drive circuit, radiation-resistant reinforced SRAM FPGA, current sensor, encoder, remote control terminal; The radiation-resistant reinforced SRAM FPGA receives and feeds back commands from the remote control terminal, and sends a control signal to the drive circuit after performing calculations based on the results of command analysis; The radiation-resistant reinforced SRAM FPGA includes an image acquisition and processing module, a pan / tilt control and calculation module, and a motor feedback control module; The image data output by the camera's image sensor is directly connected to the image acquisition and processing module; The driving circuit is connected to the pan / tilt motor, and the pan / tilt motor is connected to the camera to drive the camera to rotate; The current sensor is connected to the pan-tilt head to detect the current when the motor of the pan-tilt head rotates, and the detection result is input into the pan-tilt head control and calculation module; The encoder is connected to the camera to detect the position information of the current camera after rotation, and the detection result is input into the pan / tilt control and calculation module; The PTZ control and calculation module determines the target position or target angle that the PTZ needs to reach according to the target position or angle set in the instruction, compares the detection results of the received flow sensor and encoder with the target position or target angle, and outputs the calculation results to the motor feedback control module; The motor feedback control module feeds back the results of speed and current feedback regulation to the PTZ motor through the drive circuit; The image acquisition and processing module and the motor feedback control module adopt a triple redundancy design; The PTZ control and computing module supports the selection of single-mode and triple-mode redundant circuits.

2. The FPGA-based radiation-resistant PTZ camera system according to claim 1, characterized in that: The image acquisition and processing module includes an image sensor control module, an image data acquisition module, a central controller, a standard image format output module, a cache module, an image processing module, and the central controller uniformly controls other modules; The image data acquisition module is connected to the cache module, the cache module is connected to the image processing module, the image processing module is connected to the standard image format output module, and finally outputs to the interface protocol module; The image sensor control module drives the image sensor to transmit the image data of the camera to the radiation-resistant reinforced SRAM type FPGA, and the image data acquisition module reorganizes the original image input by the image sensor and then inputs it to the cache module; The image processing module reads the image in the buffer module, converts it into an image through the standard image format output module, and then outputs it to the remote control terminal.

3. The FPGA-based radiation-resistant PTZ camera system according to claim 2, characterized in that: The image processing module divides the input pixels of the image into a plurality of small blocks or rows. Multiple rows are connected in series, with pixel data outputted simultaneously at the end of each row for reorganization to allow parallel processing on a radiation-hardened SRAM FPGA; Multiple parallel processing units process simultaneously, with each processing unit responsible for performing image processing operations on an image block or row; Each processing unit executes the same image processing algorithm for one image block or row, and uses the parallel computing capability of the radiation-hardened SRAM FPGA to process multiple image blocks or rows simultaneously; By using the data channels, caches and control signals inside the radiation-resistant FPGA to implement data transmission and synchronization mechanisms, data transmission and processing synchronization between parallel processing units.

4. The FPGA-based radiation-resistant PTZ camera system according to claim 1, characterized in that: The PTZ control and calculation module includes a delay control unit t1-tN, triggers FF0-FF2, a control and calculation unit and an interface protocol unit; The pan / tilt control and calculation module receives the external input clock CLK, enable signal Enable and mode selection signal ModeSel; according to the different line delay differences of each module in the triple module, different delay control units t1-tN are configured, so that the signal delays of the triggers FF0-FF2 reaching each module of the triple module are the same, and the clock and enable signals are synchronized; the control and calculation unit calculates according to the output signals of the triggers FF0-FF2, and the calculation results are sent to the voting logic circuit through the interface protocol processing unit, and the voting logic circuit uses majority voting to compare and make decisions on the outputs of a main module and two replica modules; The output selection circuit selects the final output based on the voting results.

5. The FPGA-based radiation-resistant PTZ camera system according to claim 4, characterized in that: The radiation-resistant reinforced SRAM FPGA also includes a fault detection module for detecting faults between triple modules. If a fault is detected, the faulty module copy is switched to a normal copy through a multiplexer switching circuit, and the voting logic circuit performs an XOR operation based on the calculation results of each module. The result is fed back to the module according to the selector for selection and voting output.

6. The FPGA-based radiation-resistant PTZ camera system according to claim 1, characterized in that: The radiation-resistant reinforced SRAM FPGA is divided into three fixed interval areas, each of which contains a certain number of basic logic units; the modules that require triple redundant design are implemented in the three interval areas respectively, and logic locking is performed after synthesis and layout and routing are completed; With the same operation, the image processing and acquisition module and the motor feedback control module are designed with triple redundancy. The image processing and acquisition module includes a main module and two replica modules; The motor feedback control module includes a main module and two replica modules; The master module and the replica modules are connected in the same order and perform the same tasks in parallel; Each replica module provides the same clock signal and control signals.

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