EMI value test method, system and device of LPDDR chip and storage medium

Abstract

The invention discloses an EMI value testing method, system and device of an LPDDR chip and a storage medium. The method comprises the steps that the first storage capacity of the LPDDR chip is acquired; obtaining a second storage capacity of the LPDDR chip; comparing the first storage capacity and the second storage capacity with a preset storage capacity to obtain a first comparison result; obtaining a first EMI value and a second EMI value according to the first comparison result, the first storage table and the second storage table; and determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value. According to the method, the storage capacity of the two Ranks in the whole LPDDR chip is comprehensively and specifically detected, and the corresponding first EMI value and the second EMI value are obtained according to the storage capacity, so that the EMI value of the LPDDR chip is accurately tested, the LPDDR chip is accurately initialized, and the stability of the LPDDR chip is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of memory testing, and in particular to an EMI value testing method, system, device and storage medium for an LPDDR chip. Background Art

[0002] LPDDR (Low-Power Double Data Rate SDRAM) is a memory device used in mobile devices, IoT devices and other electronic devices with strict power consumption requirements. While meeting the device's requirements for memory capacity and performance, it focuses on reducing power consumption and extending the device's battery life.

[0003] Existing LPDDR chips are usually designed with a dual-channel architecture, that is, one LPDDR chip includes two channels (that is, dual ranks), and the two channels (ranks) are independently stored and accessed. Before initialization, the LPDDR chip needs to obtain the EMI (External Memory Interface) value, so as to initialize the LPDDR chip according to the EMI value. When the existing technology tests the EMI value of the LPDDR chip, it is usually based on the total storage capacity of the LPDDR chip, and can only test the EMI value corresponding to the capacity below 12GB. Therefore, the test of the EMI value of different ranks is prone to errors, resulting in errors in the initialization configuration, thereby affecting the stability of the LPDDR chip. Summary of the invention

[0004] In view of this, an object of an embodiment of the present invention is to provide an EMI value testing method, system, device and storage medium for an LPDDR chip, which can accurately test the EMI value of the LPDDR chip, thereby accurately initializing the LPDDR chip and improving the stability of the LPDDR chip.

[0005] In a first aspect, an embodiment of the present invention provides an EMI value testing method for an LPDDR chip, comprising: Acquire a first storage capacity of the LPDDR chip, where the first storage capacity represents a storage capacity corresponding to the first Rank; Acquire a second storage capacity of the LPDDR chip, where the second storage capacity represents a storage capacity corresponding to the second Rank; Comparing the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; Acquire a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; An LPDDR chip EMI value is determined according to the first EMI value and the second EMI value.

[0006] In some optional embodiments, acquiring the first EMI value and the second EMI value according to the first comparison result, the first storage table and the second storage table includes: When the first comparison result indicates that the first storage capacity is greater than the preset storage capacity, obtaining the first EMI value through the first storage table; When the first comparison result indicates that the second storage capacity is greater than the preset storage capacity, obtaining the second EMI value through the first storage table; When the first comparison result indicates that the first storage capacity is less than or equal to the preset storage capacity, acquiring the first EMI value through the second storage table; When the first comparison result indicates that the second storage capacity is less than or equal to the preset storage capacity, the second EMI value is acquired through the second storage table.

[0007] In some optional embodiments, the method further includes: When the first comparison result indicates that the first storage capacity and the second storage capacity are both less than or equal to the preset storage capacity, comparing the first storage capacity and the second storage capacity to obtain a second comparison result; When the second comparison result indicates that the first storage capacity and the second storage capacity are equal, acquiring the first EMI value and the second EMI value through the second storage table; When the second comparison result indicates that the first storage capacity and the second storage capacity are not equal, the first EMI value and the second EMI value are acquired through the first storage table.

[0008] In some optional embodiments, acquiring the first EMI value or the second EMI value through the first storage table, and acquiring the first EMI value or the second EMI value through the second storage table includes: Acquire the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and calculate the first EMI value or the second EMI value according to the first parameter value; The second parameter value is acquired in the second storage table according to the first storage capacity or the second storage capacity, and the first EMI value or the second EMI value is calculated according to the second parameter value.

[0009] In some optional embodiments, determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value includes: Obtaining a first weighting coefficient corresponding to the first EMI value and a second weighting coefficient corresponding to the second EMI value; The LPDDR chip EMI value is calculated according to the first EMI value, the first weighting coefficient, the second EMI value and the second weighting coefficient.

[0010] In some optional embodiments, acquiring the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and acquiring the second parameter value in the second storage table according to the first storage capacity or the second storage capacity includes: Obtaining a first table range of the first storage table according to the first storage capacity or the second storage capacity; Configuring the parameter corresponding to the first table range as the first parameter value, wherein the first parameter value indicates a corresponding EMI value; Obtaining a second table range of the second storage table according to the first storage capacity or the second storage capacity; The parameter corresponding to the second table range is configured as the second parameter value, and the second parameter value indicates the corresponding EMI value.

[0011] In some optional embodiments, before determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value, the method further includes: Get the working mode of LPDDR chip; When the working mode indicates a single-channel mode, the first EMI value corresponding to the first Rank that is not working is set to zero, or the second EMI value corresponding to the second Rank that is not working is set to zero; When the working mode indicates a dual-channel mode, obtaining an interference coefficient between the first Rank and the second Rank; The first EMI value and the second EMI value are corrected according to the interference coefficient.

[0012] In a second aspect, an embodiment of the present invention provides an EMI value test system for an LPDDR chip, comprising: A first module is used to obtain a first storage capacity of the LPDDR chip, where the first storage capacity represents a storage capacity corresponding to a first Rank; The second module is used to obtain a second storage capacity of the LPDDR chip, where the second storage capacity represents the storage capacity corresponding to the second Rank; A third module, configured to compare the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; a fourth module, configured to obtain a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; The fifth module is used to determine the EMI value of the LPDDR chip according to the first EMI value and the second EMI value.

[0013] In a third aspect, an embodiment of the present invention provides a memory testing device, which is applied to a smart card, and the device includes: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the method as described above.

[0014] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, in which a program executable by a processor is stored. When the program executable by the processor is executed by the processor, it is used to perform the method as described above.

[0015] The implementation of the embodiment of the present invention includes the following beneficial effects: the embodiment of the present invention provides an EMI value test method for an LPDDR chip, including: obtaining a first storage capacity of the LPDDR chip, the first storage capacity representing the storage capacity corresponding to the first Rank; obtaining a second storage capacity of the LPDDR chip, the second storage capacity representing the storage capacity corresponding to the second Rank; comparing the first storage capacity and the second storage capacity with the preset storage capacity to obtain a first comparison result; obtaining a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, the first storage table representing a relationship table between a first parameter value and a storage capacity, the second storage table representing a relationship table between a second parameter value and a storage capacity, the first EMI value representing the EMI value of the first Rank, and the second EMI value representing the EMI value of the second Rank; determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value. The present application can effectively make up for the deficiencies of the existing test method, by comprehensively and specifically detecting the storage capacity of two ranks in the entire LPDDR chip, and obtaining the corresponding first EMI value and second EMI value according to the storage capacity, so as to accurately test the EMI value of the LPDDR chip, and then accurately initialize the LPDDR chip, and improve the stability of the LPDDR chip. At the same time, by respectively detecting the storage capacity of the first Rank and the second Rank and obtaining the corresponding EMI value, the EMI value test of the LPDDR chip with a capacity of more than 12GB can be performed. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic flow chart of the steps of a method for testing the EMI value of an LPDDR chip provided by an embodiment of the present invention; Figure 2 is a schematic diagram of a first Rank and a second Rank of an LPDDR chip provided by an embodiment of the present invention; Figure 3 It is a structural block diagram of an EMI value test system for an LPDDR chip provided by an embodiment of the present invention; Figure 4 It is a structural block diagram of a memory testing device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0018] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims or the above drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0019] The embodiment of the present invention provides an EMI value test method for an LPDDR chip, comprising: obtaining a first storage capacity of the LPDDR chip, the first storage capacity representing the storage capacity corresponding to the first Rank; obtaining a second storage capacity of the LPDDR chip, the second storage capacity representing the storage capacity corresponding to the second Rank; comparing the first storage capacity and the second storage capacity with a preset storage capacity to obtain a first comparison result; obtaining a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, the first storage table representing a relationship table between a first parameter value and a storage capacity, the second storage table representing a relationship table between a second parameter value and a storage capacity, the first EMI value representing the EMI value of the first Rank, and the second EMI value representing the EMI value of the second Rank; determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value. The present application can effectively make up for the deficiencies of the existing test method, by comprehensively and specifically detecting the storage capacity of two ranks in the entire LPDDR chip, and obtaining the corresponding first EMI value and second EMI value according to the storage capacity, so as to accurately test the EMI value of the LPDDR chip, and then accurately initialize the LPDDR chip, and improve the stability of the LPDDR chip. At the same time, by respectively detecting the storage capacity of the first Rank and the second Rank and obtaining the corresponding EMI value, the EMI value test of the LPDDR chip with a capacity of more than 12GB can be performed.

[0020] The embodiments of the present invention are further described below in conjunction with the accompanying drawings.

[0021] like Figure 1 As shown, an embodiment of the present invention provides an EMI value testing method for an LPDDR chip, which includes the following steps.

[0022] S100: Acquire a first storage capacity of an LPDDR chip, where the first storage capacity represents a storage capacity corresponding to a first Rank.

[0023] S200, obtaining a second storage capacity of the LPDDR chip, where the second storage capacity represents a storage capacity corresponding to a second Rank; S300, comparing the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; S400, acquiring a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; S500: Determine an EMI value of an LPDDR chip according to the first EMI value and the second EMI value.

[0024] Specifically, refer to Figure 2 , first of all, it is necessary to obtain the first storage capacity corresponding to the first Rank and the second storage capacity corresponding to the second Rank in the LPDDR chip. The acquisition of storage capacity can be achieved through registers inside the chip or specific read instructions, which are not limited here. The first storage capacity and the second storage capacity are compared with the preset storage capacity respectively. This preset storage capacity is a predetermined value, set according to system design or experience. The specific preset storage capacity of this application is 6GB. The first EMI value and the second EMI value are obtained using the first storage table and the second storage table. The first storage table records the relationship between the first parameter value and the storage capacity; if the first storage capacity is within a certain range after comparison with the preset storage capacity, the corresponding first parameter value can be found in the first storage table according to the range, and then the first EMI value is obtained. The second storage table is similar. According to the comparison result of the second storage capacity with the preset storage capacity, the corresponding second parameter value is found in the second storage table to obtain the second EMI value. The storage capacity after the first storage capacity and the second storage capacity are added together can obviously be greater than 12GB. Compared with the overall test of the LPDDR chip, the EMI values ​​of different ranks can be tested independently, which is not limited by the overall storage capacity of the LPDDR chip. When the LPDDR chip is tested as a whole, the storage capacity of the LPDDR chip is evenly distributed to the first Rank and the second Rank. When the storage capacity of the first Rank and the second Rank itself is not equal, the obtained EMI value obviously also has deviations, which leads to errors in the initialization of the LPDDR chip, thereby affecting the performance of the LPDDR chip during subsequent use, resulting in poor stability of the LPDDR chip. The EMI value of the entire LPDDR chip is determined based on the obtained first EMI value and the second EMI value, so that the LPDDR chip is initialized according to the EMI value of the LPDDR chip. Since the first EMI value and the second EMI value are combined, the initialization is accurate.

[0025] In some optional embodiments, obtaining the first EMI value and the second EMI value according to the first comparison result, the first storage table and the second storage table includes: obtaining the first EMI value through the first storage table when the first comparison result indicates that the first storage capacity is greater than the preset storage capacity; obtaining the second EMI value through the first storage table when the first comparison result indicates that the second storage capacity is greater than the preset storage capacity; obtaining the first EMI value through the second storage table when the first comparison result indicates that the first storage capacity is less than or equal to the preset storage capacity; obtaining the second EMI value through the second storage table when the first comparison result indicates that the second storage capacity is less than or equal to the preset storage capacity.

[0026] Specifically, according to the different results of comparing the storage capacity of each Rank (here, the first Rank and the second Rank) in the LPDDR chip with the preset storage capacity (6GB is selected in this application), the corresponding EMI value is accurately searched and obtained from the corresponding storage table (the first storage table and the second storage table). Determine the appropriate external memory interface (EMI) parameters for the Ranks with different capacity conditions, so as to initialize the LPDDR chip to ensure that the LPDDR chip can operate stably with good electromagnetic compatibility and data transmission performance in the entire electronic system. When the first comparison result shows that the first storage capacity is greater than the preset storage capacity, it means that the actual storage capacity of the first Rank exceeds the expected setting; in this case, the data storage and transmission requirements of the chip are relatively high, and an EMI value adapted thereto is required to meet the efficient reading and writing of data under large capacity and maintain a reasonable electromagnetic environment. The first storage table records the mapping relationship between storage capacity and EMI value under specific conditions. In this scenario where the capacity is greater than the preset value, the corresponding first EMI value can be obtained by searching the first parameter corresponding to the first storage capacity in the first storage table. For example, when the first storage capacity is 8GB, the corresponding first EMI value includes specific parameters such as the clock frequency is set to 1800MHz, the data bit width is 32 bits, and the read and write delay is 8ns. These parameters are combined to meet the EMI value required by the first Rank to ensure its efficiency and stability during large-capacity data operations.

[0027] As in the case of the first Rank, when the second storage capacity is greater than the preset storage capacity, it indicates that the second Rank also has a higher storage capacity and has similar changes in demand for data transmission and electromagnetic characteristics. The second EMI value is obtained again with the help of the first storage table, and the specific first storage table is stored in the CONK register; the first storage table is constructed for the case of large storage capacity, which covers the corresponding relationship of EMI values ​​required to meet the large-capacity Rank for efficient data interaction. Therefore, by searching for the corresponding record in the first storage table according to the second storage capacity, the second EMI value suitable for the second Rank in the large-capacity state can be determined, ensuring that it can cooperate well with other components in the system to achieve stable data reading and writing and other operations.

[0028] When the first storage capacity is less than or equal to the preset storage capacity (6GB), it means that the storage scale of the first Rank is relatively small or just meets expectations. In this case, the requirements for data storage and transmission are relatively low, and the corresponding EMI value adapts to this relatively low data processing requirement and maintains appropriate electromagnetic characteristics. The second storage table is formulated for situations where the storage capacity is in a relatively small range. It records the corresponding relationship between the storage capacity and the EMI value under such capacity conditions. Therefore, by looking up the second parameter matching the first storage capacity in the second storage table, the first EMI value suitable for the current first Rank situation can be obtained. For example, if the first storage capacity is 4GB (the preset storage capacity is 6GB), the EMI value corresponding to 4GB is found in the second storage table, such as the clock frequency of 1200MHz, the data bit width of 16 bits, and the read and write delay of 12ns. These parameters can ensure that the first Rank can interact with data stably and efficiently at the corresponding capacity.

[0029] When the second storage capacity is less than or equal to the preset storage capacity, the processing idea is the same as that of the first Rank in the same situation. Since its storage capacity is at a relatively low level, it is necessary to determine the EMI value according to the configuration rules corresponding to the smaller capacity. With the help of the second storage table, the corresponding record is searched in the table according to the specific value of the second storage capacity, and then the second EMI value suitable for the second Rank in this smaller capacity is obtained, so that the second Rank can reach the best state in accordance with its capacity characteristics in terms of data reading and writing, electromagnetic compatibility, etc., and ensure the stable operation of the entire LPDDR chip in the system.

[0030] In some optional embodiments, the method further includes: when the first comparison result indicates that the first storage capacity and the second storage capacity are both less than or equal to the preset storage capacity, comparing the first storage capacity and the second storage capacity to obtain a second comparison result; when the second comparison result indicates that the first storage capacity and the second storage capacity are equal, obtaining the first EMI value and the second EMI value through the second storage table; when the second comparison result indicates that the first storage capacity and the second storage capacity are not equal, obtaining the first EMI value and the second EMI value through the first storage table.

[0031] Specifically, based on the comparison results of each Rank storage capacity and the preset storage capacity, it has been preliminarily determined from which storage table to obtain the corresponding EMI value. Here, the relationship between the two Rank capacities on the acquisition of the EMI value is further considered in the specific case that the first storage capacity and the second storage capacity are both less than or equal to the preset storage capacity. The purpose is to more accurately adapt the corresponding EMI value according to the specific situation of the Rank capacity, so that the LPDDR chip can achieve good electromagnetic compatibility and data transmission performance under different storage capacity configurations, and ensure the stable operation of the entire electronic system.

[0032] When the first comparison result shows that the first storage capacity and the second storage capacity are both less than or equal to the preset storage capacity, it means that the storage scales of the two ranks are at a relatively low level, but this alone cannot fully determine the most appropriate way to obtain the EMI value. Because even if they are within a relatively small capacity range, the equal and unequal capacities of the two ranks have different effects on data transmission and electromagnetic characteristics, so it is necessary to further compare their capacities to obtain the second comparison result, so as to more accurately determine which storage table to obtain the EMI value from.

[0033] When the second comparison result shows that the first storage capacity and the second storage capacity are equal, it means that the two ranks are the same in terms of storage capacity. In this case, their data storage and transmission requirements are consistent from the capacity perspective, and the adapted EMI values ​​should also be the same. Since it has been determined that the capacities of the two ranks are less than or equal to the preset storage capacity, and the second storage table is constructed for relatively small storage capacity conditions, the correspondence between the storage capacity and the EMI value under such capacity conditions is recorded. Since the capacities of the two ranks are equal and in a smaller capacity range, the second parameter corresponding to the capacity can be directly searched through the second storage table, and then the first EMI value applicable to the first Rank and the second EMI value applicable to the second Rank can be obtained, thereby ensuring that the two ranks can stably exchange data with appropriate electromagnetic characteristics and data transmission parameters under equal smaller capacity configurations.

[0034] When the second comparison result shows that the first storage capacity and the second storage capacity are not equal, although they are both in a relatively small capacity range, the different capacity sizes mean that the two ranks have different specific requirements for data storage and transmission, such as the Rank with a larger capacity relatively requires a slightly higher data transmission bandwidth, etc., which requires comprehensive consideration to determine the appropriate EMI value. Although the first storage table is mentioned above as being constructed more for larger storage capacity situations, here, when the two Rank capacities are not equal and are both in a relatively small capacity range, the EMI value is obtained through the first storage table because the capacity range covered by the first storage table and the corresponding EMI value mapping relationship can better adapt to this complex situation with capacity differences. It can find the corresponding first parameter in the table based on the specific capacity values ​​of the two Ranks, thereby obtaining the first EMI value and the second EMI value suitable for the first Rank and the second Rank, respectively, so that the two Ranks with different capacities can optimize the data transmission performance and maintain good electromagnetic compatibility as much as possible under this relatively small capacity configuration, and ensure the stable operation of the entire LPDDR chip in the system.

[0035] In some optional embodiments, obtaining the first EMI value or the second EMI value through the first storage table, and obtaining the first EMI value or the second EMI value through the second storage table, includes: obtaining the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and calculating the first EMI value or the second EMI value through the first parameter value; obtaining the second parameter value in the second storage table according to the first storage capacity or the second storage capacity, and calculating the first EMI value or the second EMI value through the second parameter value.

[0036] Specifically, the first storage table establishes a mapping relationship between storage capacity and the first parameter value. When it is necessary to obtain the first EMI value or the second EMI value through the first storage table, the corresponding first parameter value must first be found based on the specific first storage capacity or the second storage capacity. For example, the first storage table lists corresponding parameter combinations according to different storage capacity ranges. If the first storage capacity is 8GB (only an example value), the row corresponding to 8GB is found in the table. The capacity-related parameters (i.e., the first parameter values) contained in this row include content such as specific chip operating mode encoding, coefficients related to data transmission bandwidth, etc. These parameters are the basis for subsequent calculation of EMI values.

[0037] After obtaining the first parameter value, a specific calculation method is required to obtain the first EMI value or the second EMI value. These first parameter values ​​are closely related to the electromagnetic characteristics and data transmission mechanism of the chip, and the calculation process is often based on some mathematical models or algorithms determined during chip design. For example, the chip working mode encoding in the first parameter value determines the basic mode of data transmission (such as single channel or dual channel, etc.), and different modes correspond to different basic parameter settings such as clock frequency and data bit width; the coefficient related to the data transmission bandwidth will participate in the calculation of key EMI parameters such as the actual data transmission speed. By substituting these first parameter values ​​into the corresponding calculation formula (the specific formula is determined by the chip manufacturer based on the electrical characteristics, performance goals and other factors of the chip, and is not limited here), after mathematical operations such as multiplication, addition, and shift, the first EMI value or the second EMI value is finally obtained, so as to accurately configure the external memory interface parameters of the corresponding Rank to meet its data transmission requirements under this capacity and control the electromagnetic interference level.

[0038] Similar to the first storage table, the second storage table also constructs a correspondence between storage capacity and the second parameter value. When the first EMI value or the second EMI value is to be obtained through the second storage table, the corresponding entry is searched in the second storage table according to the first storage capacity or the second storage capacity involved, so as to determine the second parameter value. For example, if the second storage capacity is 4GB, the set of parameters corresponding to 4GB is searched in the second storage table. The second parameter value covers parameters related to the internal storage structure of the chip, such as the number of memory banks, the number of row and column addresses, and other related coefficients affecting electromagnetic characteristics, which reflect the key characteristic information of the chip under relatively small storage capacity. After obtaining the second parameter value, the first EMI value or the second EMI value is calculated according to the established calculation rules. Since the second parameter value reflects the characteristics of the chip in a relatively small capacity scenario, the method of calculating the EMI value is also centered on optimizing data transmission and electromagnetic compatibility within this capacity range. For example, the number of memory banks and the number of row and column addresses in the second parameter value will affect the data reading and writing methods and access efficiency. Through a specific algorithm (which takes into account the relationship between these parameters and electromagnetic interference and data transmission speed) and combined with other correlation coefficients, mathematical operations are performed to ultimately calculate the first EMI value or the second EMI value suitable for the corresponding Rank in this smaller capacity, so that the chip can work stably with reasonable electromagnetic characteristics and data transmission performance even in a relatively low-capacity configuration.

[0039] In some optional embodiments, determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value includes: obtaining a first weighting coefficient corresponding to the first EMI value and a second weighting coefficient corresponding to the second EMI value; and calculating the EMI value of the LPDDR chip according to the first EMI value, the first weighting coefficient, the second EMI value, and the second weighting coefficient.

[0040] Specifically, after the first EMI value and the second EMI value have been obtained, in order to comprehensively consider the electromagnetic characteristics of the two ranks (the first rank and the second rank) and their impact on the electromagnetic compatibility and data transmission performance of the entire LPDDR chip, the EMI value of the entire LPDDR chip is determined by obtaining the corresponding weighting coefficients and using these coefficients for calculation. This more scientifically and accurately reflects the electromagnetic performance of the chip as a whole, ensuring that the chip can achieve good data transmission efficiency and electromagnetic compatibility that meets the requirements while taking into account the conditions of each rank when working in coordination with the external system, and ensuring the stable operation of the entire electronic system.

[0041] The first weighting coefficient corresponds to the first EMI value, and the second weighting coefficient corresponds to the second EMI value, which respectively reflect the relative importance or influence of the first Rank and the second Rank in the entire LPDDR chip. These relative importances are determined by multiple factors, such as the storage capacity of the Rank, the frequency of data reading and writing, and the position in the entire chip data storage and transmission system.

[0042] If the storage capacity of the first Rank is relatively large, it occupies a more important position in the entire chip storage system and undertakes more data storage tasks, then its corresponding first weighting coefficient may be relatively large, which means that it has a stronger influence in determining the EMI value of the entire chip. For example, the capacity of the first Rank is 8GB and the capacity of the second Rank is 4GB. Based on the capacity factor, the first weighting coefficient of the first Rank will be set higher than the second weighting coefficient of the second Rank, because the large-capacity Rank has a relatively greater impact on the electromagnetic characteristics of data transmission and other aspects. Assuming that the first Rank is mainly used to store operating system core files and frequently accessed application data, data read and write operations are very frequent, and the second Rank is mainly used to store some relatively infrequently accessed backup data, etc., then the first Rank, due to its high read and write frequency, has a more critical impact on the overall data transmission performance and electromagnetic environment of the chip. Correspondingly, the first weighting coefficient will be larger to reflect its importance in determining the chip EMI value.

[0043] The process of calculating the EMI value of the LPDDR chip is based on the idea of ​​weighted average, that is, the first EMI value and the second EMI value are multiplied by their corresponding weighted coefficients, and then the sum is obtained to obtain the final chip EMI value. It can comprehensively consider the electromagnetic characteristics of the two ranks and their importance in the chip, so that the obtained chip EMI value is more in line with the actual working conditions.

[0044] In some optional embodiments, obtaining the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and obtaining the second parameter value in the second storage table according to the first storage capacity or the second storage capacity, include: converting to obtain a first table range of the first storage table according to the first storage capacity or the second storage capacity; configuring the parameters corresponding to the first table range to the first parameter values, the first parameter values ​​indicating the corresponding EMI values; converting to obtain a second table range of the second storage table according to the first storage capacity or the second storage capacity; configuring the parameters corresponding to the second table range to the second parameter values, the second parameter values ​​indicating the corresponding EMI values.

[0045] Specifically, the first storage table divides different storage capacity ranges according to certain rules, and configures corresponding parameter combinations (i.e., first parameter values) for each range. When the first storage capacity or the second storage capacity is known, it is necessary to determine the first table range to which it belongs according to the capacity division logic pre-set in the storage table. For example, the first storage table can divide the storage capacity into several intervals, such as 0-4GB as one interval, 4GB-8GB as another interval, etc., and each interval corresponds to a different chip working mode, data transmission bandwidth and other related parameter combinations. If the first storage capacity is 6GB, according to this division rule, it can be determined that the first table range to which it belongs is the interval of 4GB-8GB. For dual-channel LPDDR chips, when dividing the table range of the first storage table, the capacity of each Rank and the number of channels will be considered at the same time. For example, when the dual Rank and each Rank capacity is in the range of 3GB-6GB, a specific table range corresponds to it, because the chip with this capacity combination in the dual-channel mode has its unique performance in electromagnetic characteristics and data transmission, and requires special parameter configuration to adapt.

[0046] After determining the first table range corresponding to the first storage capacity or the second storage capacity, the pre-configured parameter combination of the range can be set as the first parameter value. These first parameter values ​​are closely related to the electromagnetic characteristics and data transmission mechanism of the chip, and directly indicate the corresponding EMI value. For example, in the first parameter value corresponding to a first table range (assuming a storage capacity range of 8GB-12GB), the clock frequency may be set to 1800MHz, the data bit width is 32 bits, the read and write delay is 8ns, and a specific address mapping method. These parameters are combined to represent the external memory interface (EMI) configuration required for the chip to achieve good electromagnetic compatibility and efficient data transmission in this capacity range, that is, corresponding to a specific EMI value. These parameters can be further calculated or directly applied to set the EMI-related configuration of the chip. The various parameters covered by the first parameter value are mutually coordinated and mutually influential. For example, the clock frequency and data bit width jointly determine the speed of data transmission, and the read and write delays need to be adapted to them to ensure the accuracy and stability of the data during the reading and writing process. At the same time, the address mapping method will also affect the access efficiency of the data and the electromagnetic interference. Therefore, these parameters, as a whole, are the first parameter values ​​that comprehensively reflect the electromagnetic characteristics and data transmission-related configuration information required by the chip within the corresponding table range.

[0047] Similar to searching for the corresponding table range in the first storage table, the second storage table also has its own capacity range division method to match different second parameter values. According to the first storage capacity or the second storage capacity, it is converted into the corresponding second table range according to the established capacity division rule of the second storage table. For example, the second storage table can be divided according to a finer capacity gradient, such as 0-2GB as one interval, 2GB-4GB as another interval, etc. If the second storage capacity is 3GB, then its corresponding second table range is the interval of 2GB-4GB, so that the range of parameter configuration suitable for relatively small capacity situations can be found. The capacity division of the second storage table and the determination of the table range are often focused on relatively small storage capacity situations, which is different from the division of the first storage table. It takes more into account the particularity of the internal storage structure, data reading and writing characteristics, and electromagnetic characteristics of the chip in the low-capacity state. For example, at low capacity, it may pay more attention to reducing power consumption and optimizing electromagnetic compatibility in simple data access mode, so the division of its table range and the corresponding parameter configuration will be designed around these characteristics, which complements the first storage table for larger capacity situations to fully cover the needs of the chip in different capacity scenarios.

[0048] After the second table range corresponding to the second storage capacity is determined, the parameter combination corresponding to the range is set as the second parameter value, and its principle and function are similar to the first parameter value. These second parameter values ​​also indicate the corresponding EMI values, but they are configured for relatively small capacity situations. For example, in the second parameter value corresponding to the second table range (assuming a storage capacity range of 2GB-4GB), it may include parameters such as a clock frequency set to 1200MHz, a data bit width of 16 bits, a read and write delay of 12ns, and an address mapping method suitable for low capacity. These parameters together constitute the optimal EMI configuration related parameters for the chip in this capacity range, providing a guarantee for stable and efficient data transmission of the chip in a relatively low capacity state. By comparing the first parameter value and the second parameter value, it can be found that since they correspond to different storage capacity ranges, the parameter values ​​will show obvious differences to adapt to the characteristics of the chip under their respective capacity conditions. Generally speaking, the clock frequency, data bit width and other parameters corresponding to the second parameter value are relatively small, and the read and write delays are relatively long. This is because in the case of low capacity, the data transmission requirements are relatively not that high, and more emphasis is placed on maintaining low power consumption and a simple and stable electromagnetic environment. The first parameter value sets relatively higher clock frequencies, wider data bit widths and other parameters based on the needs for high-speed data transmission and large-capacity data processing at larger capacities to meet performance requirements.

[0049] In some optional embodiments, before determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value, it also includes: obtaining the working mode of the LPDDR chip; when the working mode indicates a single-channel mode, setting the first EMI value corresponding to the non-working first Rank to zero, or setting the second EMI value corresponding to the non-working second Rank to zero; when the working mode indicates a dual-channel mode, obtaining the interference coefficient between the first Rank and the second Rank; and correcting the first EMI value and the second EMI value according to the interference coefficient.

[0050] Specifically, before finally determining the EMI value of the entire LPDDR chip based on the first EMI value and the second EMI value, it is necessary to consider the working mode of the chip and the mutual influence between the ranks under different working modes. This aims to more accurately adjust the EMI value corresponding to each Rank so that it fully reflects the electromagnetic characteristics and data transmission conditions of the chip under the actual working state, thereby obtaining a more practical overall chip EMI value that can ensure stable and efficient operation of the chip, and improve the electromagnetic compatibility and performance of the chip when working in collaboration with the external system.

[0051] The working mode (single-channel mode or dual-channel mode) of the LPDDR chip has a significant impact on its data transmission method, electromagnetic interference and overall performance. Different working modes mean that there are differences in the data interaction mechanism between the internal storage unit of the chip and the external system. Correspondingly, the role played by each Rank and the relationship between them will also be different. Therefore, it is necessary to first clarify the current working mode of the chip in order to make targeted EMI value adjustments later. The working mode can usually be determined by reading specific register bits inside the chip or detecting related control signals connected to the chip. For example, the chip can reserve one or several register bits specifically for identifying whether it is currently in single-channel or dual-channel working mode. The external memory controller can obtain the working mode information of the chip by accessing these registers and parsing the binary values ​​therein (such as 0 for single-channel mode and 1 for dual-channel mode); or by detecting the specific pin level state used to control channel selection, etc. to determine the working mode, providing a basis for further processing of the EMI values ​​of each Rank.

[0052] In single-channel mode, only one Rank participates in data reading and writing operations, and the other Rank is in a non-working state. The non-working Rank does not actually have a substantial impact on the current data transmission and electromagnetic environment, so from the perspective of accurately reflecting the actual electromagnetic characteristics and data transmission of the chip, the EMI value corresponding to the non-working Rank needs to be set to zero. For example, if the current single-channel mode is and the first Rank is not working, then the first EMI value corresponding to the first Rank is set to zero. The first EMI value here is originally obtained based on factors such as the storage capacity of the first Rank, and contains a series of electromagnetic characteristic-related parameters such as clock frequency and data bit width. Setting it to zero means that in the subsequent calculation process of determining the EMI value of the entire chip, the non-working first Rank will not contribute to the final result, just as if it does not exist, so as to ensure that the calculated chip EMI value can accurately reflect the electromagnetic situation of the Rank actually involved in the work in the single-channel mode. Similarly, if the second Rank is not working, the corresponding second EMI value is set to zero, so that the overall EMI value calculation is more in line with the actual working scenario.

[0053] In dual-channel mode, the first Rank and the second Rank will work simultaneously to read and write data. However, when the two ranks operate simultaneously, electromagnetic interference may occur between them because they share some internal chip resources (such as address bus, data bus, etc.) and are physically close to each other. This interference will affect the accuracy and stability of data transmission, and thus change the overall electromagnetic characteristics of the chip. Therefore, it is necessary to obtain the interference coefficient between them to quantify the degree of interference, so as to reasonably correct the EMI value corresponding to each Rank.

[0054] The interference coefficient is usually obtained through a large number of experimental tests and electromagnetic compatibility (EMC) modeling analysis during the chip design phase. During the chip development process, professional electromagnetic interference detection equipment is used to test the two ranks working simultaneously in dual channels under different working conditions and data transmission scenarios, and the data transmission error rate, electromagnetic radiation changes and other related indicators caused by mutual interference are measured. Then, these indicators are quantified into interference coefficients through a specific algorithm (the algorithm comprehensively considers the influence of interference on various EMI parameters). For example, the interference coefficient can be a value between 0 and 1. The larger the value, the more severe the interference. It reflects the degree of influence of the mutual interference between the first Rank and the second Rank on their respective electromagnetic characteristics and data transmission performance.

[0055] After obtaining the interference coefficient, the first EMI value and the second EMI value are corrected according to the value thereof. The specific correction method may be based on a correction algorithm determined during chip design, which considers the relationship between the interference coefficient and various EMI parameters (such as clock frequency, data bit width, read and write delay, etc.). For example, if the interference coefficient is large, it means that the interference between ranks is strong, and it may be necessary to appropriately reduce the clock frequency, adjust the data bit width, or increase the value of EMI parameters such as read and write delay to offset the impact of interference on data transmission and ensure the stability and electromagnetic compatibility of data transmission in dual-channel mode. Taking the clock frequency as an example, assuming that the clock frequency in the original first EMI value is 1600MHz, according to the interference coefficient (assuming it is 0.6, indicating that the interference is more serious) and the corresponding correction algorithm, the clock frequency in the first EMI value is corrected to 1200MHz, and the second EMI value is also corrected accordingly according to similar logic, so that the corrected first EMI value and the second EMI value can better adapt to the actual working conditions with interference in the dual-channel mode, and lay the foundation for the final accurate determination of the EMI value of the entire LPDDR chip.

[0056] The implementation of the embodiment of the present invention includes the following beneficial effects: the embodiment of the present invention provides an EMI value test method for an LPDDR chip, including: obtaining a first storage capacity of the LPDDR chip, the first storage capacity representing the storage capacity corresponding to the first Rank; obtaining a second storage capacity of the LPDDR chip, the second storage capacity representing the storage capacity corresponding to the second Rank; comparing the first storage capacity and the second storage capacity with the preset storage capacity to obtain a first comparison result; obtaining a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, the first storage table representing a relationship table between a first parameter value and a storage capacity, the second storage table representing a relationship table between a second parameter value and a storage capacity, the first EMI value representing the EMI value of the first Rank, and the second EMI value representing the EMI value of the second Rank; determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value. The present application can effectively make up for the deficiencies of the existing test method, by comprehensively and specifically detecting the storage capacity of two ranks in the entire LPDDR chip, and obtaining the corresponding first EMI value and second EMI value according to the storage capacity, so as to accurately test the EMI value of the LPDDR chip, and then accurately initialize the LPDDR chip, and improve the stability of the LPDDR chip. At the same time, by respectively detecting the storage capacity of the first Rank and the second Rank and obtaining the corresponding EMI value, the EMI value test of the LPDDR chip with a capacity of more than 12GB can be performed.

[0057] Second, refer to Figure 3The embodiment of the present invention provides an EMI value test system for an LPDDR chip, comprising: A first module is used to obtain a first storage capacity of the LPDDR chip, where the first storage capacity represents a storage capacity corresponding to a first Rank; The second module is used to obtain a second storage capacity of the LPDDR chip, where the second storage capacity represents the storage capacity corresponding to the second Rank; A third module, configured to compare the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; a fourth module, configured to obtain a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; The fifth module is used to determine the EMI value of the LPDDR chip according to the first EMI value and the second EMI value.

[0058] It can be seen that the contents of the above method embodiments are all applicable to the present system embodiments, the functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0059] Thirdly, refer to Figure 4 , an embodiment of the present invention provides a memory testing device, comprising: at least one processor; at least one memory for storing at least one program; When at least one program is executed by at least one processor, the at least one processor implements the above method.

[0060] It can be seen that the contents of the above method embodiments are all applicable to the present device embodiments, the functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0061] In a fourth aspect, in addition, the embodiments of the present application further disclose a computer program product or a computer program, which is stored in a computer storable medium. The processor of a computer device can read the computer program from a computer readable storage medium, and the processor executes the computer program so that the computer device executes the above method or the above system. Similarly, the contents in the above method embodiments are all applicable to the storage medium embodiments, and the functions specifically implemented by the storage medium embodiments are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0062] It is understood that all or some steps and systems in the disclosed method above can be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital information processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media generally contain computer readable instructions, data structures, program modules, or other data in modulated data information such as carrier waves or other transport mechanisms, and may include any information delivery media.

[0063] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the technical field without departing from the purpose of the present invention.

Claims

1. A method for testing the EMI value of an LPDDR chip, characterized in that: include: Acquire a first storage capacity of the LPDDR chip, where the first storage capacity represents a storage capacity corresponding to the first Rank; Acquire a second storage capacity of the LPDDR chip, where the second storage capacity represents a storage capacity corresponding to the second Rank; Comparing the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; Acquire a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; An LPDDR chip EMI value is determined according to the first EMI value and the second EMI value.

2. The method according to claim 1, characterized in that The acquiring the first EMI value and the second EMI value according to the first comparison result, the first storage table and the second storage table includes: When the first comparison result indicates that the first storage capacity is greater than the preset storage capacity, obtaining the first EMI value through the first storage table; When the first comparison result indicates that the second storage capacity is greater than the preset storage capacity, obtaining the second EMI value through the first storage table; When the first comparison result indicates that the first storage capacity is less than or equal to the preset storage capacity, acquiring the first EMI value through the second storage table; When the first comparison result indicates that the second storage capacity is less than or equal to the preset storage capacity, the second EMI value is acquired through the second storage table.

3. The method according to claim 2, characterized in that The method further comprises: When the first comparison result indicates that the first storage capacity and the second storage capacity are both less than or equal to the preset storage capacity, comparing the first storage capacity and the second storage capacity to obtain a second comparison result; When the second comparison result indicates that the first storage capacity and the second storage capacity are equal, acquiring the first EMI value and the second EMI value through the second storage table; When the second comparison result indicates that the first storage capacity and the second storage capacity are not equal, the first EMI value and the second EMI value are acquired through the first storage table.

4. The method according to claim 3, characterized in that Acquiring the first EMI value or the second EMI value through the first storage table, and acquiring the first EMI value or the second EMI value through the second storage table, includes: Acquire the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and calculate the first EMI value or the second EMI value according to the first parameter value; The second parameter value is acquired in the second storage table according to the first storage capacity or the second storage capacity, and the first EMI value or the second EMI value is calculated according to the second parameter value.

5. The method according to claim 1, characterized in that The determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value includes: Obtaining a first weighting coefficient corresponding to the first EMI value and a second weighting coefficient corresponding to the second EMI value; The LPDDR chip EMI value is calculated according to the first EMI value, the first weighting coefficient, the second EMI value and the second weighting coefficient.

6. The method according to claim 4, characterized in that The acquiring the first parameter value in the first storage table according to the first storage capacity or the second storage capacity, and acquiring the second parameter value in the second storage table according to the first storage capacity or the second storage capacity, includes: Obtaining a first table range of the first storage table according to the first storage capacity or the second storage capacity; Configuring the parameter corresponding to the first table range as the first parameter value, wherein the first parameter value indicates a corresponding EMI value; Obtaining a second table range of the second storage table according to the first storage capacity or the second storage capacity; The parameter corresponding to the second table range is configured as the second parameter value, and the second parameter value indicates the corresponding EMI value.

7. The method according to claim 1, characterized in that Before determining the EMI value of the LPDDR chip according to the first EMI value and the second EMI value, the method further includes: Get the working mode of LPDDR chip; When the working mode indicates a single-channel mode, the first EMI value corresponding to the first Rank that is not working is set to zero, or the second EMI value corresponding to the second Rank that is not working is set to zero; When the working mode indicates a dual-channel mode, obtaining an interference coefficient between the first Rank and the second Rank; The first EMI value and the second EMI value are corrected according to the interference coefficient.

8. An EMI value test system for LPDDR chip, characterized in that: include: A first module is used to obtain a first storage capacity of the LPDDR chip, where the first storage capacity represents a storage capacity corresponding to a first Rank; The second module is used to obtain a second storage capacity of the LPDDR chip, where the second storage capacity represents the storage capacity corresponding to the second Rank; A third module, configured to compare the first storage capacity and the second storage capacity with a preset storage capacity respectively to obtain a first comparison result; a fourth module, configured to obtain a first EMI value and a second EMI value according to the first comparison result, a first storage table and a second storage table, wherein the first storage table represents a relationship table between a first parameter value and a storage capacity, the second storage table represents a relationship table between a second parameter value and a storage capacity, the first EMI value represents an EMI value of the first Rank, and the second EMI value represents an EMI value of the second Rank; The fifth module is used to determine the EMI value of the LPDDR chip according to the first EMI value and the second EMI value.

9. A memory testing device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a program executable by a processor, characterized in that: The processor-executable program is used to perform the method according to any one of claims 1 to 7 when executed by the processor.

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