Two-dimensional field effect transistor with high-temperature thermal stability and preparation method thereof

Abstract

The invention discloses a two-dimensional field effect transistor with high-temperature thermal stability and a preparation method thereof, and mainly solves the problem that a two-dimensional material in an existing two-dimensional field effect transistor can be oxidized and decomposed at high temperature. The device comprises a substrate (1), an insulation packaging protection bottom layer (2), a two-dimensional material film layer (3), an insulation packaging protection top layer (6) and a gate electrode (7) from bottom to top, a source electrode (4) and a drain electrode (5) are arranged at the two ends of the film layer (3), and the packaging protection bottom layer and the packaging protection top layer both adopt any one or combination of more of aluminum nitride, hexagonal boron nitride or silicon nitride. Oxygen molecules in the air are prevented from diffusing to the two-dimensional material film layer for reaction at high temperature, so that the two-dimensional material film layer plays a role in high-temperature protection; the two-dimensional material film layer is made of molybdenum disulfide or tungsten disulfide or tungsten diselenide. The high temperature resistance of the two-dimensional field effect transistor is improved, oxygenolysis of the two-dimensional material at high temperature is avoided, and the two-dimensional field effect transistor can be used for aerospace, deep well drilling or other high-temperature environments.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and specifically relates to a two-dimensional field effect transistor and a preparation method thereof, which can be used to prepare a high-temperature resistant two-dimensional field effect transistor. Background Art

[0002] Two-dimensional semiconductor materials, especially transition metal dichalcogenides such as molybdenum disulfide, have many superior properties as channel materials for field effect transistors. The atomic-level thickness of two-dimensional semiconductor materials can effectively control the short channel effect, so that high performance can be maintained while continuing to reduce the size of the device, which can achieve further miniaturization of semiconductor devices and increase the density of integrated circuits. Its atomic-level thickness and excellent electrical properties can significantly reduce the leakage current and static power consumption in the channel, making it very suitable for low-power devices. In addition, two-dimensional materials also have good mobility, which can achieve fast switching and efficient signal transmission at low voltage, and are suitable for high-speed circuit applications. In addition, two-dimensional semiconductor materials have excellent mechanical flexibility and transparency, and can be widely used in flexible electronics, wearable devices and other fields, providing more possibilities for the diversity of future electronic products. These characteristics of two-dimensional semiconductor materials make them have broad application prospects in the new generation of electronic devices, especially high-efficiency and low-power nanoelectronic devices.

[0003] Nanoscale transistors with high integration density and low power consumption and high temperature resistant integrated circuits are in urgent need in many fields including aerospace. Compared with traditional wide bandgap semiconductors such as gallium nitride and silicon carbide high temperature transistors, transistors based on two-dimensional semiconductor materials have the advantages of extremely high flexibility, atomic scale and ultra-low power consumption.

[0004] Molybdenum disulfide is a layered two-dimensional semiconductor material with excellent electrical properties such as high carrier mobility, ultra-low flicker noise and good integrability. It can be used as a channel material for atomic-thick ultra-low power high-performance field effect transistors. However, the application of molybdenum disulfide devices faces challenges in high-temperature environments. When the ambient temperature rises to 200°C, a large number of sulfur vacancies will form on the surface of molybdenum disulfide. These vacancies tend to adsorb oxygen molecules, which in turn leads to undesired doping of the material. The point defects and line defects caused by oxidation will seriously affect the stability of its electrical properties. At a high temperature of 300°C, molybdenum disulfide is prone to oxidation. MoO3 is one of the typical oxides of MoS2 and is easy to sublimate at high temperatures. Therefore, molybdenum disulfide may even decompose rapidly at high temperatures. In addition, many other transition metal dichalcogenides such as tungsten disulfide and tungsten diselenide may also oxidize and decompose at high temperatures, affecting their performance stability in field effect transistors at high temperatures. For example, WS2 will begin to oxidize when the temperature exceeds 500°C in the air, generating WO3 and SO2 gases. In order to apply these materials at high temperatures, they usually need to be used in an inert atmosphere or vacuum to avoid oxidation. At present, related research has grown an Al2O3 protective layer on the surface of MoS2 by atomic layer deposition, which can work stably at 107°C, but this type of device still has difficulty maintaining good and stable performance at higher temperatures. Summary of the invention

[0005] The object of the present invention is to provide a high temperature thermally stable two-dimensional field effect transistor and a preparation method thereof, so as to solve the deficiency of the above-mentioned prior art that it is difficult to maintain good stable performance at higher temperatures.

[0006] The technical solution to achieve the purpose of the present invention is as follows:

[0007] 1. A high temperature and thermally stable two-dimensional field effect transistor, comprising from bottom to top: a substrate, a packaging protection bottom layer, a thin film layer, a packaging protection top layer, a gate electrode, and two ends of the thin film layer are source electrodes and drain electrodes, characterized in that:

[0008] The encapsulation protection bottom layer and the encapsulation protection top layer are made of any one or more combinations of aluminum nitride, boron nitride and silicon nitride to prevent oxygen molecules in the air from diffusing into the film layer to react at high temperatures, thus playing a role in high temperature protection;

[0009] The thin film layer is made of one of molybdenum disulfide, tungsten disulfide, tungsten diselenide, or other two-dimensional semiconductor materials that will be oxidized and decomposed.

[0010] Furthermore, the thickness of the encapsulation protection bottom layer is 50-100 nm; the thickness of the encapsulation protection top layer is 40-60 nm; and the thickness of the thin film layer is nanometer scale.

[0011] Furthermore, the substrate is made of any one of SiO2 / Si, sapphire, diamond or other insulating substrate materials.

[0012] Furthermore, the source electrode and the drain electrode are both made of Ti / Au or Cr / Au or other metals that are compatible with the electrical properties of the two-dimensional material.

[0013] Furthermore, the gate electrodes are made of metals such as Ni / Au, Pd / Au, and Pt / Au.

[0014] 2. A method for manufacturing a high-temperature thermally stable two-dimensional field effect transistor, characterized in that it comprises the following steps:

[0015] §1: Select the target substrate, use acetone, isopropanol, and deionized water to ultrasonically clean its surface, and then blow dry it with nitrogen to ensure that the surface is clean and flat;

[0016] §2: Obtaining a packaging protection bottom layer on the substrate by metal organic chemical vapor deposition or magnetron sputtering or transfer method;

[0017] §3: Using chemical vapor deposition to grow a thin film of the two-dimensional material to be transferred on another substrate surface;

[0018] §4: Using PMMA-assisted transfer method, the grown two-dimensional material film is transferred to the packaging protection bottom layer as the thin film layer of the transistor;

[0019] §5: On the substrate to which the two-dimensional material is transferred, an encapsulation protection top layer is obtained by metal organic chemical vapor deposition or magnetron sputtering or transfer method;

[0020] §6: Evenly coating the surface of the top package protection layer with photoresist, performing pre-baking and photolithography, and then etching the top package protection layer, the two-dimensional material film, and the bottom package protection layer in sequence to obtain an isolation area;

[0021] §7: After etching the isolation area, the top layer of the package protection is etched again by conventional photolithography to make the contact area of ​​the source and drain electrodes;

[0022] §8: Deposit the metal of the source and drain electrodes in the etched source and drain regions through an electron beam evaporation system. After the metal is deposited, a stripping process is performed to form the source and drain electrodes.

[0023] §9: The top gate metal electrode is prepared by photolithography, electron beam evaporation and lift-off process to complete the device fabrication.

[0024] Compared with the prior art, the present invention has the following advantages:

[0025] 1) Based on the common two-dimensional field effect transistor, the present invention uses any one or more combinations of aluminum nitride, silicon nitride, and boron nitride as the packaging protection bottom layer and the packaging protection top layer, so compared with the two-dimensional field effect transistor without the packaging protection layer, the thermal stability of the transistor at high temperature can be achieved;

[0026] 2) Since the present invention uses aluminum nitride, silicon nitride, and boron nitride as the encapsulation protective layer, compared with the traditional atomic layer deposition oxide as the encapsulation protective layer, the introduction of oxygen in the process of preparing the encapsulation protective top layer is reduced, and the damage to the two-dimensional material film layer is avoided. Compared with the traditional oxide encapsulation protective layer, it can also maintain the good and stable performance of the two-dimensional field effect transistor at a higher temperature.

[0027] 3) Since the present invention adopts a two-dimensional material thin film layer, it can realize atomic-scale and ultra-low power consumption transistor design at high temperature after packaging.

[0028] 4) Since the packaging protective layer deposition method adopted in the present invention is metal organic chemical vapor deposition, magnetron sputtering or transfer method, compared with the traditional atomic layer deposition method, the protective layer growth quality is high and the defect density is low, which is more conducive to achieving high temperature thermal stability and good electrical properties of the two-dimensional field effect transistor.

[0029] 5) Since the present invention adopts chemical vapor deposition to prepare the two-dimensional material film, compared with the mechanical exfoliation method, it can grow a large-area, uniform two-dimensional material film, and can control the number of layers and crystal quality of the two-dimensional material by adjusting parameters such as gas flow, reaction temperature and time, so as to batch prepare two-dimensional material field effect transistors with different electrical properties.

[0030] 6) The present invention uses PMMA wet transfer to achieve the transfer of the two-dimensional material thin film layer, which can achieve uniform transfer on a larger area substrate, effectively reduce the mechanical damage to the molybdenum disulfide film during the transfer process, and help to obtain a higher quality film. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a schematic diagram of the device structure of the high-temperature thermally stable two-dimensional field effect transistor of the present invention;

[0032] Figure 2 Schematic diagram of the process of manufacturing the device of the present invention. DETAILED DESCRIPTION

[0033] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0034] Reference Figure 1 The device of the present invention comprises a substrate 1, a packaging protection bottom layer 2, a two-dimensional material thin film layer 3, a source electrode 4, a drain electrode 5, a packaging protection top layer 6, and a gate electrode 7. Among them:

[0035] The substrate 1 is made of any one of SiO2 / Si, sapphire, diamond or other insulating substrate materials.

[0036] The encapsulation protection bottom layer 2 and the encapsulation protection top layer 6 are made of any one or more combinations of aluminum nitride, boron nitride and silicon nitride. The thickness of the encapsulation protection bottom layer is 40 to 100 nm, and the thickness of the encapsulation protection top layer 6 is 40 to 60 nm.

[0037] The two-dimensional material thin film layer 3 is made of one of molybdenum disulfide, tungsten disulfide, tungsten diselenide, or other two-dimensional semiconductor materials that will be oxidized and decomposed, and has a thickness of 10 to 20 nm;

[0038] The source electrode 4 and the drain electrode 5 are both made of Ti / Au or Cr / Au or other metals that are compatible with the electrical properties of the two-dimensional material, and have a thickness of 20 / 80 nm.

[0039] The gate electrode 7 is made of Ni / Au and has a thickness of 20 / 80 nm.

[0040] The above-mentioned packaging protection bottom layer 2 is located on the substrate 1, the two-dimensional material thin film layer 3 is located on the packaging protection bottom layer 2, the source electrode 4 and the drain electrode 5 are respectively located at the two ends of the two-dimensional material thin film layer 3, the packaging protection top layer (6) is located on the upper part of the two-dimensional material thin film layer 3 between the source and drain electrodes, and the gate electrode 7 is located on the upper part of the packaging protection top layer 6.

[0041] Reference Figure 2 The present invention provides the following three examples, but the embodiments of the present invention are not limited thereto. The preparation methods used in the following examples are conventional methods unless otherwise specified; the reagents and materials used are commercially available unless otherwise specified.

[0042] Example 1: A transistor device is manufactured with a substrate of SiO2 / Si, a bottom layer of a packaging protection layer of 50nm aluminum nitride, a two-dimensional material of 10nm multilayer molybdenum disulfide, a source and drain electrode metal of Ti / Au, and a top layer of a packaging protection layer of 50nm aluminum nitride.

[0043] Step 1: Pretreatment of transistor substrate 1 .

[0044] A 200 nm / 625 μm SiO 2 / Si was selected as the transistor substrate 1 , and the substrate 1 was ultrasonically cleaned in acetone solution, isopropanol, and deionized water for 5 min each, and then dried with nitrogen.

[0045] Step 2: magnetron sputtering a packaging protection layer bottom layer 2 on the substrate 1.

[0046] 2.1) Using aluminum nitride as a target material in a magnetron sputtering system, setting argon and nitrogen as working gases, with gas flow rates of 20 sccm and 5 sccm respectively, and the working gas pressure, sputtering power, and sputtering temperature being 3 mTorr, 100 W, and 300° C. respectively, sputtering an aluminum nitride film on a substrate 1 as a bottom layer 2 of a packaging protective layer;

[0047] 2.2) Install the aluminum nitride target on the target position of the magnetron sputtering equipment and start the vacuum pump until the chamber reaches 10 - 6 After the vacuum degree reaches below 1000 Torr, nitrogen and argon are introduced, and the flow rate is adjusted to the target working pressure and sputtering is started after it is kept stable. The sputtering time is about 10 minutes, and a 50nm thick aluminum nitride film is deposited on the substrate 1 as the bottom layer 2 of the encapsulation protection layer;

[0048] 2.3) After the sample is cooled to room temperature in the vacuum chamber, nitrogen is introduced to return the chamber to atmospheric pressure, the chamber is opened and the sample is taken out.

[0049] Step 3: Chemical vapor deposition of the molybdenum disulfide to be transferred on another sapphire substrate.

[0050] 3.1) The sapphire substrate was ultrasonically cleaned with acetone for 20 minutes, the cleaned substrate was rinsed with deionized water for 2 to 3 times, and then immersed in deionized water for ultrasonic cleaning for 15 minutes, and finally the treated substrate was blown dry with nitrogen;

[0051] 3.2) MoO3 is used as the molybdenum source, and high-purity sulfur powder is used as the sulfur source. The MoO3 powder is placed in a quartz boat in the high-temperature zone, and the high-purity sulfur powder is placed in the low-temperature zone of the furnace tube near the outlet. The cleaned sapphire substrate is placed with the substrate surface facing upward in an area about a few centimeters away from the MoO3 powder to facilitate the growth of MoS2;

[0052] 3.3) Set an argon-hydrogen mixed gas, with the gas flow rates of argon and hydrogen being 100 sccm and 10 sccm respectively. Keep the gas flow constant during the deposition process. Start the tube furnace and set the heating rate to 15°C / min. Heat the MoO3 powder area to 750°C and the sulfur powder area to 200°C. When the temperature reaches the set value, keep the temperature constant for about 5 minutes. At this time, the sulfur vapor reacts with MoO3 on the substrate to generate molybdenum disulfide, and a 10 nm molybdenum disulfide film to be transferred is grown.

[0053] 3.4) After the reaction is completed, turn off the heating and keep argon flowing until the system cools naturally to room temperature to prevent molybdenum disulfide from being oxidized at high temperature.

[0054] Step 4: Wet transfer of molybdenum disulfide onto the packaging protection layer bottom layer 2 as a two-dimensional material thin film layer 3.

[0055] 4.1) Evenly drop a small amount of PMMA solution on the surface of the MoS2 / sapphire substrate, use a spin coating device, spin coat at 4000 rpm for 1 minute, and then dry on a hot plate at 100°C for 10 minutes to solidify the PMMA layer;

[0056] 4.2) Dissolve 55g of KOH solute in 300ml of deionized water, and stir continuously until the solute is completely dissolved and the solution becomes a colorless and odorless liquid. Then, soak the sample in the prepared KOH solution for two hours to gradually separate the PMMA-MoS2 layer from the substrate.

[0057] 4.3) Rinse the PMMA-MoS2 layer in deionized water, use tweezers or other auxiliary tools to gently pick up the PMMA / MoS2 film floating on the water surface and slowly place it on the target substrate, press gently with a glass rod or scraper to remove the bubbles between the PMMA / MoS2 film and the substrate to ensure full contact and adhesion, and let it stand for several hours to allow the film to fully adhere to the substrate;

[0058] 4.4) Soak the sample in acetone to remove PMMA, then clean it with IPA, and finally blow dry it with nitrogen.

[0059] Step 5: magnetron sputtering a top packaging protection layer 6 on the two-dimensional material thin film layer 3.

[0060] The same method as step 2 is used to magnetron sputter on the two-dimensional material film layer 3 to obtain a 50 nm thick aluminum nitride film as the top layer 6 of the encapsulation protection layer.

[0061] Step 6: Etch the bottom layer 2 of the encapsulation protection layer, the two-dimensional material thin film layer 3, and the top layer 6 of the encapsulation protection layer to obtain an isolation area.

[0062] 6.1) Coating photoresist on the sample surface, exposing and developing the isolation area to be etched;

[0063] 6.2) Set the CF4 gas flow rate to 30 sccm, select Ar and O2 as auxiliary gases, the Ar gas flow rate is 5-10 sccm, the O2 gas flow rate is 2 sccm, the reaction pressure and RF power are set to 10 mTorr and 100 W respectively, and the etching time is about 8 minutes. Use CF4 plasma to selectively etch the top aluminum nitride;

[0064] 6.2) Setting the process conditions of gas flow rate, reaction pressure, and radio frequency power to 10 sccm, 30 mTorr, and 30 W, respectively, and etching time to about 3 min, and etching the molybdenum disulfide thin film layer using low-power oxygen plasma;

[0065] 6.3) Etch the bottom aluminum nitride again using CF4 plasma with the same parameters as step 6.1) for about 8 minutes to form an isolation area;

[0066] 6.4) After etching, remove the photoresist and clean the sample with acetone and IPA, then blow dry with nitrogen to ensure that there is no residue on the surface.

[0067] Step 7: Etch the top layer 6 of the encapsulation protection layer to obtain the source-drain contact area.

[0068] 7.1) Coating photoresist on the top surface of the packaging protection layer after cleaning, exposing and developing the source and drain contact areas to be etched;

[0069] 7.2) Use CF4 plasma with the same parameters as step 6.1) to etch the aluminum nitride on the top layer of the encapsulation protection layer to form the source and drain contact areas.

[0070] 7.3) After etching, remove the photoresist and clean the sample with acetone and IPA to ensure that there is no residue on the surface.

[0071] Step 8: Make source and drain electrodes 4 and 5.

[0072] 8.1) Mount the etched sample on the sample stage in the evaporation system and ensure that the sample surface is aligned with the target placement area;

[0073] 8.2) Select titanium as the target material and set the evaporation rate to To ensure the uniformity and adhesion of the titanium layer, the vacuum pump was turned on to evacuate to a high vacuum and then the electron beam current was gradually increased to start evaporating the Ti layer. After evaporation to a thickness of 20 nm in the source and drain contact area, the electron beam was turned off to stop evaporation, the target material was replaced with Au and the evaporation rate was set to Then, an Au layer is evaporated on the source and drain contact areas to a thickness of 80 nm;

[0074] 8.3) After the evaporation is completed, the sample is allowed to cool in the chamber for a few minutes, and then the air is slowly released to return to normal pressure, and then the sample is taken out and placed in acetone for stripping. After removing the excess metal layer, the source electrode 4 and the drain electrode 5 are formed.

[0075] Step 9: Making the gate electrode 7.

[0076] 9.1) Coating photoresist on the surface of the top layer 6 of the encapsulation protection layer, exposing, and developing to form a gate region where metal is to be deposited;

[0077] 9.2) Mount the sample on the sample stage in the evaporation system and ensure that the sample surface is aligned with the target placement area;

[0078] 9.3) Select Ni as the target material and set the evaporation rate to To ensure the uniformity and adhesion of the Ni layer, the vacuum pump was turned on to evacuate to a high vacuum and then the electron beam current was gradually increased to start evaporating the Ni layer. After evaporation to a thickness of 20 nm in the contact area between the source and drain, the electron beam was turned off to stop evaporation, the target material was replaced with Au and the evaporation rate was set to Then, an Au layer is evaporated on the source and drain contact areas to a thickness of 80 nm;

[0079] 9.4) After the evaporation is completed, the sample is allowed to cool in the chamber for a few minutes, and then the air is slowly released to return to normal pressure. The sample is taken out and placed in acetone for peeling. After removing the excess metal layer, the gate electrode is formed, completing the preparation process of the entire device.

[0080] Example 2: A transistor device is manufactured with a sapphire substrate, a 100nm silicon nitride bottom layer of the encapsulation protection layer, a 10nm molybdenum disulfide two-dimensional material, Cr / Au source and drain electrode metals, and a 50nm aluminum nitride top layer of the encapsulation protection layer.

[0081] Step 1: Pretreatment of transistor substrate 1 .

[0082] A 4- to 6-inch sapphire was selected as the transistor substrate 1, and the substrate 1 was ultrasonically cleaned in an acetone solution and isopropanol for 5 minutes each, and finally dried with nitrogen.

[0083] Step 2: magnetron sputtering the packaging protection layer bottom layer 2 on the substrate 1.

[0084] Under the process conditions of 20W power, 5sccm gas flow rate and about 10 minutes, the substrate surface is pretreated with low-power oxygen plasma to further improve the adhesion of the silicon nitride film;

[0085] Install the high-purity silicon target on the cathode and ensure that it is in good contact with the magnetron sputtering system. Start the vacuum pump until the chamber reaches 10 -6 After reaching a high vacuum degree below Torr, argon and nitrogen are introduced as working gases, with the gas flow rates of argon and nitrogen being 15 sccm, and the working pressure maintained at 3 mTorr;

[0086] After heating the sapphire substrate 1 to 300 degrees Celsius, a silicon nitride film is deposited on the substrate 1 as a bottom layer 2 of the encapsulation protection layer under process conditions of a sputtering power of 150 W and a sputtering time of 10 minutes;

[0087] After the deposition is completed, the sample is cooled to room temperature in the vacuum chamber, nitrogen is introduced to return the chamber to atmospheric pressure, the chamber is opened and the sample is taken out.

[0088] Step 3: Chemically vapor deposit the molybdenum disulfide to be transferred on another sapphire substrate.

[0089] The specific implementation of this step is the same as step 3 of embodiment 1.

[0090] Step 4: wet transfer of molybdenum disulfide onto the packaging protection layer bottom layer 2 as a two-dimensional material thin film layer 3.

[0091] The specific implementation of this step is the same as step 4 of embodiment 1.

[0092] Step 5: magnetron sputtering a top packaging protection layer 6 on the two-dimensional material thin film layer 3.

[0093] The specific implementation of this step is the same as step 5 of embodiment 1.

[0094] Step six: Etch the bottom layer 2 of the packaging protection layer, the two-dimensional material thin film layer 3, and the top layer 6 of the packaging protection layer to obtain an isolation area.

[0095] Coating photoresist on the sample surface, exposing and developing the isolation area to be etched;

[0096] Using CF4 plasma, the top layer of aluminum nitride was selectively etched under the process conditions of CF4 gas flow rate of 30 sccm, auxiliary gas Ar and O2 gas flow rates of 10 sccm and 2 sccm respectively, reaction pressure and RF power of 10 mTorr and 100 W respectively, and etching time of about 8 minutes;

[0097] The molybdenum disulfide thin film layer was etched using low-power oxygen plasma under process conditions of gas flow rate, reaction pressure, radio frequency power of 10 sccm, 30 mTorr, 30 W, and etching time of about 3 min.

[0098] The bottom silicon nitride was etched using CF4 plasma under the process conditions of CF4 and O2 gas flow rates of 30 sccm and 3 sccm, reaction pressure and RF power of 10 mTorr and 100 W, and etching time of about 10 min.

[0099] After etching, the photoresist was removed and the sample was cleaned with acetone and IPA, and then dried with nitrogen to ensure that there was no residue on the surface.

[0100] Step 7: Etch the top layer 6 of the packaging protection layer to obtain the source-drain contact area.

[0101] The specific implementation of this step is the same as step 7 of the first embodiment.

[0102] Step 8: Make source and drain electrodes 4 and 5.

[0103] Mount the etched sample on the sample stage in the evaporation system and ensure that the sample surface is aligned with the target placement area;

[0104] Select Cr as the target material and set the evaporation rate to To ensure the uniformity and adhesion of the Cr layer;

[0105] After the vacuum pump is turned on to evacuate to a high vacuum, the electron beam current is gradually increased to start evaporating the Cr layer. After the Cr layer is evaporated to a thickness of 20 nm in the contact area between the source and drain electrodes, the electron beam is turned off to stop evaporation.

[0106] Then replace the target material with Au and set the evaporation rate to Then, an Au layer is evaporated on the source and drain contact areas to a thickness of 80 nm;

[0107] After the evaporation is completed, the sample is allowed to cool in the chamber for a few minutes, and then the air is slowly released to return to normal pressure, and then the sample is taken out and placed in acetone for stripping. After removing the excess metal layer, the source electrode 4 and the drain electrode 5 are formed.

[0108] Step nine: making the gate electrode 7.

[0109] The specific implementation of this step is the same as step 9 of the first embodiment.

[0110] Example 3: A transistor device is manufactured with a substrate of diamond, a bottom layer of an encapsulation protection layer of 80nm silicon nitride, a two-dimensional material of 20nm tungsten disulfide, a source and drain electrode metal of Cr / Au, and a top layer of an encapsulation protection layer of 40nm hexagonal boron nitride.

[0111] Step A: Pretreatment of transistor substrate 1 .

[0112] A 4-6 inch diamond was selected as the transistor substrate 1, and the substrate 1 was ultrasonically cleaned in acetone solution and isopropanol for 5 minutes each, and finally dried with nitrogen.

[0113] Step B: magnetron sputtering a packaging protection layer bottom layer 2 on the substrate 1 .

[0114] B1) performing low-power oxygen plasma pretreatment on the substrate surface to further improve the adhesion of the silicon nitride film, and the pretreatment process conditions are: power of 20W, gas flow rate of 5sccm, and time of about 10 minutes;

[0115] B2) Install the high-purity silicon target on the cathode and ensure that it is in good contact with the magnetron sputtering system. Start the vacuum pump until the chamber reaches 10 -6 After reaching a high vacuum degree below Torr, argon and nitrogen are introduced as working gases, with the gas flow rates of argon and nitrogen being 15 sccm, and the working pressure maintained at 3 mTorr;

[0116] B3) After heating the diamond substrate 1 to 300 degrees Celsius, a silicon nitride film is deposited on the substrate 1 as a packaging protection layer bottom layer 2, and the sputtering process conditions are: sputtering power is 150W, and the sputtering time is 8 minutes;

[0117] B4) After the deposition is completed, the sample is cooled to room temperature in the vacuum chamber, nitrogen is introduced to return the chamber to atmospheric pressure, the chamber is opened and the sample is taken out.

[0118] Step C: chemically vapor depositing the tungsten disulfide to be transferred on another sapphire substrate.

[0119] C1) The sapphire substrate was ultrasonically cleaned with acetone for 20 minutes, the cleaned substrate was rinsed with deionized water for 2 to 3 times, and then immersed in deionized water for ultrasonic cleaning for 15 minutes, and finally the treated substrate was blown dry with nitrogen;

[0120] C2) Use high-purity WO3 powder as tungsten source and high-purity sulfur powder as sulfur source. Place WO3 powder in a quartz boat in the high-temperature zone, place high-purity sulfur powder in the low-temperature zone of the furnace tube near the exit, and place the cleaned sapphire substrate with the substrate surface facing upward in an area about a few centimeters away from the WO3 powder to facilitate the growth of WS2;

[0121] C3) setting an argon-hydrogen mixed gas, with the gas flow rates of argon and hydrogen being 100 sccm and 10 sccm respectively, keeping the gas flow constant during the deposition process, turning on the tubular furnace, setting the heating rate to 20°C / min, heating the WO3 powder area to 800°C, and the temperature of the sulfur powder area to 200°C. When the temperature reaches the set value, keeping the constant temperature for about 10 minutes, at which time the sulfur vapor reacts with the WO3 on the substrate to generate tungsten disulfide, and growing a 20nm tungsten disulfide film to be transferred;

[0122] C4) After the reaction is completed, turn off the heating and keep argon flowing until the system cools naturally to room temperature to prevent tungsten disulfide from being oxidized at high temperature.

[0123] Step D: wet transfer of tungsten disulfide onto the packaging protection layer bottom layer 2 as a two-dimensional material thin film layer 3.

[0124] The specific implementation of this step is the same as step 4 of embodiment 1.

[0125] Step E: Transferring hexagonal boron nitride onto the two-dimensional material thin film layer 3 as the top layer 6 of the encapsulation protection layer.

[0126] E1) h-BN uses a large area 40nm thick h-BN film purchased, and a small amount of PMMA solution is evenly dropped on the surface of the h-BN film substrate. The film is spun at 3000 rpm for 1 minute using a spin coating device, and then dried on a hot plate at 100°C for 10 minutes to solidify the PMMA layer;

[0127] E2) Soaking the sample in a prepared hot concentrated NaOH solution to gradually separate the PMMA-hBN layer from the substrate, with the PMMA-hBN film floating on the surface of the solution;

[0128] E3) Rinse the PMMA-hBN film in deionized water, use tweezers or other auxiliary tools to gently pick up the PMMA-hBN film floating on the water surface and slowly place it on the two-dimensional material film layer 3, then press gently with a glass rod or a scraper to remove bubbles between the PMMA-hBN film and the substrate to ensure full contact and adhesion, and then let it stand for several hours to allow the film to fully adhere;

[0129] E4) Soak the sample in acetone to remove PMMA, then clean it with IPA, and finally blow dry it with nitrogen.

[0130] Step F: Etching the bottom layer 2 of the encapsulation protection layer, the two-dimensional material thin film layer 3, and the top layer 6 of the encapsulation protection layer to obtain an isolation area.

[0131] F1) coating a photoresist on the sample surface, exposing and developing the isolation area to be etched;

[0132] F2) etching the top layer of hexagonal boron nitride, and the etching process conditions are:

[0133] The CHF3 and O2 gas flow rates were 40 sccm and 5 sccm, respectively, the reaction pressure and RF power were 10 mTorr and 100 W, respectively, and the etching time was about 10 min;

[0134] F3) Etching the tungsten disulfide film layer, the etching process conditions are:

[0135] The O2 gas flow rate, reaction pressure, and RF power were 10 sccm, 20 mTorr, and 30 W, respectively, and the etching time was about 10 min;

[0136] F4) Etching the bottom silicon nitride, the etching process conditions are:

[0137] The CF4 and O2 gas flow rates are 30 sccm and 3 sccm, the reaction pressure and RF power are 10 mTorr and 100 W respectively, and the etching time is about 8 min;

[0138] F5) After etching, remove the photoresist and clean the sample with acetone and IPA, then blow dry with nitrogen to ensure that there is no residue on the surface.

[0139] Step G: Etching the top layer 6 of the packaging protection layer to obtain the source-drain contact area.

[0140] G1) coating a photoresist on the top surface of the packaging protection layer after cleaning, exposing, and developing to obtain a source-drain contact area to be etched;

[0141] G2) etching the top layer of hexagonal boron nitride to obtain source-drain contact areas, and the process conditions are:

[0142] The CHF3 and O2 gas flow rates are 40 sccm and 5 sccm respectively, the reaction pressure and RF power are 10 mTorr and 100 W respectively, and the etching time is about 10 min.

[0143] Step H: Making source and drain electrodes.

[0144] The specific implementation of this step is the same as step eight of embodiment 2.

[0145] Step I: Fabricate the gate electrode.

[0146] The specific implementation of this step is the same as step 9 of the first embodiment.

[0147] The above descriptions are only three specific examples of the present invention, and do not constitute any limitation to the present invention. Obviously, for professionals in this field, after understanding the content and principle of the present invention, various modifications and changes in form and details may be made without deviating from the principle and result of the present invention. For example, in addition to SiO2, sapphire, and diamond, other insulating substrate materials can be used for the insulating substrate; in addition to molybdenum disulfide, tungsten disulfide can also be used in tungsten diselenide or other two-dimensional semiconductor materials that will be oxidized and decomposed; in addition to chemical vapor deposition and transfer, the two-dimensional material thin film layer can also be obtained by mechanical stripping and transfer; in addition to the above combination of aluminum nitride, boron nitride and silicon nitride, the encapsulation protection bottom layer and the encapsulation protection top layer can also be used. In addition to the above combination of aluminum nitride, boron nitride and silicon nitride, other combinations of aluminum nitride, boron nitride and silicon nitride can also be used; in addition to Ti / Au or Cr / Au, the source and drain metal electrodes can also use other metals that are compatible with the electrical properties of the two-dimensional material. However, these modifications and changes based on the ideas of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A high-temperature thermally stable two-dimensional field effect transistor, comprising from bottom to top: a substrate (1), a packaging protection bottom layer (2), a two-dimensional material thin film layer (3), a packaging protection top layer (6), and a gate electrode (7), wherein the two ends of the two-dimensional material thin film layer (3) are a source electrode (4) and a drain electrode (5), characterized in that: The encapsulation protection bottom layer (2) and the encapsulation protection top layer (6) are both made of any one or more combinations of aluminum nitride, boron nitride and silicon nitride, so as to prevent oxygen molecules in the air from diffusing into the two-dimensional material film layer to react at high temperatures, thereby playing a role in high temperature protection; The two-dimensional material thin film layer (3) is made of one of molybdenum disulfide, tungsten disulfide, tungsten diselenide, or other two-dimensional semiconductor materials that can be oxidized and decomposed.

2. The transistor according to claim 1, characterized in that: The thickness of the encapsulation protection bottom layer (2) is 40 to 100 nm; The thickness of the encapsulation protection top layer (6) is 40-60 nm; The thickness of the two-dimensional material thin film layer (3) is in the nanometer scale.

3. The transistor according to claim 1, characterized in that The substrate (1) is made of any one of SiO2 / Si, sapphire, diamond or other insulating substrate materials.

4. The transistor according to claim 1, characterized in that: The gate electrode (7) is made of Ni / Au material; The source electrode (4) and the drain electrode (5) are both made of Ti / Au or Cr / Au or other metals that are compatible with the electrical properties of the two-dimensional material.

5. A method for manufacturing a high-temperature thermally stable two-dimensional field effect transistor, characterized in that: The steps include: §1: Select the target substrate, use acetone, isopropanol, and deionized water to ultrasonically clean its surface, and then blow dry it with nitrogen to ensure that the surface is clean and flat; §2: Obtaining a packaging protection bottom layer (2) on the substrate by metal organic chemical vapor deposition or magnetron sputtering or transfer method; §3: Using chemical vapor deposition to grow a thin film of the two-dimensional material to be transferred on another substrate surface; §4: Using a PMMA-assisted transfer method, the grown two-dimensional material film is transferred to the packaging protection bottom layer as a two-dimensional material film layer of the transistor (3); §5: On the substrate to which the two-dimensional material has been transferred, a top encapsulation protection layer (6) is obtained by metal organic chemical vapor deposition or magnetron sputtering or transfer method; §6: Evenly coating the surface of the top package protection layer with photoresist, performing pre-baking and photolithography, and then etching the top package protection layer, the two-dimensional material film, and the bottom package protection layer in sequence to obtain an isolation area; §7: After etching the isolation area, the top layer of the package protection is etched again by conventional photolithography to make the contact area of ​​the source and drain electrodes; §8: Depositing the metal of the source and drain electrodes in the etched source and drain regions by an electron beam evaporation system. After the metal is deposited, a stripping process is performed to form the source electrode (4) and the drain electrode (5); §9: The top gate metal electrode (7) is prepared by photolithography, electron beam evaporation and lift-off process to complete the device manufacturing.

6. The method according to claim 5, characterized in that: The metal organic chemical vapor deposition in step §2 and step §5 is to select the reaction precursor according to the type of packaging protective layer, control the working gas flow rate, select the growth time according to the required thickness at the reaction chamber temperature and a low pressure of 10 to 20 Torr, and grow the packaging protective bottom layer or top layer on the substrate or the two-dimensional material thin film layer.

7. The method according to claim 5, characterized in that: The magnetron sputtering in step §2 and step §5 is to heat the substrate to a set temperature, use the corresponding target material and working gas according to the type of packaging protective layer, and use the magnetron sputtering system to control the sputtering time according to the required thickness at the reaction chamber temperature to grow the packaging protective bottom layer or top layer on the substrate or the two-dimensional material thin film layer.

8. The method according to claim 5, characterized in that: In step §3, chemical vapor deposition is used to grow a two-dimensional material film to be transferred on another substrate surface, and the implementation steps include the following: 3a) Selecting reaction precursors according to the type of two-dimensional material film to be grown, and placing different types of reaction precursors in the high temperature zone and low temperature zone of the tube furnace respectively according to the reaction requirements; 3b) placing a clean substrate for growing a two-dimensional material film in an area about a few centimeters away from the sample in the high temperature zone to facilitate film growth; 3c) Setting the working gas, keeping the gas flow constant during the deposition process, raising the temperature at a rate of 15-20°C / min until the set working temperature is reached, and then controlling the reaction time according to the desired thickness of the two-dimensional material film layer to obtain the two-dimensional material film to be transferred.

9. The method according to claim 5, characterized in that: The transfer method in step §2, step §4 and step §5 is implemented as follows: Spin-coat PMMA on the surface of the layer to be transferred and cure it on a hot plate at 90-120°C; The sample was placed in a solution required for separating the substrate and immersed for two hours to separate the PMMA-to-be-transferred layer from its substrate; The separated floating PMMA-to-be-transferred layer is transferred to the target substrate for curing, and then soaked with acetone to remove PMMA, then cleaned with IPA, and finally blown dry with nitrogen.

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