Multi-core parallel block chain intelligent contract scheduling method and system

By adopting a multi-core parallel blockchain smart contract scheduling method in the smart contract system, using scheduler and DMA to achieve parallel processing and efficient transmission of smart contracts, the problem of low execution efficiency in the existing technology is solved and the overall performance of the system is improved.

CN119576808APending Publication Date: 2025-03-07BEIJING MICROCHIP EDGE COMPUTING RES INST
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Patent Information

Application Number
CN202411637473.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-15
Publication Date
2025-03-07

AI Technical Summary

Technical Problem

The existing smart contract system has low request scheduling between execution units, resulting in low execution efficiency of smart contracts.

Method used

The multi-core parallel blockchain smart contract scheduling method is adopted, and the write request and read request of the smart contract processing unit is received through the scheduler, the polling and arbitration mechanism is used for authorization, and the contract is transported and processed by DMA, so as to realize parallel processing and efficient transmission of smart contracts.

Benefits of technology

Through parallel processing of smart contract processing units, full-duplex communication of read and write channels and time-division multiplexing, the execution efficiency and transmission efficiency of smart contracts are improved, and the frequency of software operations is reduced.

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Abstract

The invention discloses a multi-core parallel block chain smart contract scheduling method and system, and the method comprises the steps: sequentially receiving write requests sent by a plurality of smart contract processing units, storing the write requests in a write polling queue, and carrying out the authorization of the write requests in the write polling queue through a polling arbitration mechanism; a DMA is configured, so that the DMA searches a corresponding smart contract from a system memory according to the write request and carries the smart contract to the smart contract processing unit with successful arbitration authorization, and the smart contract processing unit with successful arbitration authorization executes the smart contract; sequentially receiving read requests sent after the execution of the intelligent contract processing unit is completed, putting the read requests into a read polling queue, authorizing a plurality of read requests in the read polling queue by adopting a polling arbitration mechanism, and configuring DMA (Direct Memory Access), and the DMA carries the smart contract processing in the smart contract processing unit which successfully sends the arbitration authorization to an address corresponding to the system memory. According to the invention, efficient processing and transmission of the smart contract are realized.
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Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a smart contract scheduling method and system. Background Art

[0002] With the booming development of public chains such as Ethereum and Aleo, and consortium chains such as Hyperledger Fabric and Changan Chain, business scenarios such as financial services, supply chain management, and digital identity authentication have increasingly strong demands for a decentralized, efficient, transparent, and secure contract execution mechanism, and smart contracts have emerged as the times require. Smart contracts, as an automated contract based on blockchain technology, are computer programs that run on blockchains, and these programs can automatically execute contract terms. At present, smart contracts can execute many different types of contracts, such as currency transfers, digital securities, voting, etc., and can be applied to various scenarios, such as finance, logistics, and medical fields. Therefore, the use of smart contracts is of great significance. Its use avoids manual intervention such as manual processing and auditing in the traditional financial system; avoids fraud and data tampering, ensures the security and reliability of transactions; does not require the control of any centralized institution or individual, and realizes a decentralized transaction method, thereby reducing the cost of trust.

[0003] However, if we want smart contracts built on various blockchain platforms to be adopted by various business scenarios and shine, we need to focus on the execution efficiency of smart contracts. Existing smart contract systems are mainly implemented through multi-core parallel stacking methods, such as Chinese patent CN112882774A "Parallel execution of smart contract chip device and method, blockchain node device", which accelerates the execution efficiency of smart contracts through multi-core parallel execution, but does not mention how to schedule requests between smart contract execution units. Efficient request retrieval can make smart contracts more efficient, so how to obtain a method for scheduling smart contract requests to make smart contracts more efficient has become an urgent problem to be solved.

[0004] Chinese patent CN 111724256 A "A method for optimizing the execution of smart contracts based on multi-core architecture" solves the frequent context switching of threads and the blocking of read-write locks by introducing Spinlock and MVCC, and realizes the optimization of smart contract execution in multi-core architecture by grouping conflicting transactions and using double-ended queues to realize transaction parallelization. However, this method is based on the existing general-purpose CPU to realize smart contract processing, and the processing rate of smart contracts is still relatively low. Summary of the invention

[0005] Based on this, in response to the above technical problems, a multi-core parallel blockchain smart contract scheduling method and system are provided to improve the execution efficiency of smart contracts.

[0006] In a first aspect, a multi-core parallel blockchain smart contract scheduling method is applied to a scheduler module, the method comprising:

[0007] Receive write requests sent by multiple smart contract processing units in sequence and store them in the write polling queue, and use the polling arbitration mechanism to authorize the write requests in the write polling queue;

[0008] Calculate and save the address, length, and type of the contract to be processed in the write request sent by the successfully authorized smart contract processing unit in the system memory, and configure DMA so that DMA will search for the corresponding current smart contract from the system memory according to the write request sent by the successfully authorized smart contract processing unit and transfer it to the successfully authorized smart contract processing unit, so that the successfully authorized smart contract processing unit can execute it;

[0009] The read requests sent by the smart contract processing unit after execution are received in sequence and placed in the read polling queue. The multiple read requests in the read polling queue are authorized using a polling arbitration mechanism. The DMA is configured according to the address, length, and type of the contract to be processed stored in the system memory by the smart contract processing unit that has successfully received arbitration authorization, so that the DMA can move the smart contract processing in the smart contract processing unit that has successfully received arbitration authorization to the corresponding address in the system memory.

[0010] In the above solution, optionally, the polling arbitration mechanism adopts RR polling.

[0011] In the above solution, optionally, the method further includes: receiving a control instruction from a CPU, and executing the control instruction.

[0012] In the above scheme, further optionally, the calculating and saving of the address, length, and type of the contract to be processed in the system memory in the write request sent by the smart contract processing unit that has successfully authorized the arbitration includes:

[0013] The address and length of the contract to be processed in the system memory are calculated based on the smart contract starting address, contract length, and contract quantity configured by the CPU.

[0014] In a second aspect, a multi-core parallel blockchain smart contract scheduling system, the system comprising: a DMA, a system memory, a scheduler, and a plurality of smart contract processing units;

[0015] The smart contract processing unit is used to generate a write request, execute the smart contract and generate a read request after the execution is completed;

[0016] The scheduler is used to sequentially receive write requests sent by multiple smart contract processing units and store them in a write polling queue, and to authorize the write requests sent by multiple smart contract processing units in the write polling queue using a polling arbitration mechanism; calculate and save the address, length, and type of the contract to be processed in the system memory in the write request sent by the successfully authorized smart contract processing unit, and configure DMA; it is also used to sequentially receive read requests sent by the smart contract processing unit after the execution is completed and put them into a read polling queue, and to authorize multiple read requests in the read polling queue using a polling arbitration mechanism, and configure DMA according to the address, length, and type of the contract to be processed in the system memory corresponding to the smart contract processing unit that successfully authorized the arbitration;

[0017] The DMA is used to find the corresponding current smart contract from the system memory and transfer it to the smart contract processing unit that has successfully obtained the arbitration authorization according to the write request sent by the smart contract processing unit that has successfully obtained the arbitration authorization; it is also used to transfer the smart contract processing in the smart contract processing unit that has successfully obtained the arbitration authorization to the corresponding address in the system memory.

[0018] In the above scheme, optionally, the smart contract processing unit includes an internal memory and a processor core.

[0019] In the above scheme, optionally, the system also includes: a CPU, used to control DMA, system memory, a scheduler and multiple smart contract processing units.

[0020] In the above scheme, optionally, the scheduler is used to calculate the address and length of the contract to be processed in the system memory according to the smart contract starting address, contract length, and contract quantity configured by the CPU.

[0021] In a third aspect, a computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of a multi-core parallel blockchain smart contract scheduling method described in the first aspect are implemented.

[0022] In a fourth aspect, a computer program product includes a computer program / instruction, which, when executed by a processor, implements the steps of a multi-core parallel blockchain smart contract scheduling method described in the first aspect above.

[0023] This application has at least the following beneficial effects:

[0024] This application receives write requests from multiple smart contract processing units through a scheduler, and enables DMA to retrieve smart contracts from system memory and transfer them to smart contract processing units for processing according to the current contract to be processed in the write request, and after the smart contract processing unit completes the processing, transfers the contract execution result from the smart contract processing unit to the system memory. This improves the efficient processing and transmission of smart contracts through parallel processing of smart contract processing units, full-duplex communication of read and write channels, and time division multiplexing of each channel. At the same time, DMA is automatically calculated and configured to avoid frequent software operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A flowchart of a multi-core parallel blockchain smart contract scheduling method provided for one embodiment of the present application;

[0026] Figure 2 A processing flow chart of a single smart contract using a multi-core parallel blockchain smart contract scheduling method provided in one embodiment of the present application;

[0027] Figure 3 A timeline of the processing flow of multiple smart contracts in one embodiment of the present application;

[0028] Figure 4 A module architecture block diagram of a multi-core parallel blockchain smart contract scheduling system provided for one embodiment of the present application;

[0029] Figure 5 A diagram of the structure of a smart contract processing module provided for one embodiment of the present application;

[0030] Figure 6 A diagram of a scheduler structure provided for one embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0032] In one embodiment, Figure 1 As shown, a multi-core parallel blockchain smart contract scheduling method is provided, which is applied to a scheduler module, and the method includes:

[0033] Step S1: receiving write requests sent by multiple smart contract processing units in sequence and storing them in a write polling queue, and authorizing the write requests in the write polling queue using a polling arbitration mechanism;

[0034] Step S2: Calculate and save the address, length, and type of the contract to be processed in the write request sent by the arbitration-authorized smart contract processing unit in the system memory, and configure DMA so that DMA will search for the corresponding current smart contract from the system memory according to the write request sent by the arbitration-authorized smart contract processing unit and transfer it to the arbitration-authorized smart contract processing unit, so that the arbitration-authorized smart contract processing unit can execute it;

[0035] Step S3: sequentially receive the read requests sent by the smart contract processing unit after execution and put them into the read polling queue, use the polling arbitration mechanism to authorize multiple read requests in the read polling queue, and configure DMA according to the address, length, and type of the contract to be processed stored in the system memory by the smart contract processing unit that has successfully received arbitration authorization, so that DMA can move the smart contract processing in the smart contract processing unit that has successfully received arbitration authorization to the corresponding address in the system memory.

[0036] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0037] In this embodiment, if Figure 2As shown, the general workflow when the system starts working is as follows: start the main control CPU; software configures the scheduler, mainly including the address, length, type, etc. of the smart contract in the system memory; the scheduler starts the smart contract processing unit; the smart contract processing unit initiates a contract write request; the scheduler processes the write request queue, and obtains the write target smart contract processing unit after polling arbitration; the scheduler calculates the address and control information of the contract; the scheduler configures DMA according to the calculation result; DMA moves the smart contract from the system memory to the target smart contract processing unit authorized by arbitration; the target smart contract processing unit executes the contract; after the contract execution is completed, a contract read request is initiated to the scheduler; the scheduler processes the read request queue, and obtains the read target smart contract processing unit after polling arbitration; the scheduler calculates the address and control information of the contract according to the arbitration result; the scheduler configures DMA according to the calculation result; DMA moves the smart contract from the target processing unit to the system memory. In this way, the processing of a single smart contract is realized.

[0038] When the system is working normally, the processing flow of a large number of single contracts is reused in time to improve the efficiency of the system. The timeline of the processing flow of multiple smart contracts is as follows: Figure 3As shown in the figure, taking the same type of smart contract processing as an example, it shows the time sequence of multiple smart contracts in transfer and execution. W0 means that the write request queue of smart contract processing unit 0 has been authorized by arbitration, and the same applies to W1, W2, and W3; EXU0 means that smart contract processing unit 0 is executing the contract, and the same applies to EXU1, EXU2, and EXU3; R0 means that the read request queue of smart contract processing unit 0 has been authorized by arbitration, and the same applies to R1, R2, and R3; it can be seen that as time goes on, different types of contracts can reach the state of reading channels, writing channels, and all smart contract processing units working at the same time at the same time. The specific process is as follows: at T0, the scheduler receives write requests from four processing units. The scheduler authorizes processing unit 0 according to priority arbitration, calculates the configuration information, and then calls DMA to move the contract from the system memory to processing unit 0; at T1, processing unit 0 starts to execute the smart contract (assuming that the execution of a smart contract requires four time units). At the same time, the scheduler authorizes the write request of processing unit 1, and also calculates the configuration information and calls DMA to move the contract; at T2, processing unit 1 starts to execute the smart contract, and processing unit 0 is also executing the smart contract. The scheduler authorizes the write request of processing unit 2, calculates the configuration information and calls DMA to move the contract; at T3, processing unit 2 starts to execute the smart contract, and processing units 0 and 1 are also executing the smart contract. The scheduler authorizes the write request of processing unit 3, calculates the configuration information and calls DMA to move the contract; at T4, processing unit 3 starts to execute the smart contract, and processing units 0, 1, and 2 are also executing the smart contract. All processing units are working and there are no more write requests. At T5, processing unit 0 completes the contract execution and initiates a read request to the scheduler. The scheduler authorizes the read request of processing unit 0, calculates the configuration information and calls DMA to move the contract result. At T6, after the contract result of processing unit 0 is moved out, it will initiate a write request to the scheduler again. The scheduler also authorizes, calculates and moves the contract. At the same time, processing unit 1 also completes the contract execution and initiates a read request to the scheduler. The scheduler authorizes the read request of processing unit 1 and also calculates and moves the contract result. At this time, the contracts of processing units 2 and 3 are also being executed. In this way, the efficient operation of the system is achieved through parallel processing units and scheduling mechanisms.

[0039] In the above multi-core parallel blockchain smart contract scheduling method, the scheduler receives write requests from multiple smart contract processing units, and enables DMA to retrieve the smart contract from the system memory according to the current contract to be processed by the write request and transfer it to the smart contract processing unit for processing. After the smart contract processing unit completes the processing, the contract execution result is transferred from the smart contract processing unit to the system memory. In this way, the parallel processing of the smart contract processing unit, full-duplex communication of the read and write channels, and time division multiplexing of each channel improve the efficient processing and transmission of smart contracts. At the same time, DMA is automatically calculated and configured to avoid frequent software operations.

[0040] In one embodiment, the polling arbitration mechanism adopts RR polling.

[0041] In one embodiment, the method further includes: receiving a control instruction from a CPU, and executing the control instruction.

[0042] In one embodiment, the calculating and saving of the address, length, and type of the contract to be processed in the system memory in the write request sent by the smart contract processing unit that has successfully authorized the arbitration includes:

[0043] The address and length of the contract to be processed in the system memory are calculated based on the smart contract starting address, contract length, and contract quantity configured by the CPU.

[0044] In one embodiment, a multi-core parallel blockchain smart contract scheduling system is provided, the system comprising: a DMA, a system memory, a scheduler, and a plurality of smart contract processing units;

[0045] The smart contract processing unit is used to generate a write request, execute the smart contract and generate a read request after the execution is completed;

[0046] The scheduler is used to sequentially receive write requests sent by multiple smart contract processing units and store them in a write polling queue, and to authorize the write requests sent by multiple smart contract processing units in the write polling queue using a polling arbitration mechanism; calculate and save the address, length, and type of the contract to be processed in the system memory in the write request sent by the successfully authorized smart contract processing unit, and configure DMA; it is also used to sequentially receive read requests sent by the smart contract processing unit after the execution is completed and put them into a read polling queue, and to authorize multiple read requests in the read polling queue using a polling arbitration mechanism, and configure DMA according to the address, length, and type of the contract to be processed in the system memory corresponding to the smart contract processing unit that successfully authorized the arbitration;

[0047] The DMA is used to find the corresponding current smart contract from the system memory and transfer it to the smart contract processing unit that has successfully obtained the arbitration authorization according to the write request sent by the smart contract processing unit that has successfully obtained the arbitration authorization; it is also used to transfer the smart contract processing in the smart contract processing unit that has successfully obtained the arbitration authorization to the corresponding address in the system memory.

[0048] In this embodiment, if Figure 4 As shown, the memory is used to store smart contracts and contract execution results; DMA (direct memory access) is used to move data between the memory and the smart contract processing unit; the scheduler is mainly used to configure DMA and scheduling control; the system bus and internal bus use the AXI bus for read-write full-duplex communication; the smart contract processing unit is a subsystem consisting of a lightweight RISC-V processor core and internal memory.

[0049] Specifically, the smart contract processing unit mainly includes a 32-bit RISC-V processor core for executing smart contracts. The internal memory is RISC-V's ITCM (Instruction Tightly Coupled Memory) and DTCM (Data Tightly Coupled Memory), which are used to store smart contract codes and transaction data, respectively, as follows Figure 5 As shown. The scheduler controls DMA to move data from system memory to internal memory, the RISC-V processor core runs the contract code and writes the result back to the internal memory, and then the scheduler controls DMA to move the contract result in the internal memory back to the system memory. The RISC-V processor core will initiate read and write queue requests to the scheduler. When the internal memory is empty, it will initiate a write queue request to request that the contract be moved to the processing unit; when the contract is executed, it will initiate a read queue request to request that the contract result be moved out of the processing unit.

[0050] Specifically, as follows Figure 6 As shown, the scheduler module is the main control unit of the system, responsible for queue processing, scheduling control, address calculation, DMA configuration, etc. The system includes two queues, write and read, which independently process the write and read requests issued by the smart contract processing unit. The queue depth depends on the number of smart contract processing units, and each processing unit uniquely corresponds to a queue element. The polling processing of the queue adopts the RR (Round Robin) polling scheme. RR polling can achieve a balance between multiple queue requests, thereby improving the reliability and efficiency of the system. The basic idea is that when a request is authorized, its priority is reduced to the lowest in the subsequent arbitration. That is to say, the priority of each request is not fixed, but will become the lowest after the highest, and will be adjusted according to the authorization status of other requests. Table 1 is used as an example to illustrate:

[0051] Table 1

[0052] time ask response T0 0000 0000 T1 1111 0001 T2 1110 0010 T3 1101 0100 T4 1011 1000

[0053] like Figure 3 As shown in the figure, the numbers in the request represent the priorities of the write requests from the four queues W3-W0. At the beginning, the priorities of the four write requests are all 1. At time T1, W0 is responded to, so its priority drops from 1 to 0, so the overall priority at time T2 is 1110. Similarly, at time T2, W1 is responded to, its priority drops from 1 to 0, and the priority of W0 is restored to 1.

[0054] After polling arbitration, the read and write pointers are obtained. The scheduling control obtains the source processing unit of the current smart contract according to the read pointer, and obtains the destination processing unit of the current smart contract according to the write pointer. That is, the read pointer determines from which processing unit the contract processing result is transferred to the system memory, and the write pointer determines to which processing unit the smart contract is moved from the system memory.

[0055] The address calculation will calculate the address of the current contract in the main memory according to the smart contract starting address, contract length, and contract quantity configured by the CPU, and send the address to the DMA configuration module to instruct DMA to move the contract. The address will also be recorded in the internal register to instruct DMA to move the contract result back to the original location after the smart contract is completed.

[0056] DMA is configured through hardware in the system. After obtaining the polling pointer, the scheduling control starts the address calculation of the corresponding smart contract. After receiving the DMA start request, contract type, contract size, and contract address of the address calculation unit from the scheduling control, the DMA configuration module configures the DMA module. DMA realizes data transfer between the system memory and the processing unit according to the configuration information.

[0057] In one embodiment, the smart contract processing unit includes an internal memory and a processor core.

[0058] In one embodiment, the system further includes: a CPU for controlling DMA, system memory, a scheduler, and multiple smart contract processing units.

[0059] In one embodiment, the scheduler is used to calculate the address and length of the contract to be processed in the system memory according to the smart contract starting address, contract length, and contract quantity configured by the CPU.

[0060] For the specific definition of a multi-core parallel blockchain smart contract scheduling system, please refer to the definition of a multi-core parallel blockchain smart contract scheduling method above, which will not be repeated here. Each module in the above-mentioned multi-core parallel blockchain smart contract scheduling system can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0061] In one embodiment, a computer device is provided, which may be a server. The computer device includes a processor, a memory, and a network interface connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, the above-mentioned multi-core parallel blockchain smart contract scheduling method is implemented.

[0062] In one embodiment, a computer program product is also provided, including a computer program / instruction. When the computer program / instruction is executed by a processor, it involves all or part of the process in the above-mentioned embodiment method.

[0063] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0064] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0065] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A multi-core parallel blockchain smart contract scheduling method, characterized in that: Applied to the scheduler module, the method comprises: Receive write requests sent by multiple smart contract processing units in sequence and store them in the write polling queue, and use the polling arbitration mechanism to authorize the write requests in the write polling queue; Calculate and save the address, length, and type of the contract to be processed in the write request sent by the successfully authorized smart contract processing unit in the system memory, and configure DMA so that DMA will search for the corresponding current smart contract from the system memory according to the write request sent by the successfully authorized smart contract processing unit and transfer it to the successfully authorized smart contract processing unit, so that the successfully authorized smart contract processing unit can execute it; The read requests sent by the smart contract processing unit after execution are received in sequence and placed in the read polling queue. The multiple read requests in the read polling queue are authorized using a polling arbitration mechanism. The DMA is configured according to the address, length, and type of the contract to be processed stored in the system memory by the smart contract processing unit that has successfully received arbitration authorization, so that the DMA can move the smart contract processing in the smart contract processing unit that has successfully received arbitration authorization to the corresponding address in the system memory.

2. The multi-core parallel blockchain smart contract scheduling method according to claim 1 is characterized in that: The polling arbitration mechanism adopts RR polling.

3. The multi-core parallel blockchain smart contract scheduling method according to claim 1 is characterized in that: The method further includes: receiving a control instruction from a CPU, and executing the control instruction.

4. The multi-core parallel blockchain smart contract scheduling method according to claim 3 is characterized in that: The calculation and storage of the address, length, and type of the contract to be processed in the write request sent by the smart contract processing unit that has successfully authorized the arbitration in the system memory includes: The address and length of the contract to be processed in the system memory are calculated based on the smart contract starting address, contract length, and contract quantity configured by the CPU.

5. A multi-core parallel blockchain smart contract scheduling system, characterized in that: The system includes: DMA, system memory, scheduler, and multiple smart contract processing units; The smart contract processing unit is used to generate a write request, execute the smart contract and generate a read request after the execution is completed; The scheduler is used to sequentially receive write requests sent by multiple smart contract processing units and store them in a write polling queue, and to authorize the write requests sent by multiple smart contract processing units in the write polling queue using a polling arbitration mechanism; calculate and save the address, length, and type of the contract to be processed in the system memory in the write request sent by the successfully authorized smart contract processing unit, and configure DMA; it is also used to sequentially receive read requests sent by the smart contract processing unit after the execution is completed and put them into a read polling queue, and to authorize multiple read requests in the read polling queue using a polling arbitration mechanism, and configure DMA according to the address, length, and type of the contract to be processed in the system memory corresponding to the smart contract processing unit that successfully authorized the arbitration; The DMA is used to find the corresponding current smart contract from the system memory and transfer it to the smart contract processing unit that has successfully obtained the arbitration authorization according to the write request sent by the smart contract processing unit that has successfully obtained the arbitration authorization; it is also used to transfer the smart contract processing in the smart contract processing unit that has successfully obtained the arbitration authorization to the corresponding address in the system memory.

6. The multi-core parallel blockchain smart contract scheduling system according to claim 5, characterized in that: The smart contract processing unit includes an internal memory and a processor core.

7. The multi-core parallel blockchain smart contract scheduling system according to claim 5, characterized in that: The system also includes: a CPU for controlling DMA, system memory, a scheduler and multiple smart contract processing units.

8. The multi-core parallel blockchain smart contract scheduling system according to claim 5, characterized in that: The scheduler is used to calculate the address and length of the contract to be processed in the system memory according to the smart contract starting address, contract length, and contract quantity configured by the CPU.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 4 are implemented.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.

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