Fast and self-adaptive oscillator frequency calibration method, circuit and oscillator system

Abstract

The invention provides a quick and self-adaptive oscillator frequency calibration method and circuit, an oscillator system, equipment and a medium, and the method comprises the steps: controlling an oscillator to complete initialization frequency calibration, then entering an open-loop state, and controlling the oscillator to enter a closed-loop state from the open-loop state after a second set time, obtaining the actual frequency output by the oscillator, and comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment word bit; and according to the adjustment word bit and the reference clock signal, sequentially adjusting the control words from the adjustment word bit to the low bit so as to carry out frequency recalibration on the oscillator, so that the oscillator outputs the set frequency, and the oscillator is controlled to enter an open-loop state from a closed-loop state. Therefore, the frequency of the oscillator can be quickly calibrated under the condition that the output frequency of the oscillator fluctuates slightly, and the power consumption of the loop is reduced.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a fast and adaptive oscillator frequency calibration method, circuit, oscillator system, equipment and medium. Background Art

[0002] Clock circuits are widely used in the field of Internet of Things technology, especially in the fields of wake-up receivers and variable intermediate frequency receivers.

[0003] Current transceivers often require the use of a phase-locked loop (PLL), or a frequency calibration loop based on a counter can be used to generate a clock signal, which also has the advantages of simple structure, low power consumption and small area.

[0004] In actual use, after the oscillator has been working in an open loop for a period of time, it will be affected by the environment, causing a certain deviation in the frequency output by the oscillator, thereby affecting the accuracy of the output clock signal. In this case, the frequency of the oscillator output needs to be recalibrated. However, the phase-locked loop is relatively complex and its power consumption is relatively high. The counter-based frequency calibration loop requires a long period of calibration to output the frequency control word, thereby controlling the frequency accuracy of the clock signal output by the oscillator to meet the requirements. In this process, the frequency of the oscillator output fluctuates greatly, which is not conducive to the reliability of the system.

[0005] Therefore, how to quickly calibrate the frequency of the oscillator while reducing the power consumption of the loop when the frequency fluctuation of the oscillator output is small has become a technical problem that urgently needs to be solved in the industry. Summary of the invention

[0006] The present invention provides a fast and adaptive oscillator frequency calibration method, circuit, oscillator system, device and medium to solve the problem of how to quickly calibrate the frequency of the oscillator while reducing the power consumption of the loop when the frequency fluctuation of the oscillator output is small.

[0007] According to a first aspect of the present invention, there is provided a fast and adaptive oscillator frequency calibration method for calibrating the frequency of an oscillator based on a counter, wherein the oscillator is electrically connected to the counter, and the method comprises:

[0008] Controlling the counter to count the number of rising edges and falling edges output by the oscillator within a first set time to obtain a first count value;

[0009] Based on a reference clock signal, a set frequency and the first count value, the oscillator is initialized for frequency calibration, so that the oscillator outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of control words arranged in sequence from high to low bits;

[0010] Controlling the oscillator to be in an open-loop state;

[0011] After a second set time, the oscillator is controlled to enter a closed loop state from an open loop state to recalibrate the frequency of the oscillator; wherein the recalibrating the frequency of the oscillator includes:

[0012] Controlling the counter to count the number of rising edges and falling edges output by the oscillator within the first set time to obtain a second count value;

[0013] Based on the second count value and the reference clock signal, obtaining an actual frequency output by the oscillator;

[0014] Comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment word;

[0015] According to the adjustment word bit and the reference clock signal, the control word from the adjustment word bit to the lower bit is adjusted in sequence to recalibrate the frequency of the oscillator so that the oscillator outputs the set frequency and controls the oscillator from the closed-loop state to the open-loop state.

[0016] Optionally, the control word includes a coarse adjustment control word arranged in sequence from the high bit to the i+1th bit, and a fine adjustment control word arranged from the i-th bit to the low bit, and the calibration time required for the fine adjustment control word is greater than the calibration time required for the coarse adjustment control word; wherein i is an integer greater than or equal to 1.

[0017] Optionally, the sum of calibration time required for the coarse adjustment control word is less than the calibration time required for the fine adjustment control word.

[0018] Optionally, adjust the i-th control word, including:

[0019] Based on the set frequency and the frequency accuracy corresponding to the ith control word, obtain a reference base value corresponding to the ith control word, wherein the reference base value includes sub-reference base values ​​corresponding to the ith control word at different times;

[0020] Controlling the counter to count the number of rising edges and falling edges output by the oscillator to obtain a third count value;

[0021] During the calibration time corresponding to the i-th control word, the third count value is compared with the corresponding reference base value in real time, and the value of the i-th control word is adjusted and corrected based on the comparison result, wherein:

[0022] If the deviation between the third count value and the corresponding sub-reference base value is greater than a first threshold, the counter is controlled to stop updating the third count value, and the value of the i-th control word is adjusted and corrected based on a binary approximation method; wherein the first threshold corresponds to the frequency accuracy of the i-th control word;

[0023] If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold, control the counter to continue counting the number of rising edges and falling edges output by the oscillator within the calibration time corresponding to the i-th control word, and update the third count value;

[0024] If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold, and the counting duration of the counter is equal to the calibration time corresponding to the i-th control word, the counter is controlled to stop updating the third count value, and the value of the i-th control word is adjusted and corrected based on the binary approximation method.

[0025] Optionally, the formula for the calibration time required for each control word is:

[0026]

[0027] Among them, t CNT is the calibration time required for the control word, f 0 is the actual frequency of the oscillator, and ppm is the frequency accuracy.

[0028] Optionally, get the lowest bit of the control word, including:

[0029] Obtaining a first frequency output by the oscillator corresponding to a control word with the lowest bit being 0, and a second frequency output by the oscillator corresponding to a control word with the lowest bit being 1;

[0030] The first frequency and the second frequency are respectively compared with the set frequency to determine the least significant control word.

[0031] Optionally, comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment word, includes:

[0032] Comparing the actual frequency output by the oscillator with the set frequency, if the error between the actual frequency of the oscillator and the set frequency is greater than a second threshold, determining the adjustment word bit from the high bit to the i+1th bit;

[0033] If the error between the actual frequency output by the oscillator and the set frequency is less than or equal to a second threshold, the adjustment word bit is determined in the i-th to low bits.

[0034] According to a second aspect of the present invention, there is provided a frequency calibration circuit, comprising:

[0035] A first counting unit, used for controlling the counter to count the number of rising edges and falling edges output by the oscillator within a first set time to obtain a first count value;

[0036] an initialization frequency calibration unit, configured to perform initialization frequency calibration on the oscillator based on a reference clock signal, a set frequency and the first count value, so that the oscillator outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of control words arranged in sequence from high to low bits;

[0037] An open-loop control unit, used for controlling the oscillator to be in the open-loop state;

[0038] A frequency recalibration unit, used to control the oscillator from an open-loop state to a closed-loop state after a second set time, so as to recalibrate the frequency of the oscillator; wherein the frequency recalibration unit includes:

[0039] A second counting subunit, used for controlling the counter to count the number of rising edges and falling edges output by the oscillator within the first set time to obtain a second count value;

[0040] an actual frequency obtaining subunit, configured to obtain an actual frequency output by the oscillator based on the second count value and the reference clock signal;

[0041] An adjustment bit acquisition subunit, used for comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment bit;

[0042] The frequency recalibration subunit is used to adjust the control word from the adjustment word bit to the lower bit in sequence according to the adjustment word bit and the reference clock signal, so as to recalibrate the frequency of the oscillator so that the oscillator outputs the set frequency.

[0043] According to a third aspect of the present invention, an oscillator system is provided, comprising: an oscillator, a counter, and the frequency calibration circuit as described in the second aspect of the present invention.

[0044] According to a fourth aspect of the present invention, there is provided an electronic device, comprising the fast and adaptive oscillator frequency calibration method as described in the first aspect of the present invention.

[0045] According to a fourth aspect of the present invention, there is provided a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the fast and adaptive oscillator frequency calibration method as described in the first aspect of the present invention is implemented.

[0046] In the fast and adaptive oscillator frequency calibration method, circuit, oscillator system, device and medium provided by the present invention, the method controls the oscillator to enter an open-loop state after completing the initialization frequency calibration, and controls the oscillator to enter a closed-loop state from the open-loop state after a second set time, and obtains the actual frequency output by the oscillator, compares the actual frequency output by the oscillator with the set frequency, and obtains the adjustment word; according to the adjustment word and the reference clock signal, sequentially adjusts the control word from the adjustment word to the low bit to recalibrate the frequency of the oscillator, so that the oscillator outputs the set frequency, and controls the oscillator to enter an open-loop state from the closed-loop state. Therefore, the present invention can quickly calibrate the frequency of the oscillator when the frequency fluctuation of the oscillator output is small, while taking into account the reduction of the power consumption of the loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 FIG. 1 is a flow chart of a fast and adaptive oscillator frequency calibration method according to an embodiment of the present invention. Figure 1 ;

[0049] Figure 2 FIG. 1 is a flow chart of a fast and adaptive oscillator frequency calibration method according to an embodiment of the present invention. Figure 2 ;

[0050] Figure 3 FIG. 1 is a schematic diagram of a frequency calibration circuit according to an embodiment of the present invention. Figure 1 ;

[0051] Figure 4 FIG. 1 is a schematic diagram of a frequency calibration circuit according to an embodiment of the present invention. Figure 2 ;

[0052] Figure 5 is a schematic diagram of the structure of an oscillator system in one embodiment of the present invention;

[0053] Figure 6 is a schematic diagram of the structure of an exemplary electronic device in one embodiment of the present invention;

[0054] Description of reference numerals:

[0055] 1-Frequency calibration circuit;

[0056] 2- Oscillator;

[0057] 3- Counter;

[0058] 20- a first counting unit;

[0059] 30-initialize frequency calibration unit;

[0060] 40- open loop control unit;

[0061] 50-Frequency recalibration unit;

[0062] 501-second counting subunit;

[0063] 502-actual frequency acquisition subunit;

[0064] 503-adjust the word position to obtain the subunit;

[0065] 504-Frequency recalibration subunit. DETAILED DESCRIPTION

[0066] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0067] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0068] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0069] In view of the fact that it is difficult to ensure that the power consumption of the loop is reduced while the frequency of the oscillator is quickly calibrated in the prior art. The present invention provides a fast and adaptive oscillator frequency calibration method, which controls the oscillator to enter an open-loop state after completing the initialization frequency calibration, and controls the oscillator to enter a closed-loop state from the open-loop state after a second set time, and obtains the actual frequency output by the oscillator, compares the actual frequency output by the oscillator with the set frequency, and obtains the adjustment word; according to the adjustment word and the reference clock signal, adjusts the control word from the adjustment word to the low bit in sequence to recalibrate the frequency of the oscillator, so that the oscillator outputs the set frequency, and controls the oscillator to enter an open-loop state from the closed-loop state. Therefore, the present invention can quickly calibrate the frequency of the oscillator and reduce the power consumption of the loop when the frequency fluctuation of the oscillator output is small.

[0070] Please refer to Figure 1 The embodiment of the present invention provides a fast and adaptive oscillator frequency calibration method for calibrating the frequency of an oscillator 2 based on a counter 3, wherein the oscillator 2 is electrically connected to the counter 3, and the method comprises:

[0071] S11: Control the counter 3 to count the number of rising edges and falling edges output by the oscillator 2 within a first set time to obtain a first count value;

[0072] S12: Based on a reference clock signal, a set frequency and the first count value, the oscillator 2 is initialized for frequency calibration, so that the oscillator 2 outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of control words arranged in sequence from high to low bits;

[0073] In one implementation, the initialization frequency calibration of the oscillator 2 in step S12 includes the following steps:

[0074] S121: Obtaining an actual frequency output by the oscillator 2 based on the first count value and the reference clock signal;

[0075] S122: Compare the actual frequency output by the oscillator 2 with the set frequency, and determine the control words from high to low in sequence based on the binary approximation method, so that the oscillator 2 outputs the set frequency and obtains a corresponding frequency control signal.

[0076] S13: Control the oscillator 2 to be in an open-loop state;

[0077] S14: controlling the oscillator 2 from an open-loop state to a closed-loop state after a second set time;

[0078] Specifically, after the second set time, the oscillator 2 is controlled to enter a closed loop state from an open loop state to start recalibrating the frequency of the oscillator 2;

[0079] S15: controlling the counter 3 to count the number of rising edges and falling edges output by the oscillator 2 within the first set time to obtain a second count value;

[0080] S16: obtaining the actual frequency output by the oscillator 2 based on the second count value and the reference clock signal;

[0081] S17: Compare the actual frequency output by the oscillator 2 with the set frequency to obtain an adjustment word;

[0082] This is because the frequency drift of the oscillator 2 in open-loop operation is not very large, so there is no need to calibrate all control words of the oscillator 2 as in the initial frequency calibration.

[0083] S18: According to the adjustment word bit and the reference clock signal, the control word from the adjustment word bit to the lower bit is adjusted in sequence to recalibrate the frequency of the oscillator 2 so that the oscillator 2 outputs the set frequency, and then returns to S13.

[0084] In one embodiment, the control word includes a coarse adjustment control word arranged in sequence from the high bit to the i+1th bit, and a fine adjustment control word arranged from the ith bit to the low bit, and the calibration time required for the fine adjustment control word is greater than the calibration time required for the coarse adjustment control word; wherein i is an integer greater than or equal to 1.

[0085] In a preferred embodiment, the sum of the calibration time required for the coarse adjustment control word is less than the calibration time required for the fine adjustment control word. This is because in the control process of determining the control words from high to low in sequence based on the binary search algorithm, since the frequency accuracy required for the higher-order control word is lower, the calibration time required for the higher-order control word can be adaptively reduced as needed; similarly, since the frequency accuracy required for the lower-order control word is higher, the calibration time required for the lower-order control word can be adaptively increased as needed.

[0086] In actual design, the calibration time required for each fine-tuning control word and the calibration time required for each coarse-tuning control word may also be set to be the same; the present invention is not limited to this, and technicians in this field can select a suitable calibration time.

[0087] In this case, the step S17 of comparing the actual frequency output by the oscillator 2 with the set frequency to obtain the adjustment word includes:

[0088] Comparing the actual frequency output by the oscillator 2 with the set frequency, if the error between the actual frequency of the oscillator 2 and the set frequency is greater than a second threshold, determining the adjustment word bit from the high bit to the i+1th bit;

[0089] If the error between the actual frequency output by the oscillator 2 and the set frequency is less than or equal to the second threshold, the adjustment word bit is determined in the i-th to low bits.

[0090] In this case, please refer to Figure 2 , the adjustment of the i-th control word in step S18 includes:

[0091] S181: Based on the set frequency and the frequency accuracy corresponding to the ith control word, obtain a reference base value corresponding to the ith control word, wherein the reference base value includes sub-reference base values ​​corresponding to the ith control word at different times;

[0092] S182: Control the counter 3 to count the number of rising edges and falling edges output by the oscillator 2, respectively, to obtain a third count value;

[0093] S183: within the calibration time corresponding to the i-th control word, compare the third count value with the corresponding reference base value in real time, and adjust and correct the value of the i-th control word based on the comparison result;

[0094] Specifically, within the calibration time corresponding to the i-th control word, the third count value is compared with the corresponding reference base value in real time, and the value of the i-th control word is adjusted and corrected based on the comparison result, wherein:

[0095] If the deviation between the third count value and the corresponding sub-reference base value is greater than a first threshold, the counter 3 is controlled to stop counting, and the value of the i-th control word is adjusted and corrected based on the binary approximation method; wherein the first threshold corresponds to the frequency accuracy of the i-th control word;

[0096] If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold, control the counter 3 to continue counting the number of rising edges and falling edges output by the oscillator 2 within the calibration time corresponding to the i-th control word, and update the third count value;

[0097] If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold value, and the counting time of the counter 3 is equal to the calibration time corresponding to the i-th control word, the counter 3 is controlled to stop counting, and the value of the i-th control word is adjusted and corrected based on the binary approximation method;

[0098] In a specific implementation manner, the i-th control word has different reference base values ​​corresponding to different time periods. Taking the case where the reference base value of the i-th control word is 500 during 10 cycles of the reference clock signal and the reference base value of the i-th control word is 1000 during 20 cycles of the reference clock signal as an example, the time required for the frequency calibration of the i-th control word of the present invention is described.

[0099] At 10 cycles of the reference clock signal, if the third count value is 499, it is determined that the deviation between the third count value and the corresponding reference base value is less than the first threshold value, and it is necessary to continue counting to improve the accuracy of the system;

[0100] Therefore, the counter 3 is controlled to continue counting the number of rising edges and falling edges output by the oscillator 2 within the calibration time corresponding to the i-th control word, and the third count value is updated;

[0101] When counting to the 20th cycle of the reference clock signal, if the third count value is 995, it is determined that the deviation between the third count value and the corresponding reference base value is greater than the first threshold value, and the value of the i-th control word can be adjusted and corrected based on the binary approximation method, and the value of the next control word can be adjusted and corrected;

[0102] If within the calibration time corresponding to the i-th control word, the third count value and the corresponding reference base value are both smaller than the first threshold value, the counter is controlled to stop updating the third count value, and based on the third count value counted within the calibration time corresponding to the i-th control word, the value of the i-th control word is adjusted and corrected by binary approximation.

[0103] Of course, when the oscillator is initialized for frequency calibration, the above method can also be used to determine each control word, so as to adjust the counting time of each control word in real time and adaptively according to the counting result, thereby reducing the overall average power consumption of the system.

[0104] The calibration time required for each control word corresponds to the frequency accuracy of each control word, and the formula for the calibration time required for each control word is:

[0105]

[0106] Among them, t CNT is the calibration time required for the control word, f 0 is the actual frequency of the oscillator 2, and ppm is the frequency accuracy.

[0107] Now, taking the setting frequency of the oscillator 2 as 2.4 GHz, which includes a 6-bit coarse adjustment control word and a 6-bit fine adjustment control word, each of which corresponds to a resolution of 150 ppm (i.e., 360 KHz), and the frequency of the reference clock signal as 24 MHz as an example, the time required for frequency recalibration of the present invention is described as follows:

[0108] When determining the maximum calibration time, you can refer to the formula

[0109]

[0110] Wherein, CNT is the count value of the counter 3, N is the number of cycles of the reference clock signal, and f REF is the frequency of the reference clock signal, f R0 The frequency is set as described.

[0111] When determining the least significant bit control word, the output frequency of the oscillator 2 when the least significant bit control word is 0 and the output frequency of the oscillator 2 when the least significant bit control word is 1 may differ by 150 ppm. In this case, in order to further improve the accuracy of frequency calibration and ensure that the actual frequency output by the oscillator 2 is the set frequency, in one implementation, determining the least significant bit control word includes:

[0112] Obtaining a first frequency output by the oscillator 2 corresponding to a control word with the lowest bit being 0, and a second frequency output by the oscillator 2 corresponding to a control word with the lowest bit being 1;

[0113] The first frequency and the second frequency are respectively compared with the set frequency to determine the least significant control word.

[0114] Assume that the counter 3 counts the number of rising edges and falling edges of the oscillator 2 output corresponding to the least significant control word being 0 and the least significant control word being 1 respectively within 100 clock cycles of the reference clock signal, and obtains a fourth count value and a fifth count value, wherein the difference between the fourth count value and the fifth count value is 3;

[0115] Considering that the counting error of the counter 3 is ±1, the accuracy corresponding to the clock cycles of the 100 reference clock signals is low, making it difficult for the oscillator 2 to output the setting signal, and the calibration time corresponding to the fine-tuning control word should be extended;

[0116] If the counter 3 counts the number of rising edges and falling edges of the oscillator 2 output corresponding to the lowest control word being 0 and the lowest control word being 1 respectively within 200 clock cycles of the reference clock signal, and obtains a sixth count value and a seventh count value, wherein the difference between the sixth count value and the seventh count value is 6; then the calibration time corresponding to the fine-tuning control word can be corresponded to 200 clock cycles of the reference clock signal (i.e. 8.32us).

[0117] At the same time, since the sum of the calibration time required for the coarse adjustment control word is less than the calibration time required for the fine adjustment control word, when the oscillator 2 includes a 6-bit coarse adjustment control word and a 6-bit fine adjustment control word, the time for initializing the frequency calibration can be controlled within 80us, thereby realizing rapid calibration of the frequency of the oscillator 2 and reducing the power consumption of the loop; if it is necessary to recalibrate the frequency of the oscillator 2, it can adjust each control word starting from the adjustment word bit, thereby making the frequency fluctuation of the oscillator 2 output smaller during frequency recalibration.

[0118] In addition, please refer to Figure 3 The embodiment of the present invention further provides a frequency calibration circuit 1, comprising:

[0119] A first counting unit 20, used for controlling the counter 3 to count the number of rising edges and falling edges output by the oscillator 2 within a first set time to obtain a first count value;

[0120] An initialization frequency calibration unit 30, configured to perform initialization frequency calibration on the oscillator 2 based on a reference clock signal, a set frequency and the first count value, so that the oscillator 2 outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of bit control words arranged in sequence from high to low;

[0121] An open-loop control unit 40, used for controlling the oscillator 2 to be in the open-loop state;

[0122] The frequency recalibration unit 50 is used to control the oscillator 2 from the open-loop state to the closed-loop state after the second set time, so as to recalibrate the frequency of the oscillator 2; wherein, please refer to Figure 4 , the frequency recalibration unit comprises:

[0123] A second counting subunit 501 is used to control the counter 3 to count the number of rising edges and falling edges output by the oscillator 2 within the first set time to obtain a second count value;

[0124] An actual frequency obtaining subunit 502, configured to obtain an actual frequency output by the oscillator 2 based on the second count value and the reference clock signal;

[0125] The adjustment bit acquisition subunit 503 is used to compare the actual frequency output by the oscillator 2 with the set frequency to obtain the adjustment bit;

[0126] The frequency recalibration subunit 504 is used to adjust the control words from the adjustment word bit to the lower bit in sequence according to the adjustment word bit and the reference clock signal to recalibrate the frequency of the oscillator 2 so that the oscillator 2 outputs a set frequency.

[0127] In addition, please refer to Figure 5 The embodiment of the present invention further provides an oscillator 2 system, comprising: an oscillator 2, a counter 3 and the above-mentioned frequency calibration circuit 1.

[0128] As an example, the oscillator 2 may be a ring oscillator, a hysteresis oscillator, etc., and the present invention does not limit the specific form of the oscillator 2.

[0129] In one embodiment, the oscillator system can be an ultra-low power transceiver system, such as a wake-up receiver system, an indefinite intermediate frequency receiver system, etc.; it can also be a high-performance transceiver system, such as a mobile phone system, etc., and the frequency calibration circuit 1 provided by the present invention can be used to shorten the calibration time of the corresponding oscillator 2 and reduce the power consumption of the transceiver.

[0130] In addition, an embodiment of the present invention further provides an electronic device, please refer to Figure 6 The electronic device 6 includes a memory 62, a processor 61, and a program stored in the memory 62 and executable on the processor 61. When the processor 61 executes the program, the steps of the fast and adaptive oscillator frequency calibration method in the aforementioned solution of the present invention can be implemented. The processor 61 can communicate with the memory 62 via a bus 63.

[0131] In addition, an embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the fast and adaptive oscillator frequency calibration method in the aforementioned solution of the present invention are implemented.

[0132] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which may be in the form of a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email transceiver, a game console, a tablet computer, a wearable device or a combination of any of these devices.

[0133] In a typical configuration, a computer includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0134] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0135] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, modules of programs or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic disk storage, quantum memory, graphene-based storage media or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device.

[0136] In summary, the embodiment of the present invention controls the oscillator to enter the open-loop state after completing the initialization frequency calibration, and controls the oscillator to enter the closed-loop state from the open-loop state after the second set time, and obtains the actual frequency output by the oscillator, compares the actual frequency output by the oscillator with the set frequency, and obtains the adjustment word; according to the adjustment word and the reference clock signal, sequentially adjusts the control word from the adjustment word to the low bit to recalibrate the frequency of the oscillator, so that the oscillator outputs the set frequency, and controls the oscillator to enter the open-loop state from the closed-loop state. Therefore, the present invention can quickly calibrate the frequency of the oscillator when the frequency fluctuation of the oscillator output is small, while taking into account the reduction of the power consumption of the loop.

[0137] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A fast, adaptive oscillator frequency calibration method for frequency calibration of a counter-based oscillator, wherein: The oscillator is electrically connected to the counter, and the method comprises: Controlling the counter to count the number of rising edges and falling edges output by the oscillator within a first set time to obtain a first count value; Based on a reference clock signal, a set frequency and the first count value, the oscillator is initialized for frequency calibration, so that the oscillator outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of control words arranged in sequence from high to low bits; Controlling the oscillator to be in an open-loop state; After a second set time, the oscillator is controlled to enter a closed loop state from an open loop state to recalibrate the frequency of the oscillator; wherein the recalibrating the frequency of the oscillator includes: Controlling the counter to count the number of rising edges and falling edges output by the oscillator within the first set time to obtain a second count value; Based on the second count value and the reference clock signal, obtaining an actual frequency output by the oscillator; Comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment word; According to the adjustment word bit and the reference clock signal, the control word from the adjustment word bit to the lower bit is adjusted in sequence to recalibrate the frequency of the oscillator so that the oscillator outputs the set frequency and controls the oscillator from the closed-loop state to the open-loop state.

2. The fast, adaptive oscillator frequency calibration method according to claim 1, characterized in that: The control word includes a coarse adjustment control word arranged in sequence from the high bit to the i+1th bit, and a fine adjustment control word arranged from the ith bit to the low bit, and the calibration time required for the fine adjustment control word is greater than the calibration time required for the coarse adjustment control word; wherein i is an integer greater than or equal to 1.

3. The fast, adaptive oscillator frequency calibration method according to claim 2, characterized in that: The sum of calibration time required for the coarse adjustment control words is less than the calibration time required for the fine adjustment control words.

4. The fast, adaptive oscillator frequency calibration method according to claim 2, characterized in that: Adjust the i-th control word, including: Based on the set frequency and the frequency accuracy corresponding to the ith control word, obtain a reference base value corresponding to the ith control word, wherein the reference base value includes sub-reference base values ​​corresponding to the ith control word at different times; Controlling the counter to count the number of rising edges and falling edges output by the oscillator to obtain a third count value; During the calibration time corresponding to the i-th control word, the third count value is compared with the corresponding reference base value in real time, and the value of the i-th control word is adjusted and corrected based on the comparison result, wherein: If the deviation between the third count value and the corresponding sub-reference base value is greater than a first threshold, the counter is controlled to stop updating the third count value, and the value of the i-th control word is adjusted and corrected based on a binary approximation method; wherein the first threshold corresponds to the frequency accuracy of the i-th control word; If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold, control the counter to continue counting the number of rising edges and falling edges output by the oscillator within the calibration time corresponding to the i-th control word, and update the third count value; If the deviation between the third count value and the corresponding sub-reference base value is less than or equal to the first threshold, and the counting duration of the counter is equal to the calibration time corresponding to the i-th control word, the counter is controlled to stop updating the third count value, and the value of the i-th control word is adjusted and corrected based on the binary approximation method.

5. The fast, adaptive oscillator frequency calibration method according to claim 4, characterized in that: The formula for the calibration time required for each control word is: Among them, t CNT is the calibration time required for the control word, f0 is the actual frequency of the oscillator, and ppm is the frequency accuracy.

6. The fast, adaptive oscillator frequency calibration method according to claim 5, characterized in that: Get the lowest bit of the control word, including: Obtaining a first frequency output by the oscillator corresponding to a control word with the lowest bit being 0, and a second frequency output by the oscillator corresponding to a control word with the lowest bit being 1; The first frequency and the second frequency are respectively compared with the set frequency to determine the least significant control word.

7. The fast, adaptive oscillator frequency calibration method according to any one of claims 2 to 6, characterized in that: Comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment word, including: Comparing the actual frequency output by the oscillator with the set frequency, if the error between the actual frequency of the oscillator and the set frequency is greater than a second threshold, determining the adjustment word bit from the high bit to the i+1th bit; If the error between the actual frequency output by the oscillator and the set frequency is less than or equal to a second threshold, the adjustment word bit is determined in the i-th to low bits.

8. A frequency calibration circuit, characterized in that: include: A first counting unit, used for controlling the counter to count the number of rising edges and falling edges output by the oscillator within a first set time to obtain a first count value; an initialization frequency calibration unit, configured to perform initialization frequency calibration on the oscillator based on a reference clock signal, a set frequency and the first count value, so that the oscillator outputs the set frequency and obtains a corresponding frequency control signal, wherein the frequency control signal includes a plurality of control words arranged in sequence from high to low bits; An open-loop control unit, used for controlling the oscillator to be in the open-loop state; A frequency recalibration unit, used to control the oscillator from an open-loop state to a closed-loop state after a second set time, so as to recalibrate the frequency of the oscillator; wherein the frequency recalibration unit includes: A second counting subunit, used for controlling the counter to count the number of rising edges and falling edges output by the oscillator within the first set time to obtain a second count value; an actual frequency obtaining subunit, configured to obtain an actual frequency output by the oscillator based on the second count value and the reference clock signal; An adjustment bit acquisition subunit, used for comparing the actual frequency output by the oscillator with the set frequency to obtain an adjustment bit; The frequency recalibration subunit is used to adjust the control word from the adjustment word bit to the lower bit in sequence according to the adjustment word bit and the reference clock signal, so as to recalibrate the frequency of the oscillator so that the oscillator outputs the set frequency.

9. An oscillator system, characterized in that: include: An oscillator, a counter, and a frequency calibration circuit as claimed in claim 8.

10. An electronic device, characterized in that: The method comprises a memory, a processor and a program stored in the memory and executable on the processor, wherein the processor implements the steps of the method according to any one of claims 1 to 7 when executing the program.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps in the method according to any one of claims 1 to 7 are implemented.

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