Silicon substrate and preparation method thereof, back contact cell and photovoltaic cell module

Abstract

The invention provides a silicon substrate, a preparation method of the silicon substrate, a back contact cell and a photovoltaic cell module, and aims to solve the problem that the photoelectric conversion efficiency of the back contact cell is lower than the expectation due to the fact that the backlight surface of the silicon substrate is damaged by laser by improving the reflectivity of the backlight surface of the silicon substrate. The silicon substrate comprises a light facing surface and a backlight surface which are opposite to each other; wherein the texture structure of the light facing face comprises a pyramid structure, the texture structure of the backlight face comprises a tower footing structure, and in the tower footing structure, a first acute angle formed by a target texture face farthest from the backlight face and the horizontal plane is smaller than or equal to 2 degrees.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a silicon substrate and a preparation method thereof, a back contact cell, and a photovoltaic cell assembly. Background Art

[0002] As a photoelectric conversion semiconductor device, solar cells mainly use the photoelectric effect of semiconductor materials to convert the energy of photons (i.e., light particles) into electrons to generate current. The specific principle of solar cells converting solar energy into electrical energy is as follows: when sunlight shines on solar cells, photons are absorbed by the semiconductor materials in the solar cells. In semiconductor materials, the energy of absorbed photons excites electrons to transition from the valence band to the conduction band, generating carriers of electrons and holes (i.e., photogenerated carriers). When photogenerated carriers pass near the PN junction in the solar cell, the electrons and holes are separated by the built-in electric field of the PN junction and gathered in the N and P regions of the PN junction, respectively, thereby forming an electric potential, generating current in the external circuit, and realizing the conversion of solar energy into electrical energy.

[0003] In solar cells, back contact (BC) cells have excellent characteristics of high photoelectric conversion rate because of their structural characteristics that all electrodes and grid lines are set on the back of the cell and the front is unobstructed. However, during the preparation process of BC cells, the back of the silicon substrate needs to be laser-processed multiple times to achieve the purposes of mold opening, grooving, and removing the surface film layer, and the silicon substrate actually has extremely high requirements for the parameters of laser processing (for example, power, wavelength, pulse width, repetition frequency, etc.). Therefore, after multiple laser treatments with different parameters, the back of the silicon substrate is inevitably prone to laser losses such as mechanical damage or thermal damage, which causes the photoelectric conversion efficiency of the back contact cell to be lower than expected. Summary of the invention

[0004] Based on this, a silicon substrate and a preparation method thereof, a back contact cell, and a photovoltaic cell assembly are provided to solve the problem that the photoelectric conversion efficiency of the back contact cell is lower than expected due to laser damage to the back light surface of the silicon substrate by improving the reflectivity of the back light surface of the silicon substrate.

[0005] In a first aspect, an embodiment of the present application provides a silicon substrate, comprising: a light-facing surface and a backlight surface opposite to each other; wherein the texture structure of the light-facing surface comprises a pyramid structure, and the texture structure of the backlight surface comprises a tower base structure,

[0006] In the tower base structure, a first acute angle formed between a target texture surface farthest from the backlight surface and a horizontal plane is less than or equal to 2°.

[0007] In one embodiment, the first acute angle is less than or equal to 1°.

[0008] In one of the embodiments, the coverage rate of the tower base structure on the backlight surface is greater than 0.90.

[0009] In one embodiment, the ratio of the sum of the areas of the target texture surfaces to the area of ​​the backlight surface is greater than or equal to 0.90.

[0010] In one embodiment, the distribution density of the tower base structure on the backlight surface is 2×10 3 -2×10 4 Pieces / mm 2 .

[0011] In one embodiment, the distance between the target texture surface and the backlight surface is 0.1-1.0 μm.

[0012] In one of the embodiments, a second acute angle formed between the side surface of the tower base structure connected to the backlight surface and the horizontal plane is 50°-55°.

[0013] In a second aspect, the present application provides a method for preparing the silicon substrate described in the first aspect and any possible implementation manner, comprising:

[0014] Under a temperature condition of less than or equal to 90° C., the first solution is allowed to react with the first surface and the second surface opposite to each other in the silicon wafer to form a pyramid-structured texture structure; wherein the solute of the first solution includes a reaction rate regulator and a soluble alkali;

[0015] Under a temperature condition of less than or equal to 90° C., the second solution is allowed to undergo an etching reaction with the first surface or the second surface for 250-600 seconds to polish the top of the pyramid structure on the etched surface to form a pyramid base structure to obtain the silicon substrate; wherein the solute of the second solution includes a soluble alkali, and the surface where the pyramid base structure is located is the backlight surface of the silicon substrate.

[0016] In one embodiment, the volume fraction of the soluble alkali in the second solution is greater than the volume fraction of the soluble alkali in the first solution, and the volume fraction of the soluble alkali in the first solution is 1%-5%.

[0017] In one embodiment, the volume fraction of the additive in the second solution is 0.5%-3%.

[0018] In one embodiment, the solute of the second solution includes an additive for overcoming anisotropy.

[0019] In a third aspect, an embodiment of the present application provides a back-contact battery, comprising the silicon substrate described in the first aspect and any possible implementation manner, wherein a backlight surface of the silicon substrate comprises a first region, a second region, and an intersection region between the first region and the second region,

[0020] A first stacked layer, disposed in the first region;

[0021] A second stacked layer is provided in the second region, the second stacked layer has a conductivity type opposite to that of the first stacked layer, and an insulating layer is provided between the first stacked layer and the second stacked layer in the intersection region;

[0022] A first electrode, disposed on the first stack;

[0023] A second electrode is disposed on the second stack;

[0024] An isolation groove penetrates through the second stacked layer in the intersection area and is connected to the insulating layer.

[0025] In a fourth aspect, an embodiment of the present application provides a photovoltaic cell assembly, including:

[0026] The back contact battery described in the third aspect.

[0027] In the above-mentioned silicon substrate and its preparation method, back contact cell, and photovoltaic cell assembly, the reflectivity of the back light surface of the silicon substrate is improved by the tower base structure contained in the back light surface of the silicon substrate, and the probability of reflecting light to the adjacent tower base structure is reduced by the first acute angle less than or equal to 2° between the smooth texture surface in the tower base structure and the horizontal, thereby further improving the reflectivity of the back light surface. As a result, the problem of the silicon substrate being damaged by laser irradiation when used for the preparation of the back contact cell can be avoided, thereby improving the photoelectric conversion efficiency of the back contact cell where the silicon substrate is located. On this basis, since the laser only processes one of the P region or the N region (usually the P region), and the laser damage left by the laser on the surface of the silicon substrate needs to be removed by etching later, the above-mentioned silicon substrate can avoid the problem of increased height difference between the P region and the N region caused by etching to remove laser loss, thereby increasing silver consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a tower base structure in one embodiment;

[0029] Figure 2 is a schematic structural diagram of a cross section of a silicon substrate in another embodiment;

[0030] Figure 3 is a schematic flow chart of a method for preparing a silicon substrate in another embodiment;

[0031] Figure 4A cross-sectional view of a back contact battery in another embodiment;

[0032] Figure 5 This is a partial SEM image of the backlight surface of the silicon substrate in Example 1;

[0033] Figure 6 This is a local SEM image of the backlight surface of the silicon substrate in Comparative Example 1.

[0034] The figures are as follows:

[0035] 100-tower base structure, 110-target texture surface, 120-side surface, α-first acute angle, β-second acute angle, 200-silicon substrate, 210-light-facing surface, 220-backlight surface, 400-back contact cell, 401-tunneling oxide layer or first intrinsic silicon-containing film, 402-N-type doped polysilicon layer or N-type doped silicon-containing film, 403-conductive film, 404-first electrode, 405-second electrode, 406-conductive film, 407-P-type doped silicon-containing film, 408-second intrinsic silicon-containing film, 409-isolation groove, 410-insulating layer, 411-anti-reflection layer, 412 passivation layer. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be arbitrarily combined with each other. In addition, although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that here.

[0037] The terms "first" and "second" in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the term "comprising" and any of their variations are intended to cover non-exclusive protection. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices. "Multiple" in the present application can mean at least two, for example, two, three or more, and the embodiments of the present application are not limited.

[0038] To facilitate understanding of the technical solution provided by the embodiments of the present application, the following first introduces the design concept of the embodiments of the present application:

[0039] Laser treatment is an indispensable surface treatment method in the preparation of BC batteries. It is necessary to perform laser treatments of different intensities on the exposed silicon substrate surface of the back contact battery or the surface of semiconductor stacks such as tunnel oxide layers formed on the backlight side of the silicon substrate. Therefore, after multiple laser treatments, mechanical damage, thermal damage and other laser losses are inevitably formed on the surface of the silicon substrate. Mechanical damage here refers to the phenomenon that tiny cracks or damage appear on the back side of the silicon substrate (i.e., the backlight side) after laser treatment; among them, the phenomenon of tiny cracks on the surface is particularly obvious after pulsed laser treatment.

[0040] The above-mentioned thermal damage refers to the formation of a cladding layer or recrystallization defect on the back side of the silicon substrate (i.e., the backlight side) after laser treatment due to local overheating. Alternatively, the recombination rate of electron-hole pairs in the passivation layer on the back side of the silicon substrate increases after excessive laser treatment. It can be seen that the laser loss on the surface of the silicon substrate leads to problems in the photoelectric conversion efficiency of BC cells.

[0041] To this end, the embodiment of the present application provides a silicon substrate, wherein in the tower base structure of the backlight surface of the silicon substrate, the first acute angle between the target texture surface farthest from the backlight surface and the horizontal plane is less than or equal to 2°. In this way, through the horizontal or almost horizontal target texture surface, the amount of light incident at different angles that is reflected and then enters the silicon substrate through the texture structure on the surface of the silicon substrate is reduced, thereby improving the reflectivity of the backlight surface.

[0042] In this way, when the silicon substrate is used to prepare a back-contact battery, due to its high reflectivity, it can reflect a portion of the laser when irradiated by the laser, thereby reducing the intensity of the laser received by the back side of the silicon substrate and reducing the probability of laser damage to the back side of the silicon substrate; thereby reducing the height difference between the N region and the P region in the back-contact battery to no more than 7μm.

[0043] It should be noted that the light-facing surface of the silicon substrate in the embodiment of the present application does not refer to the silicon substrate directly receiving light in a naked form when applied to a BC battery, but refers to: relative to a surface facing away from light, a surface of the silicon substrate facing the light side of the battery in the back-contact battery.

[0044] In the embodiment of the present application, the backlight side of the silicon substrate is distinguished from the light-facing side only when the silicon substrate is used for a BC battery, and is opposite to the light-facing side. The backlight side of the silicon substrate refers to a surface of the silicon substrate facing the back of the battery in a back contact battery.

[0045] In order to more clearly understand the above technical solution, the technical solution of the present application is described in detail below with the help of accompanying drawings and specific embodiments.

[0046] The embodiment of the present application provides a silicon substrate, which includes a light-facing surface and a backlight surface opposite to each other, wherein the texture structure of the light-facing surface includes a pyramid structure, and the texture structure of the backlight surface includes a pyramid base structure.

[0047] In the tower base structure, the texture surface farthest from the backlight surface of the silicon substrate is the target texture surface. The first acute angle between the target texture surface and the horizontal plane is less than or equal to 2°. Figure 1 Schematic diagram of a tower foundation structure 100 provided in an embodiment of the present application. The first acute angle α formed between the target texture surface 110 in the tower foundation structure 100 and the horizontal plane is as follows: Figure 1 As shown. Then the first acute angle α satisfies: 0°≤α≤2°.

[0048] When α≠0, the distance between the target texture surface and the backlight surface is not equal everywhere, then the distance between the target texture surface and the backlight surface is the maximum value of the vertical height values ​​between each point on the target texture surface and the backlight surface.

[0049] In one embodiment, the silicon substrate is a single crystal, and the pyramid structure in its surface texture structure is a velvet structure.

[0050] Since each inclined surface in the pyramid structure can reflect light to the inclined surface of the adjacent pyramid structure, in order to further improve the reflectivity of the backlight surface of the silicon substrate, in one embodiment, the aforementioned first acute angle α is less than or equal to 1°, so as to increase the probability of light being reflected toward the air above the backlight surface through a horizontal target texture surface, or a target texture surface close to a horizontal surface, thereby reducing the probability of light being reflected to the adjacent pyramid structure, thereby effectively improving the reflectivity of the backlight surface.

[0051] In one embodiment, the coverage of the tower base structure on the backlight surface is greater than 0.90. The coverage indicates the ratio of the sum of the areas of the backlight surface of the silicon substrate covered by the tower base structure (equal to the sum of the bottom areas of the tower base structure) to the area of ​​the backlight surface. Therefore, the coverage is greater than 0.90 and less than or equal to 1.00.

[0052] In one embodiment, the ratio of the sum of the areas of the target textured surfaces to the area of ​​the backlight surface is greater than or equal to 0.90. Since the sides of the tower base structure are all inclined planes with a certain inclination angle, the area of ​​the target textured surface of the tower base body on the backlight surface is basically smaller than the bottom area of ​​the tower base structure where it is located, so when the ratio of the sum of the areas of the target textured surfaces to the area of ​​the backlight surface is greater than or equal to 0.90, that is, the ratio of the sum of the areas of the target textured surfaces to the area of ​​the backlight surface is 0.90-1.00, which indicates that the backlight surface of the silicon substrate is almost covered with tower base structures.

[0053] Therefore, when the ratio of the sum of the areas of the target textured surfaces to the area of ​​the backlight surface is greater than or equal to 0.90, the backlight surface of the silicon substrate is almost covered with tower base structures, so the reflectivity of the back surface of the silicon substrate can be further improved.

[0054] In one embodiment, the distribution density of the tower base structure on the backlight surface is 2×10 3 -2×10 4 Pieces / mm 2 When the tower base structure distribution density on the backlight surface of the silicon substrate is 2×10 3 -2×10 4 Pieces / mm 2 , indicating that the tower base structure is evenly and densely distributed on the backlight surface. This ensures that the reflection of the backlight surface is consistent and improved.

[0055] In one embodiment, the distance between the target texture surface of the tower base structure and the backlight surface is 0.1-1.0 μm. Since multiple tower base structure edges and / or corners may overlap in a part of the backlight surface, the above distance includes the distance between the target texture surface of the topmost tower base structure and the backlight surface (i.e., the surface of the silicon substrate) when multiple tower base structures overlap.

[0056] To further improve the reflectivity of the backlight surface of the silicon substrate, in some embodiments, the second acute angle formed by the side surface of the tower base structure connected to the backlight surface and the horizontal plane is 50°-55°. The side surface is the inclined surface of the tower base structure that intersects the backlight surface and the target texture surface. The second acute angle means that the four sides of the tower base structure are all relatively gentle slopes, so that the reflectivity of the backlight surface of the silicon substrate can be further improved.

[0057] This horizontal plane is the plane where the backlight surface of the silicon substrate is located.

[0058] Please continue to refer to Figure 1 , the acute angle formed by the side surface 120 of the tower base structure and the horizontal plane is the second acute angle β. It should be noted that, Figure 1 The marked side 120 is only one of the sides of the tower base structure. The other three sides are Figure 1 Not shown.

[0059] Furthermore, the following describes the measurement methods of the distance between the target texture surface and the backlight surface, the area of ​​the target texture surface, the distribution density of the tower base structure, the first acute angle and the second acute angle.

[0060] First, at least 10 batches of silicon substrates are randomly selected, and at least 2 silicon substrates are selected from each batch for laser microscope testing.

[0061] Secondly, in order to facilitate the measurement of the above parameters, the magnification of the laser microscope is 3000 times, and at least three non-contiguous areas are selected for each silicon substrate, and the laser microscope is used to photograph them at the same magnification to obtain a three-dimensional image corresponding to each photographed area. Each silicon substrate corresponds to at least three three-dimensional images.

[0062] Next, use the laser microscope's built-in software to perform the following processing on each 3D image:

[0063] S1. In the three-dimensional image, select the target texture surface of each tower base structure, draw the horizontal plane used to measure the first acute angle and the second acute angle, and mark the plane where the backlight surface is located.

[0064] S2, select three points on the side of the target texture surface far from the backlight surface, measure the distance between the target texture surface and the backlight surface, and then calculate the average value as the first target distance of the target texture surface of the corresponding tower base structure; in the same way, measure the average value between the target texture surface and the backlight surface of each tower base structure in the three-dimensional image in turn as the first target distance, and calculate the average value of the first target distance of each tower base structure in the three-dimensional image as the second target distance. Finally, calculate the average value of the second target distance of all three-dimensional images to obtain the distance between the target texture surface and the backlight surface in the aforementioned tower base structure.

[0065] Consistent with the aforementioned method of determining the distance, the area of ​​the target texture surface selected in the aforementioned three-dimensional image is still measured by using the software provided in the laser microscope. After calculating the area mean of the target texture surface in the three-dimensional image, the average of the area means of all three-dimensional images is calculated as the area of ​​the target texture surface of the tower base structure in the aforementioned silicon substrate.

[0066] Consistent with the above-mentioned method of determining the distance, the tower base structures in the three-dimensional image are counted, and the number of tower base structures in the three-dimensional image is divided by the size of the shooting area corresponding to the three-dimensional image to obtain the distribution density of the shooting area. The distribution density of the shooting areas corresponding to all three-dimensional images is calculated to obtain the distribution density of the tower base structures on the backlight surface of the silicon substrate.

[0067] Consistent with the aforementioned method of determining the distance, the average of the first acute angles formed between each target texture surface and the horizontal plane in each three-dimensional image is measured respectively; then, the average of the first acute angle averages in all three-dimensional images is calculated to obtain the first acute angle formed between the aforementioned target texture surface farthest from the backlight surface and the horizontal plane.

[0068] The measurement and calculation method of the second acute angle is consistent with the measurement and calculation method of the first acute angle mentioned above, and will not be repeated here.

[0069] Based on the same inventive concept, the present application also provides a method for preparing the above silicon substrate. Figure 3 , the method comprises the following implementation steps:

[0070] Step 301: Under a temperature condition of less than or equal to 90° C., a first solution is allowed to etch with a first surface and a second surface opposite to each other in a silicon wafer to form a pyramid-structured texture structure.

[0071] The solute of the first solution includes a reaction rate regulator and a soluble base.

[0072] Specifically, the etching reaction can be achieved by soaking the first surface and the second surface of the silicon wafer with the first solution, so that the first solution corrodes the first surface and the second surface, causing the etching reaction.

[0073] The silicon wafer may be a single crystal silicon wafer with a thickness of ≥100 μm. The first surface and the second surface opposite to each other of the single crystal silicon wafer are two opposite surfaces with larger areas in the silicon wafer.

[0074] The solute of the first solution also includes a reaction rate regulator, which may be, for example, isopropyl alcohol. Isopropyl alcohol can control the reaction rate to avoid the problem of local unevenness of the side of the pyramid structure caused by the violent local reaction during the corrosion of the first surface and the second surface by the soluble alkali in the first solution, thereby avoiding the problem of reduced reflectivity of the silicon substrate finally obtained.

[0075] Furthermore, the solute of the first solution may also include one or more of polyethylene glycol, sodium benzoate, citric acid, hydrolyzed polymaleic anhydride, and sodium acetate as additives, and the total volume fraction of the additives and the reaction rate regulator in the first solution is 0.3%-1%.

[0076] Preferably, the total volume fraction of the additive and the reaction rate regulator in the first solution is 0.3%-0.6%, so that the second acute angle β formed by the side surface of the tower base structure connected to the horizontal plane and the horizontal plane is 50°-55°.

[0077] In one embodiment, the volume fraction of the soluble alkali in the first solution may be 1%-5%.

[0078] In one embodiment, the soluble base may be sodium hydroxide and / or potassium hydroxide.

[0079] In one embodiment, the temperature condition may be selected from 70-90° C., preferably 80-90° C. The reaction time of the etching reaction is less than 550 seconds.

[0080] Step 302: Under a temperature condition of less than or equal to 90° C., the second solution is allowed to etch the first surface or the second surface for 250-600 seconds to polish the top of the pyramid structure on the etched surface to form a pyramid base structure to obtain a silicon substrate.

[0081] Wherein, the solute of the second solution includes a soluble alkali.

[0082] The surface forming the tower base structure is the backlight surface of the silicon substrate, and the other surface opposite to the backlight surface is the light-facing surface of the silicon substrate.

[0083] Specifically, the first surface or the second surface can be immersed in the second solution for 250-600 seconds at a temperature of 60-90° C., so that the second solution and the immersed surface undergo an etching reaction, thereby polishing the top of the pyramid structure of the immersed surface to form a pyramid base structure.

[0084] The above temperature condition of 60-90° C. can ensure that the etching reaction rate is not too slow while avoiding the problem of reduced minority carrier lifetime caused by excessively high temperature.

[0085] In some embodiments, the soluble alkali in the second solution is potassium hydroxide, and the volume fraction of the potassium hydroxide in the second solution is 5%-15%.

[0086] In some embodiments, the etching reaction time between the second solution and the silicon wafer surface is 250-600 seconds. In addition, to further increase the reaction rate, in some embodiments, the volume fraction of the soluble alkali in the second solution is greater than the volume fraction of the soluble alkali in the first solution.

[0087] In some embodiments, the solute of the second solution includes an additive for overcoming anisotropy.

[0088] When the second solution is etching, the above-mentioned additive for overcoming anisotropy can break the anisotropic properties of the solution containing soluble alkali on the etched surface of the silicon wafer, promote the second solution to etch the pyramid structure isotropically, and finally achieve polishing of the top of the pyramid structure on the etched surface to form a pyramid base structure. The surface on which the pyramid base structure is formed after etching is the backlight surface.

[0089] In some embodiments, in the second solution, the volume fraction of the additive for overcoming anisotropy is 0.5%-3%. Preferably, the volume fraction of the additive for overcoming anisotropy is 1%-2%.

[0090] The additive for overcoming anisotropy may include, for example, ethylene glycol butyl ether (EGBE).

[0091] Furthermore, after forming the tower base structure and before obtaining the silicon substrate, the backlight surface containing the tower base structure and the light-facing surface opposite to the backlight surface may be cleaned to remove impurities left after etching with the first solution and the second solution. The details are as follows:

[0092] First, the surface was cleaned with deionized water to preliminarily remove some water-soluble impurities.

[0093] Then, the surface is further cleaned using an aqueous solution containing potassium hydroxide and hydrogen peroxide to remove organic matter attached to the surface.

[0094] Next, the surface was cleaned using deionized water.

[0095] Next, the surface is cleaned with an aqueous solution containing hydrogen chloride and hydrogen peroxide to remove the metal ions remaining on the surface.

[0096] Next, the surface is cleaned with hydrogen fluoride to remove the surface oxide layer.

[0097] Finally, the surface is cleaned with deionized water and then dried to obtain a tower base.

[0098] Based on the same inventive concept, an embodiment of the present application also provides a back-contact battery. Figure 4 This is a schematic diagram of the structure of a back contact battery provided in an embodiment of the present application. Figure 4 As shown, the back contact cell 400 comprises:

[0099] The silicon substrate 200 has a backlight surface 220 ( Figure 4 ) is divided into a first area A, a second area B, and an intersection area C between the first area and the second area;

[0100] The first stack in the first region A and the second stack in the second region B have opposite conductivity types, and an insulating layer 410 is disposed between the first stack and the second stack in the intersection region C to insulate the first stack from the second stack.

[0101] The isolation trench 409 in the back contact battery 400 penetrates the second stacked layer in the intersection region C and is connected to the insulating layer 410 .

[0102] Furthermore, a first electrode 404 is disposed on the first stack, and a second electrode 405 is disposed on the second stack.

[0103] Specifically, the light-facing surface 210 ( Figure 4 A passivation layer 412 and an anti-reflection layer 411 matching the light-facing surface having a pyramid structure are sequentially arranged along a direction away from the silicon substrate 200.

[0104] The passivation layer 412 is one or more of an intrinsic silicon-containing film and an N-type doped silicon-containing film. The thickness of the intrinsic silicon-containing film is 1 to 15 nm, and the thickness of the N-type doped silicon-containing film is 0 to 15 nm.

[0105] Alternatively, the passivation layer 412 may also be an N-type doped silicon layer.

[0106] The anti-reflection layer 411 is at least one of aluminum oxide, silicon oxide, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride, aluminum nitride, magnesium fluoride, lithium fluoride, ITO, and zinc oxide, and has a thickness of 40 to 200 nm.

[0107] Furthermore, the first region A contained in the backlight surface 220 is an N-type region, and the first stacked layer includes in sequence along the direction away from the silicon substrate 200: a tunneling oxide layer 401, an N-type doped polysilicon layer (or an N-type doped silicon-containing film) 402, and a conductive film 403.

[0108] The tunneling oxide layer 401 may be a silicon oxide layer with a thickness of 0.5 to 3 nm; and the N-type doped polysilicon layer 402 has a thickness of 30 to 200 nm.

[0109] In another embodiment, the tunnel oxide layer 401 may be replaced by a first intrinsic silicon-containing film, specifically, the first intrinsic silicon-containing film may include at least one of microcrystalline, nano or amorphous silicon, silicon oxide, and silicon carbide. It may be composed of a single layer with the same performance, a multilayer with the same or different layers and interlayer parts, or a repeated unit of the aforementioned multilayer.

[0110] The doping element of the N-type doped silicon-containing film 402 may be P and / or As. The N-type doped silicon-containing film 402 may include at least one of microcrystalline, nano or amorphous silicon, silicon oxide, and silicon carbide. It may be composed of a single layer with the same performance, a multilayer with the same or different layers and interlayer parts, or a repeating unit of the aforementioned multilayer, and its thickness is 1-50nm.

[0111] The conductive film 403 may be one layer or multiple layers or stacked layers, and its components may be one or more doped metal oxides or nitrides or a mixture.

[0112] The metal oxide may be indium oxide, tin oxide, zinc oxide, cadmium oxide, titanium nitride, the metal nitride may be titanium nitride, and its doping element may be indium, tin, calcium, aluminum, cadmium, zinc, cerium, fluorine;

[0113] The second region B is a P-type region, and the second stacked layers include, in order along a direction away from the silicon substrate 200 , a second intrinsic silicon-containing film 408 , a P-type doped silicon-containing film 407 , and a conductive film layer 406 .

[0114] The second intrinsic silicon-containing film 408 includes at least one of microcrystalline silicon, nano-silicon, amorphous silicon, silicon oxide and silicon carbide. The second intrinsic silicon-containing film 408 may be composed of one or more of the aforementioned components, and may be composed of a single layer with the same performance, a multilayer with the same or different layers between layers, or a repeated unit of the aforementioned multilayer.

[0115] The doping element in the P-type doped silicon-containing film 407 may be at least one of B, Al, Ga and In. The P-type doped silicon-containing film 407 may include at least one of microcrystalline silicon, nano silicon, amorphous silicon, silicon oxide and silicon carbide; the P-type doped silicon-containing film 407 may be composed of a single layer with the same performance, a multilayer with the same or different layers between layers, or a repeating unit of the aforementioned multilayer, and its thickness is 1 to 50 nm.

[0116] The first electrode 404 is a stack of one or more of a silver electrode, a silver alloy electrode, a copper electrode, a copper alloy electrode, and a nickel / copper / silver multilayer electrode.

[0117] The second electrode 405 is a silver electrode, a silver alloy electrode, a copper electrode, a copper alloy electrode, a nickel / copper / silver multilayer electrode, or a stack of several of them.

[0118] Furthermore, the above-mentioned intersection region C is sequentially provided with a tunneling oxide layer (or a first intrinsic silicon-containing film) 401, an N-type doped polysilicon layer (or an N-type doped silicon-containing film) 402, an insulating layer 410, a second intrinsic silicon-containing film 408, a P-type doped silicon-containing film 407, and a conductive film 406 along a direction away from the silicon substrate.

[0119] The insulating layer 410 includes at least one of aluminum oxide, silicon oxide, gallium oxide, silicon nitride, aluminum nitride, silicon oxynitride and aluminum oxynitride.

[0120] The isolation trench 409 penetrates the second intrinsic silicon-containing film 408 , the P-type doped silicon-containing film 407 , and the conductive film 406 (ie, the isolation trench 409 does not contain the second intrinsic silicon-containing film 408 , the P-type doped silicon-containing film 407 , and the conductive film 406 ), and is connected to the insulating layer 410 .

[0121] Further, the following provides examples and comparative examples to illustrate the above silicon substrate: Example 1

[0122] S1. Under a temperature condition of 80° C., a first solution containing a potassium hydroxide solution is used to soak a silicon wafer for 480 seconds to form a pyramid structure on a first surface and a second surface opposite to the silicon wafer.

[0123] The first solution includes Changzhou Shichuangxin Energy HJ21 additive, the volume fraction of which in the first solution is 0.3%. The volume fraction of potassium hydroxide solution in the first solution is 1.8%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0124] S2. Under a temperature condition of 70° C., the second surface is infiltrated with a second solution containing potassium hydroxide (solution) for 500 seconds to obtain a second surface having a tower base structure as its texture structure.

[0125] The second solution contains an additive for overcoming anisotropy, and the additive is an additive of Tuobang New Energy bp21 (manufacturer), and the volume fraction of the additive in the second solution is 1.9%.

[0126] The volume fraction of the potassium hydroxide solution in the second solution is 4.4%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0127] S3. Washing in sequence with deionized water, an aqueous solution containing potassium hydroxide and hydrogen peroxide, deionized water, an aqueous solution containing hydrogen chloride and hydrogen peroxide, hydrogen fluoride, and deionized water to obtain a silicon substrate.

[0128] The SEM image of the backlit surface of the silicon substrate is as follows Figure 5 shown.

[0129] Example 2

[0130] S1. Under the temperature condition of 80° C., a first solution having a volume fraction of 1.8% potassium hydroxide solution (48% by mass) is used to soak a silicon wafer for 480 seconds to form a pyramid structure on the first and second opposite surfaces of the silicon wafer.

[0131] The first solution includes Changzhou Shichuangxin Energy HJ21 additive, the volume fraction of which in the first solution is 0.3%. The volume fraction of potassium hydroxide solution in the first solution is 1.8%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0132] S2. Under a temperature condition of 65° C., the second surface is infiltrated with a second solution containing a potassium hydroxide solution for 600 seconds to obtain a second surface having a tower base structure as its texture structure.

[0133] The second solution contains an additive for overcoming anisotropy, which is an additive of Tuobang New Energy BP21 (manufacturer), and its volume fraction in the second solution is 1.9%. The volume fraction of potassium hydroxide solution in the second solution is 4.4%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0134] S3. Washing in sequence with deionized water, an aqueous solution containing potassium hydroxide and hydrogen peroxide, deionized water, an aqueous solution containing hydrogen chloride and hydrogen peroxide, hydrogen fluoride, and deionized water to obtain a silicon substrate.

[0135] Example 3

[0136] S1. Under a temperature condition of 70° C., a first solution containing a potassium hydroxide solution is used to soak a silicon wafer for 210 seconds to form a pyramid structure on a first surface and a second surface opposite to the silicon wafer.

[0137] The first solution includes Topband New Energy EP12 additive, the volume fraction of which is 0.7%. The volume fraction of potassium hydroxide solution in the first solution is 1.1%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0138] S2. Under a temperature condition of 63° C., the second surface is infiltrated with a second solution containing a potassium hydroxide solution for 540 seconds to obtain a second surface having a tower base structure as its texture structure.

[0139] The second solution contains the additive of Topband New Energy BP21, with a volume fraction of 1.9%. The volume fraction of potassium hydroxide solution in the second solution is 3.2%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0140] S3. Washing in sequence with deionized water, an aqueous solution containing potassium hydroxide and hydrogen peroxide, deionized water, an aqueous solution containing hydrogen chloride and hydrogen peroxide, hydrogen fluoride, and deionized water to obtain a silicon substrate.

[0141] Comparative Example 1

[0142] S1. Under a temperature condition of 70° C., a first solution containing a potassium hydroxide solution is used to soak a silicon wafer for 210 seconds to form a pyramid structure on a first surface and a second surface opposite to the silicon wafer.

[0143] The first solution includes Topband New Energy EP12 additive, the volume fraction of which is 0.7%. The volume fraction of potassium hydroxide solution in the first solution is 1.1%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0144] S2. Under a temperature condition of 63° C., the second surface is infiltrated with a second solution containing a potassium hydroxide solution for 200 seconds to obtain a second surface having a tower base structure as its texture structure.

[0145] The second solution contains the additive of Topband New Energy BP21, with a volume fraction of 0.8%. The volume fraction of potassium hydroxide solution in the second solution is 4.5%, and the mass fraction of potassium hydroxide in the potassium hydroxide solution is 48%.

[0146] S3. Washing in sequence with deionized water, an aqueous solution containing potassium hydroxide and hydrogen peroxide, deionized water, an aqueous solution containing hydrogen chloride and hydrogen peroxide, hydrogen fluoride, and deionized water to obtain a silicon substrate.

[0147] The SEM image of the backlit surface of the silicon substrate is as follows Figure 6 As shown, by Figure 6 It can be seen that the target texture surface farthest from the backlight surface in the tower base structure (i.e., the texture surface at the top of the tower base) has a smaller area.

[0148] For the silicon substrates in Examples 1 to 3 and Comparative Example 1, the first acute angle α and the second acute angle β of the tower base structure on the backlight surface, the ratio m of the sum of the areas of the target texture surfaces to the area of ​​the backlight surface, the distribution density d of the tower base structure, and the height h of the target texture surface in the tower base structure and the backlight surface are tested respectively. The test data can be found in Table 1.

[0149] Table 1

[0150] Serial number α(°) β(°) m <![CDATA[d (pieces / mm 2 )]]> h(μm) Example 1 0.16° 52.5° 0.95 5012 0.36 Example 2 0.30° 53.2° 0.92 8536 0.44 Example 3 1.3° 56.7° 0.3 35075 1.2 Comparative Example 1 2.7° 58.3° 0.6 26024 0.30

[0151] Further, the silicon substrates in Example 1 and Comparative Example 1 were used to prepare Figure 4 The back contact cell of the structure shown in the figure is measured, and the height difference ΔH between the N-region and the P-region of the silicon substrate of the back contact cell is measured. 2 , the spectral distribution is AM1.5, the test temperature is 25℃, and Jsc (Short-circuit current density), Voc (Open-circuit voltage), FF (Fill Factor) and Eta (High-Efficiency Tandem Solar Cell) are tested; the test data are shown in Table 2.

[0152] Table 2

[0153] Serial number ΔH(μm) <![CDATA[Jsc(mA / cm 2 )]]> Voc(mV) FF(%) Eta(%) Example 1 4.37 41.6 748.4 86.5 26.92 Example 2 4.44 41.5 747.2 86.2 26.72 Example 3 5.36 41.6 743.7 86.3 26.70 Comparative Example 1 8.33 41.4 743.0 86.67 26.66

[0154] It can be seen from Table 2 that, compared with Comparative Example 1, the height difference ΔH between the N region and the P region in Examples 1 to 4 is effectively reduced, and after the height difference ΔH between the N region and the P region is reduced, Eta is increased.

[0155] In addition, the tower base structure on the backlight side of the silicon substrate in Examples 1 to 4 reduces laser damage, improves the open circuit voltage and short circuit current of the cell, and moderately increases the contact resistance between the silicon substrate and the electrode, slightly reduces FF, and ultimately increases Eta.

[0156] Based on the same inventive concept, an embodiment of the present application also provides a photovoltaic cell assembly, which includes the aforementioned back contact cell.

[0157] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0158] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A silicon substrate (200), characterized in that: include: A light-facing surface (210) and a light-receiving surface (220) opposite to each other; wherein the texture structure of the light-facing surface (210) comprises a pyramid structure, and the texture structure of the light-receiving surface (220) comprises a pyramid base structure (100), In the tower base structure (100), a first acute angle between a target texture surface (110) farthest from the backlight surface (220) and a horizontal plane is less than or equal to 2°.

2. The silicon substrate (200) according to claim 1, characterized in that: The first acute angle is less than or equal to 1°.

3. The silicon substrate (200) according to claim 1 or 2, characterized in that: The coverage rate of the tower base structure (100) on the backlight surface (220) is greater than 0.

90.

4. The silicon substrate (200) according to claim 1, characterized in that: The ratio of the sum of the areas of the target textured surfaces (110) to the area of ​​the backlight surface (220) is greater than or equal to 0.90; Preferably, the distribution density of the tower base structure (100) on the backlight surface (220) is 2×10 3 -2×10 4 Pieces / mm 2 ; Preferably, the distance between the target texture surface (110) and the backlight surface (220) is 0.1-1.0 μm.

5. The silicon substrate (200) according to claim 1, characterized in that: The second acute angle formed between the side surface (120) of the tower base structure (100) connected to the backlight surface (220) and the horizontal plane is 50°-55°.

6. A method for preparing the silicon substrate (200) according to any one of claims 1 to 5, characterized in that: include: Under a temperature condition of less than or equal to 90° C., the first solution is allowed to react with the first surface and the second surface opposite to each other in the silicon wafer to form a pyramid-structured texture structure; wherein the solute of the first solution includes a reaction rate regulator and a soluble alkali; Under a temperature condition of less than or equal to 90° C., the second solution is allowed to undergo an etching reaction with the first surface or the second surface for 250-600 seconds to polish the top of the pyramid structure on the etched surface to form a pyramid base structure (100) and obtain the silicon substrate (200); wherein the solute of the second solution includes a soluble alkali, and the surface where the pyramid base structure (100) is located is the backlight surface (220) of the silicon substrate (200).

7. The method according to claim 6, characterized in that The volume fraction of the soluble alkali in the second solution is greater than the volume fraction of the soluble alkali in the first solution, and the volume fraction of the soluble alkali in the first solution is 1%-5%.

8. The method according to any one of claims 6 to 7, characterized in that: The solute of the second solution includes an additive for overcoming anisotropy; Preferably, the volume fraction of the additive in the second solution is 0.5%-3%.

9. A back contact battery (400), characterized in that: The back contact cell (400) comprises: The silicon substrate (200) according to any one of claims 1 to 5, wherein the backlight surface (220) of the silicon substrate comprises a first area, a second area, and an intersection area between the first area and the second area, A first stacked layer, disposed in the first region; a second stacked layer, arranged in the second region, the second stacked layer having a conductivity type opposite to that of the first stacked layer, and an insulating layer (410) being arranged between the first stacked layer and the second stacked layer in the intersection region; A first electrode (404) is disposed on the first stack; A second electrode (405) is disposed on the second stack; An isolation groove (409) penetrates the second stacked layer in the intersection area and is connected to the insulating layer (410).

10. A photovoltaic cell assembly, characterized in that: include: The back contact cell (400) of claim 9.

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