Error correction method and device of NAND FLASH controller and flash memory

Abstract

The invention discloses an error correction method and device for an NAND FLASH controller and a flash memory, and the method comprises the steps: receiving preset data by the controller, and judging the relation between the current erasing frequency of a storage module and T1 and T2; if the current erasing frequency is less than T1, controlling a first error correction module to carry out error correction coding on the preset data to obtain first coded preset data; if the current erasing frequency is greater than or equal to T1 and less than T2, controlling a second error correction module to carry out error correction coding on the preset data to obtain second coded preset data; if the current erasing frequency is greater than or equal to T2, controlling a third error correction module to carry out error correction coding on the preset data to obtain third coded preset data; and obtaining coding preset data according to the first coding preset data, the second coding preset data or the third coding preset data, and writing the coding preset data into a storage module. The three error correction modules are arranged in the controller, the controller can select the error correction modules, and the adaptability of the controller is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data storage, and in particular to an error correction method and device of a NAND FLASH controller and a flash memory. Background Art

[0002] With the rapid development of storage technology, memory has been widely used in various electronic devices. NAND FLASH, as a non-volatile memory, is widely used in embedded systems and electronic devices due to its small size, low power consumption, fast read and write speed and other advantages. NAND FLASH has become an ideal storage medium for embedded systems and electronic devices due to its high cost performance, low power consumption and small size. However, for embedded systems and electronic devices, data reliability and integrity are particularly critical. In particular, since the storage module of SPI NAND FLASH has a limited number of erase and write times (service life), the error rate of the storage module will continue to rise as the number of erase and write times increases. In order to ensure data integrity, a BCH error correction module is usually used to correct storage errors.

[0003] However, the existing error correction method of the NAND FLASH controller uses a BCH error correction module that is fixedly configured in the controller to perform error correction. Once configured, it cannot be dynamically adjusted, resulting in the problem of poor adaptability of the NAND FLASH controller.

[0004] Therefore, there is still an urgent need for a method that can improve the adaptability of the NAND FLASH controller. Summary of the invention

[0005] The main purpose of the present invention is to provide an error correction method, device and flash memory for a NAND FLASH controller to solve the existing defects that the error correction module is fixedly configured in the controller, the error correction module cannot be dynamically adjusted, and the controller has poor adaptability.

[0006] To achieve the above object, the present invention proposes an error correction method for a NAND FLASH controller, the error correction method for the NAND FLASH controller comprising:

[0007] Receive preset data, and determine the relationship between the current erasure times of the storage module and preset erasure times T1 and T2, wherein T1 and T2 are determined according to the total erasure times of the storage module, and 0<T1<T2<total erasure times;

[0008] If the current number of erasures is less than T1, controlling the first error correction module to perform error correction coding on the preset data to obtain first coded preset data;

[0009] If the current number of erasures is greater than or equal to T1 and less than T2, controlling the second error correction module to perform error correction encoding on the preset data to obtain second encoded preset data;

[0010] If the current number of erasures is greater than or equal to T2, controlling the third error correction module to perform error correction coding on the preset data to obtain third coded preset data;

[0011] Obtaining encoding preset data according to the first encoding preset data, the second encoding preset data or the third encoding preset data;

[0012] The encoding preset data is written into the storage module.

[0013] In some embodiments, after writing the encoding preset data into the storage module, the method further includes:

[0014] Read the coded preset data of the storage module, and determine the relationship between the current erasing and writing times of the storage module and the preset erasing and writing times T1 and T2;

[0015] If the current number of erasures is less than T1, controlling the first error correction module to perform error correction decoding on the encoded preset data to obtain first preset data;

[0016] If the current number of erasures is greater than or equal to T1 and less than T2, the second error correction module is controlled to perform error correction decoding on the encoded preset data to obtain second preset data;

[0017] If the current number of erasures is greater than or equal to T2, controlling the third error correction module to perform error correction decoding on the encoded preset data to obtain third preset data;

[0018] The first preset data, the second preset data or the third preset data is compared with the preset data, and whether the error correction decoding is successful is determined according to the comparison result.

[0019] In some embodiments, comparing the first preset data, the second preset data, or the third preset data with the preset data, and determining whether error correction decoding is successful according to the comparison result, includes:

[0020] When the first preset data, the second preset data or the third preset data is inconsistent with the preset data, determining that the first error correction decoding fails;

[0021] When the first error correction decoding fails, the third error correction module is controlled to perform a second error correction decoding on the encoded preset data.

[0022] In some embodiments, writing the encoding preset data into the storage module includes:

[0023] Performing encryption operation on the encoded preset data to obtain encrypted data;

[0024] The encrypted data is written into the storage module.

[0025] In some embodiments, the performing encryption operation on the encoded preset data includes:

[0026] According to the encryption selection instruction, the encoding preset data is classified to obtain the encoding preset data to be encrypted and the non-encrypted encoding preset data;

[0027] Performing encryption operation on the preset data to be encrypted to obtain selected encrypted data;

[0028] The non-encrypted encoded preset data is maintained unchanged.

[0029] In some embodiments, the step of writing the encoding preset data into the storage module further includes:

[0030] Performing a hash check operation on the encrypted data to obtain a hash value of the encrypted data;

[0031] The hash value of the encrypted data and the encrypted data are written into the storage module.

[0032] In some embodiments, the NAND FLASH includes a temperature detection module; after the controller receives the preset data, it also includes:

[0033] Obtaining the current temperature detected by the temperature detection module;

[0034] Determining whether the current temperature is within a preset temperature range;

[0035] If the current temperature is not within the preset temperature range, controlling the third error correction module to perform error correction coding on the preset data;

[0036] If the current temperature is within the preset temperature range, a step of determining the relationship between the current erasing and writing times of the storage module and the preset erasing and writing times T1 and T2 is performed.

[0037] In some embodiments, before receiving the preset data, the method further includes:

[0038] Receive key data sent by the host computer;

[0039] Generate shared key data according to the key data, and send it to the host computer;

[0040] Receiving encrypted channel data fed back by the host computer according to the shared key data;

[0041] Establish encrypted communication with the host computer according to the encrypted channel data.

[0042] The present invention also provides an error correction device for a NAND FLASH controller, comprising:

[0043] at least one controller; and,

[0044] a memory in communication with the at least one controller; wherein,

[0045] The memory stores instructions executed by the at least one controller, and the instructions are executed by the at least one controller so that the at least one controller can execute any one of the above-mentioned error correction methods for the NAND FLASH controller.

[0046] The present invention further provides a flash memory, including a NAND FLASH and an error correction device of the NAND FLASH controller as described above.

[0047] The present invention sets three error correction modules inside the controller, and the controller can be dynamically adjusted according to the current number of erase and write times of the storage module to use a suitable error correction module, thereby reducing the error rate of the data; the controller can select a suitable error correction module to correct the data, thereby improving the adaptability of the controller and reducing the error rate of the data; and the controller can also perform encryption operations and hash check operations on the data to ensure the security and integrity of the data; the controller can also selectively encrypt the data when performing encryption operations on the data, which can reduce the encryption load of conventional data and ensure the security of sensitive data. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 It is a flow chart of the error correction method of the NAND FLASH controller of the present invention;

[0049] Figure 2 Another schematic diagram of the process flow of the error correction method of the NAND FLASH controller of the present invention;

[0050] Figure 3 Another schematic diagram of the process flow of the error correction method of the NAND FLASH controller of the present invention;

[0051] Figure 4 Another schematic diagram of the process flow of the error correction method of the NAND FLASH controller of the present invention;

[0052] Figure 5 Another schematic diagram of the process flow of the error correction method of the NAND FLASH controller of the present invention;

[0053] Figure 6It is a structural schematic diagram of an error correction device of a NAND FLASH controller involved in an embodiment of the present invention;

[0054] Figure 7 It is a schematic diagram of the structure of the flash memory of the present invention.

[0055] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0056] The scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0057] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0058] It should also be noted that when an element is referred to as being "fixed on" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element at the same time. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0059] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0060] To achieve the above object, the present invention provides an error correction method for a NAND FLASH controller, and the error correction method for a NAND FLASH controller includes:

[0061] Step S110, receiving preset data, and determining the relationship between the current erasure times of the storage module and the preset erasure times T1 and T2, wherein T1 and T2 are determined according to the total erasure times of the storage module, and 0<T1<T2<total erasure times;

[0062] Step S120, if the current erasure times are less than T1, the first error correction module is controlled to perform error correction coding on the preset data to obtain first coded preset data;

[0063] Step S130, if the current erasure times is greater than or equal to T1 and less than T2, then control the second error correction module to perform error correction coding on the preset data to obtain second coded preset data;

[0064] Step S140, if the current erasure times is greater than or equal to T2, control the third error correction module to perform error correction coding on the preset data to obtain third coded preset data;

[0065] Step S150, obtaining encoding preset data according to the first encoding preset data, the second encoding preset data or the third encoding preset data;

[0066] Step S160, writing the encoded preset data into the storage module.

[0067] In this embodiment, refer to Figure 1 , Figure 6 and Figure 7 , the error correction method of the NAND FLASH controller is applied to the error correction device of the NAND FLASH controller; the error correction device of the NAND FLASH controller is installed inside the NAND FLASH. Among them, the NAND FLASH can be SPI NAND Flash (Serial Peripheral Interface NAND Flash, flash memory of serial peripheral interface); the controller can be an SPI controller. The controller can include a first error correction module, a second error correction module and a third error correction module. In this embodiment, the execution subject of the method steps is the controller.

[0068] It is understandable that the storage module has a limited number of erase and write cycles (P / E Cycles, Program / Erase Cycles); each data writing and erasing operation will cause a certain amount of wear and tear on the storage module; as the number of erase and write cycles increases, the probability of errors in the storage module also increases. The total number of erase and write cycles of the storage module refers to the service life of the storage module; in this embodiment, the service life of the storage module is described as 100,000 times; then T1 can be set to 20,000 times, and T2 can be set to 50,000 times.

[0069] When NAND FLASH is connected to the host computer and exchanges data with the host computer, the controller in NAND FLASH can receive the preset data sent by the host computer. After receiving the preset data, the controller will not directly write the preset data into the storage module. Instead, it will first determine the current erase and write times of the storage module, and select the error correction module according to the current erase and write times; after error correction encoding the preset data, it will be written into the storage module. The controller compares the current erase and write times of the storage module with the preset erase and write times T1 and T2; for example, the current erase and write times of the storage module can be compared with 20,000 times and 50,000 times.

[0070] In this embodiment, the first error correction module is a 1bit / 512byte error correction module; the second error correction module is a 4bit / 512byte error correction module; and the third error correction module is an 8bit / 512byte error correction module.

[0071] 1bit / 512byte error correction module: For every 512 bytes of data, a 1-bit error correction code is assigned. This is a relatively simple error correction method. It mainly detects whether the data is wrong through simple parity checks and other methods. For example, if parity check is used, the number of "1"s in the 512 bytes of data is calculated before data storage or transmission, whether it is an odd number or an even number, and this parity information is stored as a 1-bit error correction code. When reading data, the parity of the data is recalculated and compared with the stored error correction code. If they are inconsistent, it is known that the data has an error. However, this method can only detect an odd number of error bits and cannot correct errors. It can only require retransmission of data after an error is found.

[0072] 4bit / 512byte error correction module: For every 512 bytes of data, a 4-bit error correction code is assigned, which is more complex and powerful than a 1-bit error correction method. It may use error correction coding methods such as Hamming code. Hamming code can correct errors within a certain range. Taking Hamming code as an example, it can insert check bits at specific positions in the data (here the 4-bit error correction code is equivalent to the check bits). By calculating and comparing these check bits, it can not only detect errors, but also determine the location of the errors, thereby correcting the errors. This error correction module can correct single-bit errors and is very effective for data recovery with a small number of errors.

[0073] 8bit / 512byte error correction module: For every 512 bytes of data, 8 bits of error correction code are allocated, providing stronger error correction capabilities. It may use more complex error correction coding algorithms, such as Reed-Solomon Code. Reed-Solomon Code is widely used in the fields of storage and communication, especially in optical disk storage, digital communication, etc. It can correct multiple consecutive error bits or scattered error bits. For example, in NAND FLASH, data may have errors during the reading process due to bad blocks in the storage module. The 8bit / 512byte error correction module (using Reed-Solomon Code) can effectively recover some damaged data and ensure the accuracy of the data.

[0074] If the controller determines that the current erase and write times of the storage module is less than T1, that is, the current erase and write times of the storage module is less than 20,000 times, it will control the first error correction module to perform error correction coding on the preset data to obtain the first coded preset data; wherein, error correction coding refers to encoding the data using the error correction module. The controller starts the 1bit / 512byte error correction module to perform error correction coding on the preset data. When the probability of error in the storage module is low, a simple error correction module can be used to perform error correction coding on the preset data to improve NAND FLASH performance and reduce redundant space occupation.

[0075] If the controller determines that the current erase and write times of the storage module is greater than or equal to T1 and less than T2, that is, the current erase and write times of the storage module is greater than or equal to 20,000 times and less than 50,000 times, it will control the second error correction module to perform error correction coding on the preset data to obtain the second coded preset data. As the number of times the storage module is used increases, the probability of errors in the storage module will gradually increase. When the current erase and write times of the storage module is greater than or equal to 20,000 times and less than 50,000 times, the controller will start the 4bit / 512byte error correction module to perform error correction coding on the preset data to ensure data reliability.

[0076] If the controller determines that the current erasure and write times of the storage module is greater than or equal to T2, that is, the current erasure and write times of the storage module is greater than or equal to 50,000 times, it will control the third error correction module to perform error correction coding on the preset data to obtain the third coded preset data. As the number of times the storage module is used increases, the storage module will enter a high error rate stage. When the current erasure and write times of the storage module is greater than or equal to 50,000 times, the controller will start the 8bit / 512byte error correction module to perform error correction coding on the preset data to ensure data reliability.

[0077] No matter which error correction module is started by the controller, the corresponding encoding preset data will be generated. The controller will obtain the encoding preset data according to the first encoding preset data; or obtain the encoding preset data according to the second encoding preset data; or obtain the encoding preset data according to the third encoding preset data.

[0078] After obtaining the preset encoding data, the controller will write the preset encoding data into the storage module.

[0079] Through this embodiment, three error correction modules can be set inside the controller. The controller can be dynamically adjusted according to the current number of erase and write times of the storage module to use a suitable error correction module, thereby reducing the error rate of the data; the controller can select a suitable error correction module to correct the data, thereby improving the adaptability of the controller and reducing the error rate of the data.

[0080] In some embodiments, after writing the encoding preset data into the storage module, the method further includes:

[0081] Step S170, reading the encoded preset data of the storage module, and determining the relationship between the current erasing and writing times of the storage module and the preset erasing and writing times T1 and T2;

[0082] Step S171, if the current erasure times are less than T1, the first error correction module is controlled to perform error correction decoding on the encoded preset data to obtain the first preset data;

[0083] Step S172, if the current erasure times is greater than or equal to T1 and less than T2, then control the second error correction module to perform error correction decoding on the encoded preset data to obtain second preset data;

[0084] Step S173, if the current erasure times is greater than or equal to T2, control the third error correction module to perform error correction decoding on the encoded preset data to obtain third preset data;

[0085] Step S174, comparing the first preset data, the second preset data or the third preset data with the preset data, and determining whether the error correction decoding is successful according to the comparison result.

[0086] In this embodiment, refer to Figure 2 After executing step S160, the controller will also read the storage module. The controller reads the coded preset data stored in the storage module. After reading, it is also necessary to determine the current erasure and write times of the storage module. The controller compares the current erasure and write times of the storage module with the preset erasure and write times T1 and T2; that is, the current erasure and write times of the storage module are compared with 20,000 times and 50,000 times.

[0087] If the controller determines that the current erase and write times of the storage module is less than T1, that is, the current erase and write times of the storage module is less than 20,000 times, it will control the first error correction module to perform error correction decoding on the coded preset data to obtain the first preset data; wherein error correction decoding refers to decoding the data using the error correction module. The controller starts the 1bit / 512byte error correction module to perform error correction decoding on the coded preset data. When the probability of an error in the storage module is low, a simple error correction module can be used to perform error correction decoding on the coded preset data to improve NAND FLASH performance and reduce redundant space occupation.

[0088] If the controller determines that the current erasure and write times of the storage module is greater than or equal to T1 and less than T2, that is, the current erasure and write times of the storage module is greater than or equal to 20,000 times and less than 50,000 times; it will control the second error correction module to perform error correction decoding on the coded preset data to obtain the second preset data. As the number of times the storage module is used increases, the probability of errors in the storage module will gradually increase. When the current erasure and write times of the storage module is greater than or equal to 20,000 times and less than 50,000 times, the controller will start the 4bit / 512byte error correction module to perform error correction decoding on the coded preset data to ensure data reliability.

[0089] If the controller determines that the current erasure and write times of the storage module is greater than or equal to T2, that is, the current erasure and write times of the storage module is greater than or equal to 50,000 times, it will control the third error correction module to perform error correction decoding on the coded preset data to obtain the third preset data. As the number of times the storage module is used increases, the storage module will enter a high error rate stage. When the current erasure and write times of the storage module is greater than or equal to 50,000 times, the controller will start the 8bit / 512byte error correction module to perform error correction decoding on the coded preset data to ensure data reliability.

[0090] The controller also compares the first preset data, the second preset data or the third preset data with the preset data, and determines whether the error correction decoding is successful according to the comparison result.

[0091] In some embodiments, the first preset data, the second preset data, or the third preset data is compared with the preset data, and determining whether the error correction decoding is successful according to the comparison result includes:

[0092] Step S180, when the first preset data, the second preset data or the third preset data is inconsistent with the preset data, determining that the first error correction decoding fails;

[0093] Step S181, when the first error correction decoding fails, controlling the third error correction module to perform a second error correction decoding on the encoded preset data.

[0094] In this embodiment, refer to Figure 3After executing step S174, the controller will also perform secondary error correction decoding after the first error correction decoding fails. After the controller starts the first error correction module to obtain the first preset data, when it is determined that the first preset data is inconsistent with the preset data, it will be determined that the first error correction decoding has failed; at this time, the controller will control the third error correction module to perform secondary error correction decoding on the encoded preset data.

[0095] After the controller starts the second error correction module to obtain the second preset data, when it is determined that the second preset data is inconsistent with the preset data, it will be determined that the first error correction decoding has failed; at this time, the controller will control the third error correction module to perform secondary error correction decoding on the encoded preset data.

[0096] After the controller starts the third error correction module to obtain the third preset data, when it is determined that the third preset data is inconsistent with the preset data, it will be determined that the first error correction decoding has failed; at this time, the controller will control the third error correction module to perform secondary error correction decoding on the encoded preset data.

[0097] Through this embodiment, no matter which error correction module the controller uses to perform error correction decoding on the coded preset data, when the error correction decoding fails, the third error correction module will be started to perform secondary error correction decoding on the coded preset data, thereby ensuring reliable reading of data.

[0098] In some embodiments, the aforementioned step of writing the encoded preset data into the storage module includes:

[0099] Step S190, performing encryption operation on the coded preset data to obtain encrypted data;

[0100] Step S191, writing the encrypted data into the storage module.

[0101] In this embodiment, refer to Figure 4 When executing step S160, the controller will also encrypt the data. The controller also includes an encryption module. The controller controls the encryption module to perform encryption operations on the coded preset data to obtain encrypted data; and then writes the encrypted data into the storage module. Encryption operations are performed on the coded preset data to improve the security of the data.

[0102] In some embodiments, the aforementioned encryption operation on the encoded preset data includes:

[0103] According to the encryption selection instruction, the encoding preset data is classified to obtain the encoding preset data to be encrypted and the non-encrypted encoding preset data;

[0104] Perform encryption operation on the preset data to be encrypted to obtain selected encrypted data;

[0105] Keep the non-encrypted default data unchanged.

[0106] In this embodiment, when executing step S190, the controller will also selectively encrypt the data. The controller will classify the coded preset data into data that needs to be encrypted and data that does not need to be encrypted according to the encryption selection instruction, thereby obtaining the coded preset data to be encrypted and the non-encrypted coded preset data. The encryption selection instruction can be generated according to the encryption data selected by the user.

[0107] The controller performs encryption calculations on the preset data to be encrypted to obtain the selected encrypted data; and the preset data of the non-encrypted code remains unchanged. Only the data that needs to be encrypted is encrypted, and the data that does not need to be encrypted is not encrypted. Users can decide which data to encrypt according to actual needs to reduce unnecessary data encryption load while ensuring the security of sensitive data.

[0108] In some embodiments, the aforementioned step of writing the encoded preset data into the storage module further includes:

[0109] Perform a hash check operation on the encrypted data to obtain a hash value of the encrypted data;

[0110] The hash value of the encrypted data and the encrypted data are written to the storage module.

[0111] In this embodiment, when the controller executes step S160, it also performs a hash check on the data. The controller also includes a hash check module. The controller controls the hash check module to perform a hash check operation on the encrypted data to obtain a hash value of the encrypted data; and then writes the hash value of the encrypted data and the encrypted data into the storage module. The hash check module can perform an integrity check on the encrypted data to improve the accuracy of the data.

[0112] In some embodiments, the NAND FLASH includes a temperature detection module; after the controller receives the preset data, it also includes:

[0113] Get the current temperature detected by the temperature detection module;

[0114] Determine whether the current temperature is within the preset temperature range;

[0115] If the current temperature is not within the preset temperature range, controlling the third error correction module to perform error correction coding on the preset data;

[0116] If the current temperature is within the preset temperature range, a step of determining the relationship between the current erase / write times of the storage module and the preset erase / write times T1 and T2 is performed.

[0117] In this embodiment, after executing the receiving preset data in step S110, the controller will also detect the temperature. NAND FLASH includes a temperature detection module. The temperature detection module can detect the temperature in real time. The controller obtains the current temperature detected by the temperature detection module, wherein the current temperature can be the temperature of NAND FLASH or the temperature of the environment where NAND FLASH is located. After the controller obtains the current temperature, it will also judge the current temperature. Determine whether the current temperature is within the preset temperature range; wherein the preset temperature range can be set to 0-50°C. If the controller determines that the current temperature is not within the range of 0-50°C, it directly starts the third error correction module to perform error correction encoding on the preset data. Through this embodiment, the controller can ensure the accuracy of the data in extreme temperature environments.

[0118] If the controller determines that the current temperature is within the range of 0-50° C., it will execute the subsequent step of determining the relationship between the current erase and write times of the storage module and the preset erase and write times T1 and T2 to select a suitable error correction module.

[0119] In some embodiments, before receiving the preset data, the method further includes:

[0120] Step S100, receiving key data sent by the host computer;

[0121] Step S101, generating shared key data according to the key data and sending it to the host computer;

[0122] Step S102, receiving encrypted channel data fed back by the host computer according to the shared key data;

[0123] Step S103, establishing encrypted communication with the host computer according to the encrypted channel data.

[0124] In this embodiment, refer to Figure 5 , before executing step S110, the controller needs to establish encrypted communication with the host computer. The controller first receives the key data sent by the host computer; then generates shared key data based on the key data, and sends the shared key data to the host computer. The host computer generates encrypted channel data based on the shared key data, and then feeds the encrypted channel data back to the controller. The controller can establish encrypted communication with the host computer based on the encrypted channel data. Data interaction is performed only after the controller and the host computer establish encrypted communication, which can ensure the security of data during data interaction.

[0125] The present invention sets three error correction modules inside the controller, and the controller can be dynamically adjusted according to the current number of erase and write times of the storage module to use a suitable error correction module, thereby reducing the error rate of the data; the controller can select a suitable error correction module to correct the data, thereby improving the adaptability of the controller and reducing the error rate of the data; and the controller can also perform encryption operations and hash check operations on the data to ensure the security and integrity of the data; the controller can also selectively encrypt the data when performing encryption operations on the data, which can reduce the encryption load of conventional data and ensure the security of sensitive data; the controller can also ensure the accuracy of the data under extreme temperature environments.

[0126] The error correction device of the NAND FLASH controller of the embodiment of the present invention may be a controller capable of running the error correction method of the NAND FLASH controller; the controller has at least one. Figure 6 As shown, the error correction device of the NAND FLASH controller may include: a controller 1001 (e.g., a CPU), a network interface 1004, a user interface 1003, a memory 1005, and a communication bus 1002. Among them, the communication bus 1002 is used to realize the connection and communication between these components. The user interface 1003 may include a display screen (Display), an input unit, such as a keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface and a wireless interface. The network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface). The memory 1005 may be a high-speed RAM memory, or a stable memory (non-volatile memory), such as a disk memory. The memory 1005 may optionally be a storage device independent of the aforementioned controller 1001.

[0127] Those skilled in the art will understand that Figure 6 The structure of the error correction device of the NAND FLASH controller shown in the figure does not constitute a limitation on the error correction device of the NAND FLASH controller, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0128] like Figure 6 As shown, the memory 1005 as a computer storage medium may include an operating system, a network communication module, a user interface module and a computer program.

[0129] exist Figure 6In the error correction device of the NAND FLASH controller shown, the network interface 1004 is mainly used to connect to the background server and communicate data with the background server; the user interface 1003 is mainly used to connect to the client (user end) and communicate data with the client; and the controller 1001 can be used to call the computer program stored in the memory 1005. When the computer program is called and executed by the controller 1001, the steps of the error correction method of the NAND FLASH controller mentioned above are implemented.

[0130] The present invention further provides a flash memory, including a NAND FLASH and an error correction device of the NAND FLASH controller as described above.

[0131] In this embodiment, refer to Figure 7 The flash memory may include a NAND FLASH and an error correction device of a NAND FLASH controller; the controller and the storage module are both arranged inside the NAND FLASH.

[0132] Based on the computer program proposed in the above embodiment, the present invention further proposes a storage medium, which stores the computer program. When the computer program is executed by a controller, the error correction method of the NAND FLASH controller described in the above embodiment is implemented.

[0133] The present invention further provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the error correction method for a NAND FLASH controller as described in any one of the above technical solutions are implemented.

[0134] The above description is only a partial or preferred embodiment of the present invention. Neither the text nor the drawings can limit the scope of protection of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the overall concept of the present invention, or direct / indirect application in other related technical fields are included in the scope of protection of the present invention.

Claims

1. A NAND FLASH controller error correction method, characterized in that: The error correction method of the NAND FLASH controller includes: Receive preset data, and determine the relationship between the current erasure times of the storage module and preset erasure times T1 and T2, wherein T1 and T2 are determined according to the total erasure times of the storage module, and 0<T1<T2<total erasure times; If the current number of erasures is less than T1, controlling the first error correction module to perform error correction coding on the preset data to obtain first coded preset data; If the current number of erasures is greater than or equal to T1 and less than T2, controlling the second error correction module to perform error correction encoding on the preset data to obtain second encoded preset data; If the current number of erasures is greater than or equal to T2, controlling the third error correction module to perform error correction coding on the preset data to obtain third coded preset data; Obtaining encoding preset data according to the first encoding preset data, the second encoding preset data or the third encoding preset data; The encoding preset data is written into the storage module.

2. The error correction method of the NAND FLASH controller according to claim 1, characterized in that: After the encoding preset data is written into the storage module, the method further includes: Read the coded preset data of the storage module, and determine the relationship between the current erasing and writing times of the storage module and the preset erasing and writing times T1 and T2; If the current number of erasures is less than T1, controlling the first error correction module to perform error correction decoding on the encoded preset data to obtain first preset data; If the current number of erasures is greater than or equal to T1 and less than T2, the second error correction module is controlled to perform error correction decoding on the encoded preset data to obtain second preset data; If the current number of erasures is greater than or equal to T2, controlling the third error correction module to perform error correction decoding on the encoded preset data to obtain third preset data; The first preset data, the second preset data or the third preset data is compared with the preset data, and whether the error correction decoding is successful is determined according to the comparison result.

3. The error correction method of the NAND FLASH controller according to claim 2, characterized in that: The comparing the first preset data, the second preset data or the third preset data with the preset data, and determining whether the error correction decoding is successful according to the comparison result, includes: When the first preset data, the second preset data or the third preset data is inconsistent with the preset data, determining that the first error correction decoding fails; When the first error correction decoding fails, the third error correction module is controlled to perform a second error correction decoding on the encoded preset data.

4. The error correction method of the NAND FLASH controller according to claim 1, characterized in that: The step of writing the encoding preset data into the storage module comprises: Performing encryption operation on the encoded preset data to obtain encrypted data; The encrypted data is written into the storage module.

5. The error correction method of the NAND FLASH controller according to claim 4, characterized in that: The performing encryption operation on the encoded preset data comprises: According to the encryption selection instruction, the encoding preset data is classified to obtain the encoding preset data to be encrypted and the non-encrypted encoding preset data; Performing encryption operation on the preset data to be encrypted to obtain selected encrypted data; The non-encrypted encoded preset data is maintained unchanged.

6. The error correction method of the NAND FLASH controller according to claim 4, characterized in that: The step of writing the encoding preset data into the storage module further includes: Performing a hash check operation on the encrypted data to obtain a hash value of the encrypted data; The hash value of the encrypted data and the encrypted data are written into the storage module.

7. The error correction method of the NAND FLASH controller according to claim 1, characterized in that: The NAND FLASH includes a temperature detection module; After receiving the preset data, the controller further includes: Obtaining the current temperature detected by the temperature detection module; Determining whether the current temperature is within a preset temperature range; If the current temperature is not within the preset temperature range, controlling the third error correction module to perform error correction coding on the preset data; If the current temperature is within the preset temperature range, a step of determining the relationship between the current erasing and writing times of the storage module and the preset erasing and writing times T1 and T2 is performed.

8. The error correction method of the NAND FLASH controller according to claim 1, characterized in that: Before receiving the preset data, the method further includes: Receive key data sent by the host computer; Generate shared key data according to the key data, and send it to the host computer; Receiving encrypted channel data fed back by the host computer according to the shared key data; Establish encrypted communication with the host computer according to the encrypted channel data.

9. An error correction device for a NAND FLASH controller, characterized in that: include: at least one controller; as well as, a memory in communication with the at least one controller; wherein, The memory stores instructions executed by the at least one controller, and the instructions are executed by the at least one controller so that the at least one controller can execute the error correction method of the NAND FLASH controller according to any one of claims 1 to 8.

10. A flash memory, characterized in that: An error correction device comprising a NAND FLASH and a NAND FLASH controller as claimed in claim 9.

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