Design method, system and equipment of CLLLC resonant converter parameters and medium

Abstract

The invention discloses a CLLLC resonant converter parameter design method and device based on a time domain model, and a medium. The method comprises the following steps: obtaining a mission profile; obtaining engineering limitations; determining the range of each circuit parameter of the CLLLC resonant converter; the method comprises the following steps of: optimizing each circuit parameter of the CLLLC resonant converter within the range of each circuit parameter of the CLLLC resonant converter under the condition of task profile and engineering limitation by taking the lowest loss of the CLLLC resonant converter as a target to obtain the optimal circuit parameter of the CLLLC resonant converter, according to the method, the equipment and the medium, the parameters of the resonant converter can be designed with high precision and high universality.

Description

Technical Field

[0001] The invention belongs to the field of power electronic technology DC / DC converters, and relates to a CLLLC type resonant converter parameter design method, equipment and medium based on a time domain model. Background Art

[0002] In recent years, new power systems and DC microgrid systems have developed rapidly. Among them, bidirectional isolated DC-DC modules as key power conversion links have been widely studied in academia and industry. Among various DC-DC topologies, CLLLC resonant converters are widely used due to their wide soft switching range, high power density, wide voltage gain and other advantages. At the parameter design level, by combining high-precision time domain models, its working efficiency can be further improved, thereby significantly reducing equipment operating costs.

[0003] The design of CLLLC resonant converter has an important impact on its performance. Reasonable parameters can greatly improve the converter's operating efficiency while meeting the gain requirements. The traditional design process has the following three key problems: First, the traditional design usually uses the fundamental wave analysis method to model the circuit. The model has low accuracy, resulting in a high design margin in the traditional design process, making it difficult to give full play to the performance advantages of CLLLC resonant converters; Second, due to the increasing complexity of the working conditions of resonant converter applications, including constant power, constant current, constant voltage and other working conditions, simply describing the required working conditions of the converter with gain requirements is difficult to cover all situations, making the traditional design limitations unclear; Third, the existing design process usually ignores many engineering limitations in the design stage, such as the saturation of the core, the maximum current density of the Litz wire, the core window coefficient, etc., which also requires multiple rounds of experimental iterations for the design of CLLLC resonant converters, thus restricting its engineering application. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of the above-mentioned prior art and provide a CLLLC type resonant converter parameter design method, device and medium based on a time domain model. The method, device and medium can design the parameters of the resonant converter with high precision and high versatility.

[0005] In order to achieve the above object, the present invention adopts the following technical scheme:

[0006] In one aspect, the present invention provides a method for designing parameters of a CLLLC type resonant converter, comprising:

[0007] Get the mission profile;

[0008] Obtain engineering restrictions;

[0009] Determine the range of each circuit parameter of CLLLC type resonant converter;

[0010] With the goal of minimizing the loss of the CLLLC resonant converter, under the conditions of mission profile and engineering constraints, within the range of each circuit parameter of the CLLLC resonant converter, the circuit parameters of the CLLLC resonant converter are optimized to obtain the optimal circuit parameters of the CLLLC resonant converter.

[0011] The CLLLC type resonant converter parameter design method of the present invention is further improved in that:

[0012] Furthermore, the engineering limitations include the maximum current density Jmax of the Litz wire, the maximum magnetic flux density Bmax of the magnetic core, the maximum window coefficient Wmax, the primary and secondary single-tube loss limits Psw1, Psw2 and the maximum core air gap length.

[0013] Furthermore, a genetic algorithm is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, with the goal of minimizing the loss of the CLLLC-type resonant converter, to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

[0014] Furthermore, the circuit parameters include but are not limited to: resonant inductance, resonant capacitance, number of transformer turns, number of inductor turns and cross-sectional area of ​​Litz wire.

[0015] Furthermore, the process of optimizing the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter with the goal of minimizing the loss of the CLLLC-type resonant converter under the conditions of the mission profile and engineering constraints to obtain the optimal circuit parameters of the CLLLC-type resonant converter is as follows:

[0016] With the goal of minimizing the loss of the CLLLC resonant converter, a time domain model is used to determine whether the main circuit parameters meet the task profile, wherein the main circuit parameters include resonant inductance, resonant capacitance and transformer turns ratio;

[0017] The optimal other parameters under the current main circuit parameters are found through engineering constraints, and the other parameters include the number of transformer turns, the number of inductor turns and the cross-sectional area of ​​the Litz wire.

[0018] Furthermore, the time domain model is constructed based on the dynamic time domain of the state space.

[0019] In a second aspect of the present invention, the present invention provides a CLLLC type resonant converter parameter design system, comprising:

[0020] A first acquisition module is used to acquire a mission profile;

[0021] A second acquisition module is used to acquire engineering constraints;

[0022] A determination module, used to determine the range of each circuit parameter of the CLLLC type resonant converter;

[0023] The optimization module is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter with the goal of minimizing the loss of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, so as to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

[0024] The CLLLC type resonant converter parameter design system of the present invention is further improved in that:

[0025] Furthermore, a genetic algorithm is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, with the goal of minimizing the loss of the CLLLC-type resonant converter, to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

[0026] In a third aspect of the present invention, the present invention provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the CLLLC type resonant converter parameter design method when executing the computer program.

[0027] In a fourth aspect of the present invention, the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the CLLLC type resonant converter parameter design method are implemented.

[0028] The present invention has the following beneficial effects:

[0029] The CLLLC-type resonant converter parameter design method, device and medium based on the time domain model described in the present invention, during specific operation, takes the lowest loss of the CLLLC-type resonant converter as the goal, optimizes the various circuit parameters of the CLLLC-type resonant converter within the range of the various circuit parameters of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, and obtains the optimal circuit parameters of the CLLLC-type resonant converter, that is, adopts a parameter optimization method to improve the accuracy and versatility of converter parameter design.

[0030] Furthermore, the present invention adopts a genetic algorithm to perform optimization so as to speed up the optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0032] Figure 1 It is the topology diagram of CLLLC type resonant converter;

[0033] Figure 2 Flowchart for unifying the refined time domain model;

[0034] Figure 3 It is a schematic diagram of the converter working condition task profile;

[0035] Figure 4 Schematic diagram of various resonant converters of the CLLLC type;

[0036] Figure 5 It is a design flow chart of the present invention;

[0037] Figure 6a The waveform experimental result diagram of the converter designed by the present invention;

[0038] Figure 6b This is the experimental result diagram of the time domain model;

[0039] Figure 7 This is a comparison diagram of the design efficiency and loss model of the converter designed in the present invention. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] In the description of the present invention, it should be understood that the terms “include” and “comprises” indicate the presence of described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0042] It should also be understood that the terms used in the present specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the present specification and the appended claims, the singular forms "a", "an" and "the" are intended to include plural forms unless the context clearly indicates otherwise.

[0043] It should be further understood that the term "and / or" used in the present specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects are in an "or" relationship.

[0044] It should be understood that, although the terms first, second, third, etc. may be used to describe preset ranges, etc. in the embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be referred to as the second preset range, and similarly, the second preset range may also be referred to as the first preset range.

[0045] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.

[0046] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention described and shown in the drawings here can usually be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0047] Various structural schematic diagrams of the embodiments disclosed in the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs.

[0048] Embodiment 1

[0049] refer to Figure 1 The CLLLC resonant converter described in the present invention includes three parts: an inverter link, a resonant cavity and a rectifier link. Among them, the inverter link includes a full bridge, a symmetrical half bridge, an asymmetrical half bridge, and a stacked topology; the resonant cavity includes LC, CLL, LLC, CLLC, a symmetrical CLLLC, and an asymmetrical CLLLC; the rectifier link includes a full bridge, an asymmetrical half bridge, a symmetrical half bridge, and a center-tapped rectifier bridge. The unified time domain model adopted in the present invention can be applied to all topologies by simply modifying the model parameters, so it can be used as a unified model of the CLLLC resonant converter.

[0050] refer to Figure 2 The unified time domain model in the present invention adopts a dynamic time domain modeling approach based on state space, and compared with the traditional ideal time domain model, it takes into account the influence of the parasitic capacitance of the switch tube. By adding the parasitic capacitance to the equivalent circuit of the O mode and calculating its corresponding time domain expression to replace the traditional O mode expression, the high-frequency oscillation phenomenon caused by the parasitic capacitance on the output side can be characterized and reflected in the calculation results. Such a modeling process can make the parameter calculation results of the key circuit more accurate, including voltage gain, current effective value, shutdown current, current peak value, etc.

[0051] refer to Figure 3 The present invention describes the complex working conditions of the converter in the form of task profiles, including constant current, constant power and constant voltage operating conditions. Different output voltages Vo have different output power requirements. By selecting several output voltage points at equal intervals and judging whether the current circuit parameters can meet the power requirements of the working points, it can be used as an accurate judgment condition in the parameter design process, which is more universal than the traditional gain judgment condition.

[0052] refer to Figure 4 The present invention modifies the size of the circuit parameters in the time domain model. When it satisfies different expressions, different types of resonant cavities can be represented. For example, when kL=0, kC=∞, the type of resonant cavity can be changed from CLLLC to LLC.

[0053] refer to Figure 5 Specifically, the present invention comprises the following steps:

[0054] 1) Input mission profile, refer to Figure 3 , determine the target operating condition of the converter;

[0055] 2) Input engineering limitations, which include the maximum current density Jmax of the Litz wire, the maximum magnetic flux density Bmax of the core, the maximum window coefficient Wmax, the primary and secondary single-tube loss limits Psw1, Psw2, and the maximum core air gap length.

[0056] 3) Determine the device types, including switch devices, core materials, and core sizes, and establish corresponding loss models. You can iteratively optimize different device types by repeating the subsequent process starting from step 3.

[0057] 4) According to the engineering constraints and device types, the range of circuit parameters is obtained, and the range of circuit parameters includes resonant inductance, resonant capacitance, transformer turns ratio, transformer turns, inductor turns and Litz wire cross-sectional area, referring to Figure 4 .

[0058] 5) Determine whether the main circuit parameters can meet the mission profile through the time domain model, wherein the main circuit parameters include resonant inductance, resonant capacitance and transformer turns ratio.

[0059] 6) Optimize other parameters under the current main circuit parameters within engineering constraints. The other parameters include the number of transformer turns, the number of inductor turns and the cross-sectional area of ​​Litz wire. The overall optimization process uses genetic algorithm instead of traversal algorithm to speed up the optimization process.

[0060] FIG6 is an experimental current waveform diagram. Referring to FIG6 , the high-frequency oscillation of the O-mode device is depicted, and the accuracy of the time domain model is verified.

[0061] Figure 7 The loss curve of the 3.7kW bidirectional CLLC prototype based on the design process of the present invention is shown in Figure 2. Figure 7 , the forward peak efficiency can reach 97.97%, demonstrating the accuracy of the model and the efficiency of the design.

[0062] Embodiment 2

[0063] The CLLLC type resonant converter parameter design system of the present invention comprises:

[0064] A first acquisition module is used to acquire a mission profile;

[0065] A second acquisition module is used to acquire engineering constraints;

[0066] A determination module, used to determine the range of each circuit parameter of the CLLLC type resonant converter;

[0067] The optimization module is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter with the goal of minimizing the loss of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, so as to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

[0068] The CLLLC type resonant converter parameter design system of the present invention is further improved in that:

[0069] Furthermore, a genetic algorithm is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, with the goal of minimizing the loss of the CLLLC-type resonant converter, to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

[0070] The division of modules in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional module in each embodiment of the present application may be integrated into a processor, or may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0071] Embodiment 3

[0072] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the CLLLC resonant converter parameter design method are implemented, for example, including: obtaining a mission profile; obtaining engineering constraints; determining the range of each circuit parameter of the CLLLC resonant converter; taking the lowest loss of the CLLLC resonant converter as the goal, under the conditions of the mission profile and engineering constraints, within the range of each circuit parameter of the CLLLC resonant converter, optimizing each circuit parameter of the CLLLC resonant converter to obtain the optimal circuit parameters of the CLLLC resonant converter. The memory may include a memory, such as a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk memory, etc. The processor, the network interface, and the memory are interconnected through an internal bus, and the internal bus may be an industrial standard architecture bus, a peripheral component interconnection standard bus, an extended industrial standard architecture bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. The memory is used to store a program. Specifically, the program may include a program code, and the program code includes a computer operation instruction. The memory may include memory and nonvolatile memory and provides instructions and data to the processor.

[0073] Embodiment 4

[0074] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of implementing the parameter design method of the CLLLC resonant converter are, for example, including: obtaining a mission profile; obtaining engineering constraints; determining the range of each circuit parameter of the CLLLC resonant converter; with the goal of minimizing the loss of the CLLLC resonant converter, under the conditions of the mission profile and engineering constraints, within the range of each circuit parameter of the CLLLC resonant converter, optimizing each circuit parameter of the CLLLC resonant converter to obtain the optimal circuit parameters of the CLLLC resonant converter. Specifically, the computer-readable storage medium includes, but is not limited to, for example, volatile memory and / or non-volatile memory. The volatile memory may include random access memory (RAM) and / or cache memory (cache), etc. The non-volatile memory may include a read-only memory (ROM), a hard disk, a flash memory, an optical disk, a magnetic disk, etc.

[0075] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0076] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0077] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0078] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0079] Those skilled in the art will readily appreciate other embodiments of the present invention after considering the specification and disclosure of the invention. This application is intended to cover any variations, uses or adaptations of the present invention that follow the general principles of the present invention and include common knowledge or customary techniques in the art that are not disclosed by the present invention. The specification and examples are to be considered exemplary only, and the true scope and spirit of the present invention are indicated by the following claims.

[0080] It should be understood that the present invention is not limited to the exact construction that has been described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

[0081] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent structural change made to the above embodiment based on the technical essence of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A CLLLC type resonant converter parameter design method, characterized in that: include: Get the mission profile; Obtain engineering restrictions; Determine the range of each circuit parameter of CLLLC type resonant converter; With the goal of minimizing the loss of the CLLLC resonant converter, under the conditions of mission profile and engineering constraints, within the range of each circuit parameter of the CLLLC resonant converter, the circuit parameters of the CLLLC resonant converter are optimized to obtain the optimal circuit parameters of the CLLLC resonant converter.

2. The CLLLC type resonant converter parameter design method according to claim 1, characterized in that: The engineering limitations include the maximum current density Jmax of the Litz wire, the maximum magnetic flux density Bmax of the core, the maximum window coefficient Wmax, the primary and secondary single-tube loss limits Psw1, Psw2 and the maximum core air gap length.

3. The CLLLC type resonant converter parameter design method according to claim 1, characterized in that: A genetic algorithm is used to minimize the loss of the CLLLC resonant converter. Under the conditions of mission profile and engineering constraints, the circuit parameters of the CLLLC resonant converter are optimized within the range of the circuit parameters of the CLLLC resonant converter to obtain the optimal circuit parameters of the CLLLC resonant converter.

4. The CLLLC type resonant converter parameter design method according to claim 1, characterized in that: The circuit parameters include but are not limited to: resonant inductance, resonant capacitance, number of transformer turns, number of inductor turns and cross-sectional area of ​​Litz wire.

5. The CLLLC type resonant converter parameter design method according to claim 4, characterized in that: The process of optimizing the circuit parameters of the CLLLC resonant converter within the range of the circuit parameters of the CLLLC resonant converter with the goal of minimizing the loss of the CLLLC resonant converter under the conditions of mission profile and engineering restrictions to obtain the optimal circuit parameters of the CLLLC resonant converter is as follows: With the goal of minimizing the loss of the CLLLC resonant converter, a time domain model is used to determine whether the main circuit parameters meet the task profile, wherein the main circuit parameters include resonant inductance, resonant capacitance and transformer turns ratio; The optimal other parameters under the current main circuit parameters are found through engineering constraints, and the other parameters include the number of transformer turns, the number of inductor turns and the cross-sectional area of ​​the Litz wire.

6. The CLLLC type resonant converter parameter design method according to claim 1, characterized in that: The time domain model is constructed based on the dynamic time domain of the state space.

7. A CLLLC type resonant converter parameter design system, characterized in that: include: A first acquisition module is used to acquire a mission profile; A second acquisition module is used to acquire engineering constraints; A determination module, used to determine the range of each circuit parameter of the CLLLC type resonant converter; The optimization module is used to optimize the circuit parameters of the CLLLC-type resonant converter within the range of the circuit parameters of the CLLLC-type resonant converter with the goal of minimizing the loss of the CLLLC-type resonant converter under the conditions of mission profile and engineering constraints, so as to obtain the optimal circuit parameters of the CLLLC-type resonant converter.

8. The CLLLC type resonant converter parameter design system according to claim 7, characterized in that: A genetic algorithm is used to minimize the loss of the CLLLC resonant converter. Under the conditions of mission profile and engineering constraints, the circuit parameters of the CLLLC resonant converter are optimized within the range of the circuit parameters of the CLLLC resonant converter to obtain the optimal circuit parameters of the CLLLC resonant converter.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the CLLLC type resonant converter parameter design method as described in any one of claims 1-7 are implemented.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the CLLLC type resonant converter parameter design method as described in any one of claims 1 to 7 are implemented.

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