High-reliability SIC-MOSFET terminal structure

By adopting FinFET structure and dual-trench design in SiC-MOSFET terminals and combining multi-layer oxide structures, the breakdown problem of SiC-MOSFET under high voltage and high current conditions is solved, and the reliability and performance of the device are significantly improved. , achieving higher integration and performance density.

CN222190737UActive Publication Date: 2024-12-17深圳佳恩功率半导体有限公司
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Patent Information

Application Number
CN202420853581.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-23
Publication Date
2024-12-17
Estimated Expiration
2034-04-23

AI Technical Summary

Technical Problem

SiC-MOSFET terminals are easily broken down under high voltage and high current conditions, resulting in damage or short circuit of the device, affecting the normal operation of the system.

Method used

Using FinFET structure, by setting trenches and gratings between the source and drains, a double-trench structure is formed, combining asymmetric trench design and multi-layer oxide structure, optimize electric field distribution and current control, and improve breakdown voltage and reliability.

Benefits of technology

Significantly reduce leakage current, improve switching speed and performance, enhance device reliability and stability, reduce power consumption and total on-resistance, improve on-efficiency and integration, and enhance device high-voltage application capabilities.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a high-reliability SIC-MOSFET terminal structure, belonging to the technical field of semiconductor devices, the high-reliability SIC-MOSFET terminal structure comprises a source electrode and a drain electrode, the source electrode is the input end of an MOSFET and is used for current in a circuit to enter, and the drain electrode is the output end of the MOSFET and is used for exporting current; a groove and a grating are arranged between the source electrode and the drain electrode, the structure among the source electrode, the drain electrode, the groove and the grating is a FinFET structure, the source electrode and the drain electrode are fixedly connected through the middle groove and the grating, the groove is fixedly connected with the grating, the groove comprises a first groove and a second groove, and the first groove and the second groove are communicated with each other. The first groove is fixedly connected with the source electrode. The problem that an existing SIC-MOSFET0 is prone to being broken down under the conditions of high voltage and high current can be solved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductor devices, and in particular relates to a high-reliability SIC-MOSFET terminal structure. Background Art

[0002] SiC-MOSFET terminal refers to the end or application end of a metal oxide semiconductor field effect transistor (MOSFET) made of silicon carbide (SiC) material. SiC-MOSFET is an advanced power electronic device with many excellent characteristics, so it is widely used in many fields. With the continuous development of industrial automation and intelligent manufacturing technology, the demand for high-performance and high-reliability power electronic devices continues to increase. The high-frequency, high-power and high-temperature characteristics of SiC-MOSFET terminals make them play a key role in driving and controlling industrial equipment, robots and automated production lines, improving production efficiency and manufacturing quality.

[0003] Although SiC-MOSFET terminals have many advantages in the field of power electronics, there are also some problems. One of the main problems is that they are prone to breakdown. SiC-MOSFET is prone to breakdown under high voltage, high current or pressure conditions, which may cause the device to short circuit or damage. When SiC-MOSFET is broken down, it will cause device damage or failure. Breakdown will cause a sudden increase in current, which may cause device overheating, permanent damage or even short circuit. SiC-MOSFET is a key component of many power electronic systems, such as inverters, frequency converters, etc. If SiC-MOSFET is broken down, it may cause failure of the entire system, thus affecting the normal operation of the equipment.

[0004] In summary, the existing SIC-MOSFET0 is easily broken down under the conditions of high voltage and high current. Utility Model Content

[0005] In view of this, the utility model provides a high-reliability SIC-MOSFET terminal structure, which can solve the problem that the existing SIC-MOSFET0 is easily broken down under high voltage and high current conditions.

[0006] The utility model is achieved in this way:

[0007] The utility model provides a high-reliability SIC-MOSFET terminal structure, comprising a source and a drain, wherein the source is the input end of the MOSFET and is used for current in the circuit to enter, and the drain is the output end of the MOSFET and is used for deriving the current; wherein a groove and a grating are arranged between the source and the drain, and the structure between the source, the drain, the groove and the grating is a FinFET structure, the source and the drain are fixedly connected through the groove and the grating in the middle, and the groove is fixedly connected to the grating.

[0008] The technical effect of a high-reliability SIC-MOSFET terminal structure provided by the utility model is as follows: the source electrode is usually the area where current is injected in the silicon carbide MOSFET and is connected to the power supply. The drain electrode is usually the area where current is output in the SiC-MOSFET and is connected to the load. The drain electrode collects electrons or electron holes injected into the channel from the source electrode and outputs them to the external circuit. The FinFET structure can significantly reduce the leakage current of the SiC-MOSFET by controlling the three-dimensional "fin-shaped" structure around the grating. The FinFET structure can achieve better insulation in the off state, thereby reducing power consumption. The FinFET structure can improve the switching speed and performance of the SiC-MOSFET, and can achieve higher performance at the same power consumption. The FinFET structure can maintain stable performance in a small size, thereby achieving higher integration and performance density. By setting the groove, the electric field distribution in the gate area can be more effectively controlled by the double-groove structure, which helps to improve the conduction performance and switching speed of the SiC-MOSFET. This structure allows faster carrier transmission, thereby improving the performance of the device. The double-groove structure helps to reduce the on-resistance. By optimizing the design of the groove, a lower channel resistance can be achieved, thereby reducing the total on-resistance of the device and improving the conduction efficiency. The dual trench design allows for better control of the electric field distribution, thereby enhancing the device's breakdown voltage. This is particularly important in high voltage applications, as enhanced breakdown voltage means greater reliability and safety. SiC itself has good thermal conductivity, and the dual trench structure provides a larger surface area to help dissipate heat. This can improve the performance and reliability of SiC-MOSFETs in high power applications.

[0009] On the basis of the above technical solution, a high-reliability SIC-MOSFET terminal structure of the utility model can also be improved as follows:

[0010] The groove includes a first groove and a second groove, the first groove is fixedly connected to the source, the second groove is fixedly connected to the drain, and the first groove is fixedly connected to the second groove.

[0011] The beneficial effects of adopting the above-mentioned improvement scheme are as follows: the dual trench design helps to optimize the shutdown characteristics of the device, reduce leakage current, and thus reduce power consumption in the shutdown state. This has a positive impact on energy efficiency and the overall reliability of the device.

[0012] Furthermore, the first groove and the second groove are asymmetrically designed, and the depth of the second groove is not equal to the depth of the first groove.

[0013] The beneficial effects of adopting the above-mentioned improvement scheme are as follows: grooves of different depths can adjust the electric field distribution in the groove area. By making one of the grooves deeper, the electric field can be concentrated and the local electric field effect can be enhanced, thereby improving the switching speed and performance of the device. Grooves of different depths can affect the way and position of channel formation. This can adjust the channel resistance and carrier injection efficiency to a certain extent, and optimize the conduction characteristics and performance of the device. By introducing deep doping in an area with a deeper groove, the leakage current can be reduced and the turn-off characteristics of the device can be improved. This helps to reduce power consumption and improve the energy efficiency of the device. By adjusting the depth of the groove, the electric field distribution in the groove area can be optimized, thereby enhancing the breakdown voltage of the device. This helps to improve the reliability and stability of the device, especially in high-voltage applications.

[0014] Furthermore, the grating includes a first control gate and a second control gate, the first control gate is fixedly connected to the source and the first trench, and the second control gate is fixedly connected to the drain and the second trench.

[0015] Furthermore, the edge of the source electrode is wrapped with a source oxide layer, the source oxide layer is fixedly connected to the source electrode, the edge of the drain electrode is wrapped with a drain oxide layer, the drain oxide layer is fixedly connected to the drain electrode, and the source oxide layer and the drain oxide layer are both polycrystalline oxides.

[0016] The beneficial effects of adopting the above-mentioned improvement scheme are as follows: by setting a source oxide layer, an oxide layer can be formed between the source region and the grating, which plays the role of electron isolation. This helps to reduce the current leakage between the source region and the grating and improve the insulation performance of the device. The source oxide layer can adjust the electric field distribution between the source region and the grating, thereby affecting the electron injection and conduction characteristics. This helps to optimize the switching speed and performance of the device. The source oxide layer can prevent leakage current between the source region and the grating, especially in the off state. This helps to reduce the static power consumption of the device and improve the energy efficiency of the device. The drain oxide layer can isolate the current between the drain and other regions, thereby reducing or preventing the occurrence of leakage current. This helps to reduce the static power consumption of the device and improve the energy efficiency of the device. The drain oxide layer can improve the insulation performance of the device and prevent the loss of leakage current. This is particularly important for high-voltage devices, which can enhance the withstand voltage characteristics of the device and improve the reliability of the device.

[0017] Furthermore, the first control gate and the second control gate are wrapped with a grating oxide layer on the outside, the grating oxide layer is fixedly connected to the first control gate and the second control gate, and the grating oxide layer is a high dielectric constant oxide.

[0018] The beneficial effects of adopting the above-mentioned improvement scheme are as follows: the high-quality grating oxide layer can effectively reduce the occurrence of leakage current. This helps to improve the energy efficiency of the device and reduce power consumption, especially in the off state. The grating oxide layer can protect the channel from excessive changes or instability of the grating voltage. This helps to improve the reliability and stability of the device.

[0019] Furthermore, the dielectric constant of the grating oxide layer wrapped around the outer side of the first control gate is different from the dielectric constant of the grating oxide layer wrapped around the outer side of the second control gate.

[0020] Furthermore, the structures of the source, drain, groove and grating are all nanowire structures, and the source and drain are made of silicon carbide.

[0021] Furthermore, the first trench is made of silicon nitride, and the second trench is made of silicon dioxide.

[0022] Furthermore, a plurality of contact holes are provided between the first trench and the second trench, and metal fillings are provided in the contact holes.

[0023] The beneficial effects of adopting the above-mentioned improvement scheme are as follows: metal filling can provide a lower resistance path, thereby reducing the resistance between the grooves. This helps to reduce energy loss and signal transmission delay, and improve the performance and power efficiency of the device. Metal filling can increase the thermal conductivity path on the surface of the device, which helps to more effectively conduct and dissipate the heat generated by the device. This can reduce the operating temperature of the device and improve the reliability and stability of the device. Metal filling can reduce the transmission loss and distortion of the signal in the device, thereby improving the integrity and reliability of the signal. This is particularly important for high-speed, high-frequency and high-precision applications.

[0024] Compared with the prior art, the utility model provides a high-reliability SIC-MOSFET terminal structure with the following beneficial effects: the source is usually the area where current is injected in the silicon carbide MOSFET, connected to the power supply, the drain is usually the area where current is output in the SiC-MOSFET, connected to the load, and the drain collects electrons or electron holes injected into the channel from the source and outputs them to the external circuit. The FinFET structure can significantly reduce the leakage current of the SiC-MOSFET by controlling the three-dimensional "fin-shaped" structure around the grating. The FinFET structure can achieve better insulation in the off state, thereby reducing power consumption. The FinFET structure can improve the switching speed and performance of the SiC-MOSFET, and can achieve higher performance at the same power consumption. The FinFET structure can maintain stable performance in a small size, thereby achieving higher integration and performance density. By setting the groove, the electric field distribution in the gate area can be more effectively controlled through the double-groove structure, which helps to improve the conduction performance and switching speed of the SiC-MOSFET. This structure allows faster carrier transmission, thereby improving the performance of the device. The double-groove structure helps to reduce the on-resistance. By optimizing the design of the trench, lower channel resistance can be achieved, thereby reducing the total on-resistance of the device and improving conduction efficiency. The dual trench design can better control the electric field distribution, thereby enhancing the breakdown voltage of the device. This is particularly important in high-voltage applications because the enhanced breakdown voltage means higher reliability and safety. SiC itself has good thermal conductivity, and the dual trench structure provides a larger surface area to help dissipate heat. This can improve the performance and reliability of SiC-MOSFET in high-power applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments of the utility model will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 It is a structural schematic diagram of a high-reliability SIC-MOSFET terminal structure;

[0027] In the accompanying drawings, the components represented by the reference numerals are listed as follows:

[0028] 10. Source; 11. Drain; 12. Groove; 121. First groove; 122. Second groove; 13. Grating; 131. First control gate; 132. Second control gate; 14. Source oxide layer; 15. Drain oxide layer; 16. Grating oxide layer. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the implementation mode of the present invention clearer, the technical solution in the implementation mode of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the implementation mode of the present invention.

[0030] like Figure 1 As shown, it is an embodiment of a high-reliability SIC-MOSFET terminal structure provided by the utility model. In this embodiment, it includes a source 10 and a drain 11. The source 10 is the input end of the MOSFET, used for supplying current in the circuit, and the drain 11 is the output end of the MOSFET, used for extracting current; wherein, a groove 12 and a grating 13 are provided between the source 10 and the drain 11, and the structure between the source 10, the drain 11, the groove 12 and the grating 13 is a FinFET structure, and the source 10 and the drain 11 are fixedly connected through the middle groove 12 and the grating 13, and the groove 12 and the grating 13 are fixedly connected.

[0031] The electronic controller regulates the conduction and shutdown of the SiC-MOSFET by controlling the voltage of the FinFET. The FinFET structure provides better current control and smaller leakage current, which optimizes the performance of the SiC-MOSFET in high power, high frequency and high temperature environments. When the appropriate gate 13 voltage is applied, the electric field formed between the first control gate 131 of the FinFET and the source can accurately control the conduction state of the SiC-MOSFET, thereby achieving precise regulation of the current and switching operation.

[0032] Among them, in the above technical solution, the groove 12 includes a first groove 121 and a second groove 122 , the first groove 121 is fixedly connected to the source 10 , the second groove 122 is fixedly connected to the drain 11 , and the first groove 121 is fixedly connected to the second groove 122 .

[0033] Furthermore, in the above technical solution, the first groove 121 and the second groove 122 are asymmetrically designed, and the depth of the second groove 122 is not equal to the depth of the first groove 121 .

[0034] Furthermore, in the above technical solution, the grating 13 includes a first control gate 131 and a second control gate 132 , the first control gate 131 is fixedly connected to the source 10 and the first trench 121 , and the second control gate 132 is fixedly connected to the drain 11 and the second trench 122 .

[0035] Furthermore, in the above technical solution, the edge of the source 10 is wrapped with a source oxide layer 14, and the source oxide layer 14 is fixedly connected to the source 10. The edge of the drain 11 is wrapped with a drain oxide layer 15, and the drain oxide layer 15 is fixedly connected to the drain 11. The source oxide layer 14 and the drain oxide layer 15 are both polycrystalline oxides.

[0036] Furthermore, in the above technical solution, the first control gate 131 and the second control gate 132 are wrapped with a grating oxide layer 16 , the grating oxide layer 16 is fixedly connected to the first control gate 131 and the second control gate 132 , and the grating oxide layer 16 is a high dielectric constant oxide.

[0037] Furthermore, in the above technical solution, the dielectric constants of the grating oxide layer 16 wrapped around the outside of the first control gate 131 and the grating oxide layer 16 wrapped around the outside of the second control gate 132 are different.

[0038] Furthermore, in the above technical solution, the structures of the source 10, the drain 11, the groove 12 and the grating 13 are all nanowire structures, and the source 10 and the drain 11 are made of silicon carbide.

[0039] Furthermore, in the above technical solution, the first trench 121 is made of silicon nitride, and the second trench 122 is made of silicon dioxide.

[0040] Furthermore, in the above technical solution, a plurality of contact holes are provided between the first trench 121 and the second trench 122 , and metal fillers are provided in the contact holes.

[0041] Specifically, the principle of the utility model is: the electronic controller adjusts the conduction and shutdown of the SiC-MOSFET by controlling the voltage of the FinFET. The FinFET structure provides better current control and smaller leakage current, so that the performance of the SiC-MOSFET in high power, high frequency and high temperature environments is optimized. When the appropriate grating 13 voltage is applied, the electric field formed between the first control gate 131 of the FinFET and the source can accurately control the conductive state of the SiC-MOSFET, thereby achieving precise regulation of the current and switching operation.

Claims

1. A high-reliability SIC-MOSFET terminal structure, comprising a source electrode (10) and a drain electrode (11), wherein the source electrode (10) is an input terminal of the MOSFET, used for supplying current in a circuit, and the drain electrode (11) is an output terminal of the MOSFET, used for deriving current; characterized in that: A groove (12) and a grating (13) are provided between the source (10) and the drain (11); the structure between the source (10), the drain (11), the groove (12) and the grating (13) is a FinFET structure; the source (10) and the drain (11) are fixedly connected via the groove (12) and the grating (13) in the middle; and the groove (12) and the grating (13) are fixedly connected.

2. A high reliability SIC-MOSFET terminal structure according to claim 1, characterized in that: The groove (12) comprises a first groove (121) and a second groove (122), the first groove (121) is fixedly connected to the source (10), the second groove (122) is fixedly connected to the drain (11), and the first groove (121) is fixedly connected to the second groove (122).

3. A high reliability SIC-MOSFET terminal structure according to claim 2, characterized in that: The first groove (121) and the second groove (122) are asymmetrically designed, and the depth of the second groove (122) is not equal to the depth of the first groove (121).

4. A high reliability SIC-MOSFET terminal structure according to claim 3, characterized in that: The grating (13) comprises a first control gate (131) and a second control gate (132), wherein the first control gate (131) is fixedly connected to the source (10) and the first groove (121), and the second control gate (132) is fixedly connected to the drain (11) and the second groove (122).

5. A high reliability SIC-MOSFET terminal structure according to claim 4, characterized in that: The edge of the source electrode (10) is wrapped with a source oxide layer (14), and the source oxide layer (14) is fixedly connected to the source electrode (10); the edge of the drain electrode (11) is provided with a drain oxide layer (15), and the drain oxide layer (15) is fixedly connected to the drain electrode (11); the source oxide layer (14) and the drain oxide layer (15) are both polycrystalline oxides.

6. A high reliability SIC-MOSFET terminal structure according to claim 5, characterized in that: The first control gate (131) and the second control gate (132) are wrapped with a grating oxide layer (16) on their outer sides, the grating oxide layer (16) is fixedly connected to the first control gate (131) and the second control gate (132), and the grating oxide layer (16) is a high dielectric constant oxide.

7. A high reliability SIC-MOSFET terminal structure according to claim 6, characterized in that: The dielectric constant of the grating oxide layer (16) wrapped around the outside of the first control gate (131) is different from that of the grating oxide layer (16) wrapped around the outside of the second control gate (132).

8. A high reliability SIC-MOSFET terminal structure according to claim 7, characterized in that: The structures of the source electrode (10), the drain electrode (11), the groove (12) and the grating (13) are all nanowire structures, and the source electrode (10) and the drain electrode (11) are made of silicon carbide.

9. A high reliability SIC-MOSFET terminal structure according to claim 8, characterized in that: The first trench (121) is made of silicon nitride, and the second trench (122) is made of silicon dioxide.

10. A high reliability SIC-MOSFET terminal structure according to claim 9, characterized in that: A plurality of contact holes are arranged between the first trench (121) and the second trench (122), and metal fillings are arranged in the contact holes.

Citation Information

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