Storage unit and processing system
A storage unit and sub-unit technology, applied in the direction of memory address/allocation/relocation, input/output to record carrier, etc., can solve problems such as limiting the application of processing systems, unable to meet the control requirements of processing systems, and limited data storage capacity
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2017-02-22
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The invention relates to memory technology in the field of hardware, in particular to a storage unit and a processing system. Background technique
[0002] With the development of electronic technology, the application of automation is becoming more and more extensive. Generally, the realization of automation is inseparable from the processing system, and the processing system is usually composed of a processor, a memory (Memory), instruments and meters, and a human-computer interaction interface.
[0003] In the existing technology, in order to reduce human capital, automation equipment is becoming larger and larger, and the control of large-scale automation equipment involves the storage and reading of massive data. Therefore, in order to meet the control requirements of the processing system, the memory data in the processing system must be increased. storage. In practical applications, it is usually possible to increase the data storage capacity b...
Examples
Embodiment Construction
[0047] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention.
[0048] An embodiment of the present invention provides a storage unit, which includes at least one single-bit storage structure 101, such as figure 1 shown.
[0049] Each of the single-bit storage structures 101 includes four random access memories (Random-AccessMemory, RAM), respectively the first RAM1011, the second RAM1012, the third RAM1013 and the fourth RAM1014; two readout ports, respectively The first read port 101i and the second read port 101j; the two write ports are respectively the first write port 101p and the second write port 101q.
[0050] Wherein, the first readout port 101i is respectively connected to the first RAM1011 and the second RAM1012 for reading data stored in the first RAM1011 and the second RAM1012; The output ports 101j are respectively connect...