Cash box control device and method

Abstract

The present application provides a money box control device and method, wherein an ARM control unit is communicatively connected to an FPGA control unit; the ARM control unit is communicatively connected to a control signal connection terminal of a stepper motor, and the FPGA control unit is communicatively connected to a pulse signal connection terminal of the stepper motor; the FPGA control unit is communicatively connected to a control signal connection terminal of a DC motor, and the ARM control unit is communicatively connected to an enable signal connection terminal of a DC motor. The technical solution of the present application is a more stable and practical money box control device, which has the advantages of strong portability, low cost, and strong anti-interference ability. Therefore, the money box control device provided by the present application has good application prospects in the financial field.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a banknote box control device and method. Background Art

[0002] A cash teller machine, also known as an automated teller machine (ATM), is a small machine set up by banks in different locations. The ATM uses a magnetic tape on a credit card-sized plastic card to record the customer's basic account information (usually a bank card), allowing customers to use the machine to perform bank counter services such as withdrawals, deposits, and transfers.

[0003] Cash box control is a critical technology for ATM equipment, especially low-cost, anti-interference cash box control technology, which is particularly important. Summary of the invention

[0004] The present application provides a cash box control device and method, which can be used for cash box control of an ATM device.

[0005] The first aspect of the present invention is to provide a banknote box control device, comprising an ARM control unit, an FPGA control unit, and a banknote box driving unit, wherein the banknote box driving unit comprises a stepping motor for driving a banknote pushing plate and a DC motor for driving a rotating banknote twisting wheel;

[0006] The ARM control unit is communicatively connected with the FPGA control unit; the ARM control unit is communicatively connected with the control signal connection terminal of the stepper motor, and the FPGA control unit is communicatively connected with the pulse signal connection terminal of the stepper motor; the FPGA control unit is communicatively connected with the control signal connection terminal of the DC motor, and the ARM control unit is communicatively connected with the enable signal connection terminal of the DC motor.

[0007] In a preferred embodiment, the stepper motor is controlled by a SLA7078 chip, and the ARM control unit is connected to the input pin of the SLA7078 chip.

[0008] In a preferred embodiment, the DC motor is controlled by an H-bridge circuit, and the FPGA control unit is connected to the input pin of the H-bridge circuit.

[0009] In a preferred embodiment, the cash box control device further includes a power supply unit, which includes a voltage conversion chip, and an output end of the voltage conversion chip is electrically connected to the ARM control unit, the FPGA control unit, and the cash box drive unit.

[0010] Wherein, the power supply unit includes a main power supply or a power connection terminal, and the main power supply or the power connection terminal is electrically connected to the input pin of the voltage conversion chip.

[0011] More preferably, the total power supply is a 24V switching power supply.

[0012] More preferably, the voltage conversion chip converts the voltage into 3V and / or 5V.

[0013] In a preferred embodiment, the ARM control unit is connected to the FPGA control unit via a data line and an address line, wherein preferably, the address line for communication between the ARM control unit and the FPGA control unit is 8 bits, and the data line between the ARM control unit and the FPGA control unit is 16 bits.

[0014] In a preferred embodiment, the ARM control unit writes the command to be executed by the FPGA control unit into the RAM core of the FPGA control unit every 100 us.

[0015] In a preferred embodiment, the ARM control unit notifies the FPGA control unit to read data in the form of a rising edge of the IO port.

[0016] In a preferred embodiment, the banknote box control device further includes a sensor unit for detecting banknotes, and the sensor unit is communicatively connected to the ARM control unit.

[0017] The sensor unit may be a U-shaped sensor, a through-beam sensor, or a combination of the two.

[0018] The sensor performs AD sampling at a time interval, such as performing AD sampling at a time interval of 10-500 us, more preferably performing AD sampling at a time interval of 50-300 us, and even more preferably performing AD sampling at a time interval of 100-200 us.

[0019] A second aspect of the present invention is to provide a banknote box control method, comprising:

[0020] The ARM control unit sends a DC motor working signal to the FPGA control unit, and the FPGA control unit controls the DC motor to work, and the DC motor drives the rotating banknote twisting wheel to work, and sends the banknotes into the banknote box;

[0021] When the sensor detects that it is covered or blocked by a banknote, the ARM control unit sends a stepper motor working signal to the FPGA control unit, and the FPGA control unit controls the stepper motor to work and push the banknote plate until the sensor is no longer covered or blocked by the banknote. The ARM control unit notifies the FPGA control unit to control the stepper motor to stop working;

[0022] When the banknotes are deposited into the cash box or the cash box is full, the ARM control unit notifies the FPGA control unit to stop working.

[0023] In a preferred embodiment, the ARM control unit sends the DC motor working signal to the FPGA control unit at a time interval. For example, the command to be executed by the FPGA control unit is written into the RAM core of the FPGA control unit every 100 us.

[0024] In a preferred embodiment, the ARM control unit writes a command at a first address to notify the FPGA control unit to control the operation of the DC motor; the ARM control unit writes a command at a second address to notify the FPGA control unit to control the operation of the stepper motor.

[0025] The technical solution of the present application is a more stable and practical cash box control device, which has the advantages of strong portability, low cost, and strong anti-interference ability. Therefore, the cash box control device provided by the present application has good application prospects in the financial field. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of the structure of the banknote box control device of the present invention. DETAILED DESCRIPTION

[0027] Reference Figure 1 The banknote box control device provided by the present invention comprises an ARM control unit 1 and an FPGA control unit 2. The ARM control unit 1 and the FPGA control unit 2 are connected via an 8-bit address line and a 16-bit data line.

[0028] The banknote box driving unit 3 includes a stepper motor 4 for driving the banknote pusher plate and a DC motor 5 for driving the banknote twisting wheel; the ARM control unit 1 is connected to the control signal line of the stepper motor 4 and the enable signal line of the DC motor 5. The FPGA control unit 2 is connected to the pulse signal line of the stepper motor 4 and the control signal line of the DC motor 5.

[0029] The power supply unit 7 includes a 24V total power supply, which is converted into 3V and 5V voltages by a voltage converter to supply power to the ARM control unit 1, the FPGA control unit 2, and the banknote box drive unit 3 respectively.

[0030] The ARM control unit 1 communicates with the FPGA control unit 2, writes the command to be executed by the FPGA control unit 2 into the RAM core of the FPGA control unit 2, and the ARM control unit 1 notifies the FPGA control unit 2 to read the data in the form of a rising edge of the IO port. At this time, the FPGA control unit 2 reads the command written by the ARM control unit 1 from the RAM core. Taking banknote deposit as an example, the working method of the banknote box control device is as follows:

[0031] ARM control unit 1 sends a DC motor working signal to FPGA control unit 2. For example, "1, 1, 250" is written to addresses 0x04 to 0x06 respectively, which means that ARM control unit 1 notifies FPGA control unit 2 to let DC motor 5 rotate clockwise at a frequency of 4kHz. FPGA control unit 2 controls DC motor 5 to work, and DC motor 5 rotates the banknote twisting wheel to work and send banknotes into the banknote box.

[0032] The banknote box is provided with a claw for monitoring banknotes, and a sensor unit 6 is provided on the claw. When the sensor unit 6 finds that the claw is covered or blocked by a banknote, the ARM control unit 1 sends a working signal of the stepper motor 4 to the FPGA control unit 2, and the FPGA control unit 2 controls the stepper motor 4 to work and push the banknote plate. For example, the ARM control unit 1 writes "1, 0, 200" in addresses 0x06 to 0x08 respectively, which means that the ARM control unit 1 notifies the FPGA control unit 2 to let the stepper motor 4 rotate counterclockwise at a speed of 1.6ms per step, and continuously pushes the banknote plate down until the sensor unit 6 is no longer covered or blocked by the banknote. The ARM control unit 1 writes 0 in address 0x04 to notify the FPGA control unit 2 to control the stepper motor 4 to stop working;

[0033] When the banknotes are stored in the banknote box or the banknote box is full, the ARM control unit writes 0 in both addresses 0x04 and 0x06 to notify the FPGA control unit 2 to control the DC motor 5 to stop working.

[0034] The specific embodiments of the present invention are described in detail above, but they are only examples, and the present invention is not limited to the specific embodiments described above. For those skilled in the art, any equivalent modifications and substitutions made to the present invention are also within the scope of the present invention. Therefore, the equalization changes and modifications made without departing from the spirit and scope of the present invention should be included in the scope of the present invention.

Claims

1. A banknote box control device, characterized in that: It includes an ARM control unit, an FPGA control unit, and a banknote box driving unit, wherein the banknote box driving unit includes a stepper motor driving a banknote push plate and a DC motor driving a rotating banknote twisting wheel; the ARM control unit is communicatively connected to the FPGA control unit; the ARM control unit is communicatively connected to the control signal connection end of the stepper motor, and the FPGA control unit is communicatively connected to the pulse signal connection end of the stepper motor; the FPGA control unit is communicatively connected to the control signal connection end of the DC motor, and the ARM control unit is communicatively connected to the enable signal connection end of the DC motor; the ARM control unit is communicatively connected to the FPGA control unit via a data line and an address line; The banknote box control device also includes a sensor unit for detecting banknotes, and the sensor unit is communicatively connected with the ARM control unit.

2. The cash box control device according to claim 1, characterized in that: The address line for communication between the ARM control unit and the FPGA control unit is 8 bits, and the data line between the ARM control unit and the FPGA control unit is 16 bits.

3. The cash box control device according to claim 1, characterized in that: The stepper motor is controlled by a SLA7078 chip, and the ARM control unit is connected to the input pin of the SLA7078 chip.

4. The cash box control device according to claim 1, characterized in that: The DC motor is controlled by an H-bridge circuit, and the FPGA control unit is connected to the input pin of the H-bridge circuit.

5. The cash box control device according to claim 1, characterized in that: The banknote box control device further comprises a power supply unit, wherein the power supply unit comprises a voltage conversion chip, and an output end of the voltage conversion chip is electrically connected to the ARM control unit, the FPGA control unit, and the banknote box driving unit.

6. The cash box control device according to claim 1, characterized in that: The sensor unit is a U-shaped sensor, or a through-beam sensor, or a combination of the two.

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