Lattice-mismatched five-junction solar cell and preparation method thereof

Abstract

The invention discloses a lattice-mismatched five-junction solar cell and a preparation method thereof. A GaInP nucleation layer, a GaInAs buffer layer, an AlGaInAs DBR reflective layer, an AlGaInAs lattice gradient buffer layer, a first GaInAs subcell, a second GaInAs subcell, a first GaInP subcell, a second GaInP subcell and a GaInAs cap layer are sequentially arranged on a Ge substrate. The GaInP nucleation layer, the GaInAs buffer layer, the AlGaInAs DBR reflective layer are lattice-matched with the Ge substrate. The epitaxial layers of the first GaInAs subcell, the second GaInAs subcell, the first GaInP subcell and the second GaInP subcell are lattice-mismatched with the Ge substrate, and the epitaxial layers are lattice-matched with the Ge substrate. The present invention can effectively improve the subcell carrier collection efficiency and the cell filling factor, thereby improving the photoelectric conversion efficiency of the five-junction solar cell. Compared with most five-junction cells, the structure does not need to grow a high-quality GaInNAs epitaxial layer with harsh growth conditions, and the difficulty of product development and the cost of large-scale growth are greatly reduced.

Description

Technical Field

[0001] The invention relates to the technical field of solar photovoltaic power generation, and in particular to a lattice-mismatched five-junction solar cell and a preparation method thereof. Background Art

[0002] From the perspective of the development of photovoltaic power generation technology, solar cells can be roughly divided into three categories: first-generation crystalline silicon solar cells, second-generation thin-film solar cells, and third-generation gallium arsenide multi-junction solar cells. At present, gallium arsenide multi-junction solar cells are widely used in space power systems because their conversion efficiency is significantly higher than that of crystalline silicon cells. The mainstream structure of traditional gallium arsenide multi-junction cells is a GaInP / GaInAs / Ge triple-junction solar cell composed of GaInP, GaInAs and Ge sub-cells. The overall cell structure maintains lattice matching, and the band gap combination is 1.85 / 1.40 / 0.67eV.

[0003] However, for the solar spectrum, the spectrum division of this multi-junction cell is far from optimal. Due to the large band gap between the GaInAs sub-cell and the Ge sub-cell, the short-circuit current of the Ge bottom cell under this structure can be close to twice that of the middle cell and the top cell. Due to the current limitation of the series structure, this structure causes a large part of the solar energy to not be fully converted and utilized, limiting the improvement of cell performance.

[0004] In order to achieve higher conversion efficiency, people have designed lattice-matched four-junction and five-junction solar cells. Although their theoretical efficiency has been improved to a certain extent, the development of such five-junction solar cells faces a series of huge challenges, such as the high-quality growth of GaInNAs sub-cells. Under the current technical accumulation and equipment conditions, it is difficult to achieve high-quality growth of GaInNAs materials, which also makes the actual progress of this technical route far less than expected.

[0005] However, at the same time, with the increasing maturity of epitaxial growth technology and the continuous improvement of equipment, the growth of lattice mismatched cells has made great progress. By introducing a lattice gradient GB buffer layer, the crystal quality of lattice mismatched materials grown on Ge substrates has been greatly improved. The improvement of technology allows the In component content of GaInAs materials to be increased while still maintaining a high crystal growth quality. Combined with our company's experience in new product development, the bottleneck problem of battery performance improvement caused by the bottom battery's rich light in new structure products has been greatly improved.

[0006] According to relevant literature reports, multi-junction cells made by connecting multiple junctions of the same material in series can effectively improve the fill factor of the cell, thereby effectively improving the overall conversion efficiency of the cell. In combination with our company's experience in developing related products, the present invention proposes this lattice-mismatched five-junction cell structure. Compared with the lattice-matched five-junction cell, the difficulty of developing this structure cell is greatly reduced. At the same time, because the top material of the cell structure uses two GaInP sub-cells with strong radiation resistance, its radiation resistance is greatly improved compared with the lattice-mismatched three-junction solar cell. At the same time, due to the thinning of the single-junction sub-cell thickness, the carrier collection efficiency will also be significantly improved. Summary of the invention

[0007] The purpose of the present invention is to overcome the shortcomings and disadvantages of the prior art and propose a lattice-mismatched five-junction solar cell and a preparation method thereof. Compared with the lattice-matched five-junction solar cell structure, the research and development difficulty of the new structure battery is relatively reduced, and at the same time, the overall photoelectric conversion efficiency of the battery can be effectively improved.

[0008] To achieve the above-mentioned object, the technical solution provided by the present invention is: a lattice-mismatched five-junction solar cell, comprising a Ge substrate, the Ge substrate is a p-type Ge single crystal, on the Ge substrate are arranged a GaInP nucleation layer, a GaInAs buffer layer, an AlGaInAs DBR reflection layer, an AlGaInAs lattice gradient buffer layer, a first GaInAs sub-cell, a second GaInAs sub-cell, a first GaInP sub-cell, a second GaInP sub-cell and a GaInAs cap layer in a layered stacking structure from bottom to top, the AlGaInAs DBR reflection layer and the AlGaInAs lattice gradient buffer layer are connected through a first tunnel junction, the first GaInAs sub-cell and the second GaInAs sub-cell are connected through a second tunnel junction, the second GaInAs sub-cell and the first GaInP sub-cell are connected through a third tunnel junction, and the first GaInP sub-cell and the second GaInP sub-cell are connected through a fourth tunnel junction; wherein the GaInP nucleation layer, the GaInAs buffer layer, the AlGaInAs The DBR reflective layer is lattice matched with the Ge substrate, while the epitaxial layers of the first GaInAs subcell, the second GaInAs subcell, the first GaInP subcell and the second GaInP subcell are lattice mismatched with the Ge substrate, and the epitaxial layers are lattice matched with each other.

[0009] Furthermore, the GaInP nucleation layer is an n-type doped layer with an electron concentration of 1E18 / cm 3 ~1E19 / cm 3 , with a thickness of 5 to 20 nm; the GaInAs buffer layer is an n-type doped layer with an electron concentration of 5E17 / cm 3 ~1E19 / cm 3, with a thickness of 500 to 1500 nm; the GaInAs cap layer is an n-type highly doped GaInAs cap layer, the lattice of which matches the second GaInP sub-cell, and the bottom thickness is 100 to 800 nm.

[0010] Furthermore, the reflection wavelength of the AlGaInAs DBR reflection layer is 900-1200 nm, and the number of pairs of the AlGaInAs combination layers is 10-30 pairs.

[0011] Further, the first tunnel junction is a p-GaAs / n-AlGaAs structure, wherein the thickness of p-GaAs and n-AlGaAs are both 6 to 20 nm; the second tunnel junction is a p-GaAs / n-AlGaAs structure, wherein the thickness of p-GaAs and n-AlGaAs are both 6 to 20 nm; the third tunnel junction is a p-GaInP / n-AlGaAs structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6 to 20 nm; the fourth tunnel junction is a p-GaInP / n-AlGaInP structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6 to 20 nm.

[0012] Furthermore, the thickness of the AlGaInAs lattice gradient buffer layer is 1500-2500 nm.

[0013] Furthermore, the total thickness of the first GaInAs sub-cell is 1000-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

[0014] Furthermore, the total thickness of the second GaInAs sub-cell is 600-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

[0015] Furthermore, the total thickness of the first GaInP sub-cell is 1000-1500 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

[0016] Furthermore, the total thickness of the second GaInP sub-cell is 400-1000 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

[0017] The present invention also provides a method for preparing the above-mentioned lattice-mismatched five-junction solar cell, comprising the following steps:

[0018] Step 1: Select a Ge substrate, wherein the Ge substrate is a p-type Ge single crystal wafer;

[0019] Step 2: Using metal organic chemical vapor deposition technology, grow a GaInP nucleation layer on the selected Ge substrate at a growth temperature of 550-630°C and a growth rate of The GaInP nucleation layer is used to increase the nucleation density on the substrate surface;

[0020] Step 3: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a GaInAs buffer layer on the GaInP nucleation layer. The growth temperature is 550-650℃ and the growth rate is The GaInAs buffer layer is used to reduce the defect density of the epitaxial layer and improve the crystal quality;

[0021] Step 4: Using metal organic chemical vapor deposition technology, change the growth conditions and grow AlGaInAs DBR reflective layer on the GaInAs buffer layer. The growth temperature is 600-700℃ and the growth rate is The AlGaInAsDBR reflective layer is used to reflect photons in the long-wave range;

[0022] Step 5: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first tunnel junction on the AlGaInAs DBR reflective layer. The growth temperature is 500-600℃ and the growth rate is

[0023] Step 6: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a lattice gradient AlGaInAs lattice gradient buffer layer on the first tunnel junction. The growth temperature is 600-650°C and the growth rate is

[0024] Step 7: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first GaInAs subcell on the AlGaInAs lattice gradient buffer layer at a growth temperature of 600-650°C and a growth rate of

[0025] Step 8: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the second tunnel junction on the first GaInAs subcell at a growth temperature of 500-600°C and a growth rate of

[0026] Step 9: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the second GaInAs sub-cell on the second tunnel junction. The growth temperature is 600-650℃ and the growth rate is

[0027] Step 10: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the third tunnel junction on the second GaInAs subcell at a growth temperature of 450-600°C and a growth rate of

[0028] Step 11: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first GaInP sub-cell on the third tunnel junction at a growth temperature of 600-650°C and a growth rate of

[0029] Step 12: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the fourth tunnel junction on the first GaInP subcell at a growth temperature of 500-550°C and a growth rate of

[0030] Step 13: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a second GaInP sub-cell on the fourth tunnel junction at a growth temperature of 600-650°C and a growth rate of

[0031] Step 14: Deposit an n-type highly doped GaInAs cap layer on the second GaInP subcell, with the lattice matching the second GaInP subcell, at a growth temperature in the range of 450-650°C and a growth rate of This layer helps to form ohmic contacts for chip electrodes.

[0032] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0033] The key to the present invention is to achieve the best current matching state between the sub-cells constituting the five-junction battery by reasonably designing the sub-cell band gap combination and adjusting the thickness combination between different sub-cells of the same component, so as to obtain the best conversion efficiency. Since in this battery structure, two layers of sub-cells connected in series are grown from the same material, the thickness of the single-layer sub-cell is significantly thinner than that of the three-junction battery with similar band gap combination, which greatly improves the carrier collection efficiency. In addition, this structural design is also very beneficial for improving the fill factor and radiation resistance of solar cells.

[0034] The five-junction solar cell produced based on the present invention greatly reduces the difficulty of product development and large-scale production, and while the battery performance is improved, its radiation resistance is also optimized. At a time when the development of lattice-matched five-junction solar cells is facing a bottleneck, this structural design idea provides a new multi-junction battery design solution for the development of new battery products.

[0035] The five-junction solar cell produced by the present invention can realize the growth of a brand-new five-junction battery without adding new battery materials that are extremely difficult to grow, and the open circuit voltage of the battery with this structure is significantly improved. According to analysis, the open circuit voltage of the five-junction battery with this structure can reach more than 4.7V, and the battery conversion efficiency is significantly improved. The conversion efficiency of the traditional GaInP / GaInAs / Ge three-junction battery under the AM0 spectrum can reach 30%, and after analysis and comparison, the conversion efficiency of the lattice-mismatched five-junction solar cell of the present invention under the AM0 spectrum can reach 34%, which can greatly improve the output power of the space power supply.

[0036] Table 1 Photoelectric performance analysis of traditional three-junction cells and lattice-mismatched five-junction cells under AM0 spatial spectrum

[0037] BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 Schematic diagram of the lattice-mismatched five-junction solar cell structure. DETAILED DESCRIPTION

[0039] The present invention will be further described below in conjunction with specific embodiments.

[0040] like Figure 1 As shown, the lattice-mismatched five-junction solar cell provided in this embodiment includes a Ge substrate 1, wherein the Ge substrate 1 is a p-type Ge single crystal, and a GaInP nucleation layer 2, a GaInAs buffer layer 3, an AlGaInAs DBR reflective layer 4, an AlGaInAs lattice gradient buffer layer 6, a first GaInAs sub-cell 7, a second GaInAs sub-cell 9, a first GaInP sub-cell 11, a second GaInP sub-cell 13 and a GaInAs cap layer 14 are sequentially arranged on the Ge substrate 1 in a layered stacking structure from bottom to top, wherein the AlGaInAs The DBR reflective layer 4 and the AlGaInAs lattice gradient buffer layer 6 are connected via a first tunnel junction 5, the first GaInAs sub-cell 7 and the second GaInAs sub-cell 9 are connected via a second tunnel junction 8, the second GaInAs sub-cell 9 and the first GaInP sub-cell 11 are connected via a third tunnel junction 10, and the first GaInP sub-cell 11 and the second GaInP sub-cell 13 are connected via a fourth tunnel junction 12; wherein the GaInP nucleation layer 2, the GaInAs buffer layer 3, and the AlGaInAs DBR reflective layer 4 are lattice matched with the Ge substrate 1, while the epitaxial layers of the first GaInAs sub-cell 7, the second GaInAs sub-cell 9, the first GaInP sub-cell 11, and the second GaInP sub-cell 13 are lattice mismatched with the Ge substrate 1, and the epitaxial layers maintain lattice matching.

[0041] The GaInP nucleation layer 2 is an n-type doped layer with an electron concentration of 1E18 / cm 3 ~1E19 / cm 3 (Preferably 3E18 / cm 3 ), with a thickness of 5 to 20 nm.

[0042] The GaInAs buffer layer 3 is an n-type doped layer with an electron concentration of 5E17 / cm 3 ~1E19 / cm 3 (Preferably 2E18 / cm 3 ), with a thickness of 500 to 1500 nm.

[0043] The reflection wavelength of the AlGaInAs DBR reflection layer 4 is 900-1200 nm, and the number of pairs of AlGaInAs combination layers is 10-30 pairs.

[0044] The first tunnel junction 5 is a p-GaAs / n-AlGaAs structure, wherein the thickness of p-GaAs and n-AlGaAs are both 6-20 nm.

[0045] The thickness of the AlGaInAs lattice gradient buffer layer 6 is 1500-2500 nm.

[0046] The total thickness of the first GaInAs sub-cell 7 is 1000-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

[0047] The second tunnel junction 8 is a p-GaAs / n-AlGaAs structure, wherein the thickness of the p-GaAs and the n-AlGaAs are both 6 to 20 nm;

[0048] The total thickness of the second GaInAs sub-cell 9 is 600-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

[0049] The third tunnel junction 10 is a p-GaInP / n-AlGaAs structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6-20 nm;

[0050] The total thickness of the first GaInP sub-cell 11 is 1000-1500 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

[0051] The fourth tunnel junction 12 is a p-GaInP / n-AlGaAs structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6-20 nm.

[0052] The total thickness of the second GaInP sub-cell 13 is 400-1000 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

[0053] The GaInAs cap layer 14 is an n-type highly doped GaInAs cap layer, the lattice of which matches the second GaInP sub-cell 13 and has a bottom thickness of 100 to 800 nm (preferably 500 nm).

[0054] The following is a specific method for manufacturing the lattice-mismatched five-junction solar cell of this embodiment, which includes but is not limited to metal organic chemical vapor deposition technology, molecular beam epitaxy technology and vapor phase epitaxy technology, and preferably uses metal organic chemical vapor deposition technology. The method specifically includes the following steps:

[0055] Step 1: Select a Ge substrate, which is a p-type Ge single crystal wafer.

[0056] Step 2: Using metal organic chemical vapor deposition technology, a low-temperature GaInP nucleation layer is grown on the Ge substrate at a growth temperature of 550-650°C; the growth rate of the low-temperature GaInP nucleation layer is The low-temperature GaInP nucleation layer can increase the nucleation density on the substrate surface.

[0057] Step 3: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a GaInAs buffer layer on the GaInP nucleation layer; the growth temperature of the GaInAs buffer layer is 550-650°C, preferably in the range of 600-650°C; the growth rate of the GaInAs buffer layer is The GaInAs buffer layer can reduce the defect density of the epitaxial layer and improve the crystal quality of the subsequent epitaxial growth material.

[0058] Step 4: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing an AlGaInAs DBR reflective layer on the GaInAs buffer layer; the growth temperature of the AlGaInAs DBR reflective layer is 600-700°C; the growth rate of the AlGaInAs DBR reflective layer is The AlGaInAs DBR reflective layer is used to reflect photons in the long-wave range.

[0059] Step 5: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing the first tunnel junction on the AlGaInAs DBR reflective layer; the tunnel junction growth temperature is 500-600°C; the tunnel junction growth rate is

[0060] Step 6: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing an AlGaInAs lattice gradient buffer layer on the first tunnel junction; the AlGaInAs lattice gradient buffer layer growth temperature is 600-650°C; the AlGaInAs lattice gradient buffer layer growth rate is

[0061] Step 7: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing the first GaInAs sub-cell on the AlGaInAs lattice gradient buffer layer; the growth temperature of the sub-cell is 600-650°C; the growth rate of the sub-cell is

[0062] Step 8: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a second tunnel junction on the first GaInAs subcell; the tunnel junction growth temperature is 500-600°C; the tunnel junction growth rate is

[0063] Step 9: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a second GaInAs sub-cell on the second tunnel junction; the growth temperature of the sub-cell is 600-700°C; the growth rate of the sub-cell is

[0064] Step 10: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a third tunnel junction on the second GaInAs subcell; the tunnel junction growth temperature is 500-600°C; the tunnel junction growth rate is

[0065] Step 11: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing the first GaInP sub-cell on the third tunnel junction; the growth temperature of the sub-cell is 600-700°C; the growth rate of the sub-cell is

[0066] Step 12: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a fourth tunnel junction on the first GaInP subcell; the tunnel junction growth temperature is 500-600°C; the tunnel junction growth rate is

[0067] Step 13: Using metal organic chemical vapor deposition technology, changing the growth conditions, growing a second GaInP sub-cell on the fourth tunnel junction; the growth temperature of the sub-cell is 600-700°C; the growth rate of the sub-cell is

[0068] Step 14: Deposit an n-type highly doped GaInAs cap layer on the second GaInP subcell, with the lattice matching the second GaInP subcell, at a growth temperature in the range of 450-650°C and a growth rate of This layer helps to form ohmic contacts for chip electrodes.

[0069] In summary, the present invention proposes a new five-junction battery structure design idea. Through this new structural design, not only can the advantages of the five-junction battery be maximized, but also the difficulty of the development and large-scale production of the five-junction battery can be significantly reduced. In addition, the present invention can also achieve the purpose of more fully utilizing the energy of sunlight in a relatively economical way, and can effectively improve the photoelectric conversion efficiency of GaAs multi-junction batteries, which is of great promotion value and worthy of promotion.

[0070] The embodiments described above are only preferred embodiments of the present invention and are not intended to limit the scope of implementation of the present invention. Therefore, all changes made according to the shape and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A lattice-mismatched five-junction solar cell, comprising a Ge substrate, characterized in that: The Ge substrate is a p-type Ge single crystal, and a GaInP nucleation layer, a GaInAs buffer layer, an AlGaInAs DBR reflection layer, an AlGaInAs lattice gradient buffer layer, a first GaInAs sub-cell, a second GaInAs sub-cell, a first GaInP sub-cell, a second GaInP sub-cell and a GaInAs cap layer are sequentially arranged on the Ge substrate from bottom to top in a layered stacking structure, the AlGaInAs DBR reflection layer and the AlGaInAs lattice gradient buffer layer are connected through a first tunnel junction, the first GaInAs sub-cell and the second GaInAs sub-cell are connected through a second tunnel junction, the second GaInAs sub-cell and the first GaInP sub-cell are connected through a third tunnel junction, and the first GaInP sub-cell and the second GaInP sub-cell are connected through a fourth tunnel junction; wherein the GaInP nucleation layer, the GaInAs buffer layer, the AlGaInAs The DBR reflective layer is lattice matched with the Ge substrate, while the epitaxial layers of the first GaInAs subcell, the second GaInAs subcell, the first GaInP subcell and the second GaInP subcell are lattice mismatched with the Ge substrate, and the epitaxial layers are lattice matched with each other.

2. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The GaInP nucleation layer is an n-type doped layer with an electron concentration of 1E18 / cm 3 ~1E19 / cm 3 , with a thickness of 5 to 20 nm; the GaInAs buffer layer is an n-type doped layer with an electron concentration of 5E17 / cm 3 ~1E19 / cm 3 , with a thickness of 500 to 1500 nm; the GaInAs cap layer is an n-type highly doped GaInAs cap layer, the lattice of which matches the second GaInP sub-cell, and the bottom thickness is 100 to 800 nm.

3. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The reflection wavelength of the AlGaInAsDBR reflection layer is 900-1200nm, and the number of pairs of the AlGaInAs combination layers is 10-30 pairs.

4. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The first tunnel junction is a p-GaAs / n-AlGaAs structure, wherein the thickness of p-GaAs and n-AlGaAs are both 6 to 20 nm; the second tunnel junction is a p-GaAs / n-AlGaAs structure, wherein the thickness of p-GaAs and n-AlGaAs are both 6 to 20 nm; the third tunnel junction is a p-GaInP / n-AlGaAs structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6 to 20 nm; the fourth tunnel junction is a p-GaInP / n-AlGaInP structure, wherein the thickness of p-GaInP and n-AlGaAs are both 6 to 20 nm.

5. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The thickness of the AlGaInAs lattice gradient buffer layer is 1500-2500 nm.

6. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The total thickness of the first GaInAs sub-cell is 1000-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

7. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The total thickness of the second GaInAs sub-cell is 600-1500 nm, and the optical band gap of the GaInAs material is 1.2-1.3 eV.

8. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The total thickness of the first GaInP sub-cell is 1000-1500 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

9. The lattice-mismatched five-junction solar cell according to claim 1, characterized in that: The total thickness of the second GaInP sub-cell is 400-1000 nm, and the optical band gap of the GaInP material is 1.6-1.8 eV.

10. A method for preparing a lattice-mismatched five-junction solar cell according to any one of claims 1 to 9, characterized in that: The following steps are involved: Step 1: Select a Ge substrate, wherein the Ge substrate is a p-type Ge single crystal wafer; Step 2: Using metal organic chemical vapor deposition technology, grow a GaInP nucleation layer on the selected Ge substrate at a growth temperature of 550-630°C and a growth rate of The GaInP nucleation layer is used to increase the nucleation density on the substrate surface; Step 3: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a GaInAs buffer layer on the GaInP nucleation layer. The growth temperature is 550-650℃ and the growth rate is The GaInAs buffer layer is used to reduce the defect density of the epitaxial layer and improve the crystal quality; Step 4: Using metal organic chemical vapor deposition technology, change the growth conditions and grow AlGaInAs DBR reflective layer on the GaInAs buffer layer. The growth temperature is 600-700℃ and the growth rate is The AlGaInAs DBR reflective layer is used to reflect photons in the long-wave range; Step 5: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first tunnel junction on the AlGaInAs DBR reflective layer. The growth temperature is 500-600℃ and the growth rate is Step 6: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a lattice gradient AlGaInAs lattice gradient buffer layer on the first tunnel junction. The growth temperature is 600-650°C and the growth rate is Step 7: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first GaInAs subcell on the AlGaInAs lattice gradient buffer layer at a growth temperature of 600-650°C and a growth rate of Step 8: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the second tunnel junction on the first GaInAs subcell at a growth temperature of 500-600°C and a growth rate of Step 9: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the second GaInAs sub-cell on the second tunnel junction. The growth temperature is 600-650℃ and the growth rate is Step 10: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the third tunnel junction on the second GaInAs subcell at a growth temperature of 450-600°C and a growth rate of Step 11: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the first GaInP sub-cell on the third tunnel junction at a growth temperature of 600-650°C and a growth rate of Step 12: Using metal organic chemical vapor deposition technology, change the growth conditions and grow the fourth tunnel junction on the first GaInP subcell at a growth temperature of 500-550°C and a growth rate of Step 13: Using metal organic chemical vapor deposition technology, change the growth conditions and grow a second GaInP sub-cell on the fourth tunnel junction at a growth temperature of 600-650°C and a growth rate of Step 14: Deposit an n-type highly doped GaInAs cap layer on the second GaInP subcell, with the lattice matching the second GaInP subcell, at a growth temperature in the range of 450-650°C and a growth rate of This layer helps to form ohmic contacts for chip electrodes.

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