PNP-type Schottky collector region AlGaN / GaN HBT device and preparation method thereof

Abstract

The present invention discloses a PNP type Schottky collector region AlGaN / GaN HBT device, which comprises, from bottom to top, a substrate, a buried oxide layer, a collector region, a base region and an emitter region, wherein the collector region comprises a lower P-type single crystal silicon layer and an upper metal silicide layer, the base region comprises an N-type AlGaN layer, and the emitter region comprises a P-type GaN layer; a collector electrode is arranged on the P-type single crystal silicon layer, a base electrode is arranged on the N-type AlGaN layer, and an emitter electrode is arranged on the P-type GaN layer. The present invention has good contact interface characteristics, can improve the switching speed and cut-off frequency of the device, has a simple process and is compatible with existing silicon-based processes.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor technology, and in particular relates to a PNP type Schottky collector region AlGaN / GaN HBT device and a preparation method thereof. Background Art

[0002] Traditional semiconductor materials represented by silicon (Si) and gallium arsenide (GaAs) are no longer able to meet the requirements of radiation resistance, high temperature, high voltage and high power for the development of modern electronic technology. Wide bandgap semiconductor GaN electronic devices can be used in high temperature, high pressure, high frequency and harsh environments, such as radar and wireless communication base stations and satellite communications.

[0003] Due to GaN's large bandgap, high breakdown voltage, high electron saturation drift velocity, excellent electrical and optical properties and good chemical stability, it is favored in high-frequency, high-power, and high-temperature electronic devices. GaN heterojunction bipolar transistors (HBTs) have high current gain. At present, it is reported that the AlGaN / GaN NPN HBT device used for power amplifiers of high-power communications and radars can work at a high temperature of up to 300°C, which has attracted widespread attention in the fields of national defense and communications.

[0004] As GaN device technology matures, GaN HBT will be used more and more in communication system equipment to maximize the system's operating capacity and reliability: in the military, Raytheon is developing GaN HBT-based transceiver components for future military radar upgrades; in civilian use, GaN HBT's high-frequency and high-power processing capabilities are important for the development of amplifiers and modulators and other key devices in advanced communication networks.

[0005] However, the existing GaN HBT devices, on the one hand, are limited by the high dislocation density of GaN single crystals grown by heteroepitaxial technology using sapphire and silicon carbide (SiC) as substrates, and their performance is not satisfactory. The DC current gain of GaN HBT is still relatively small, and the process is not very stable. On the other hand, in order to further improve the switching performance of the existing HBT devices, it is necessary to introduce additional process flows on the original basis, which not only makes the process flow more complicated, but also increases the production cost and reduces the production efficiency. Summary of the invention

[0006] In view of the deficiencies in the prior art, the present invention provides a PNP-type Schottky collector AlGaN / GaN HBT device and a preparation method thereof, which has good contact interface characteristics, can improve the switching speed and cutoff frequency of the device, has a simple process, and is compatible with the existing silicon-based process.

[0007] According to one aspect of the present invention, a PNP-type Schottky collector region AlGaN / GaN HBT device comprises, from bottom to top, a substrate, a buried oxide layer, a collector region, a base region and an emitter region, wherein the collector region comprises a lower P-type single crystal silicon layer and an upper metal silicide layer, the base region comprises an N-type AlGaN layer, and the emitter region comprises a P-type GaN layer; a collector is provided on the P-type single crystal silicon layer, a base is provided on the N-type AlGaN layer, and an emitter is provided on the P-type GaN layer; and the metal silicide in the metal silicide layer is one of TiSi2, CoSi2, and MoSi2.

[0008] Furthermore, a first intrinsic GaN barrier layer is provided between the N-type AlGaN layer and the metal silicide layer, and a second intrinsic GaN barrier layer is provided between the N-type AlGaN layer and the P-type GaN layer.

[0009] Particularly, the thickness of the first intrinsic GaN barrier layer and the second intrinsic GaN barrier layer is 5-10 nm.

[0010] Furthermore, the N-type AlGaN layer includes N-type doped Al x Ga 1-x N layer and N-type doped Al thereunder r Ga 1-r N component graded layer, the N-type doped Al r Ga 1-r The molar composition r of Al in the N composition graded layer changes from x to 0 from top to bottom.

[0011] In particular, the N-type doped Al x Ga 1-x The thickness of the N layer is 20 nm; the N-type doped Al r Ga 1-r The thickness of the N-component graded layer may be 50 nm.

[0012] In another aspect of the present invention, a method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device comprises the following steps:

[0013] S1: preparing an SOI substrate, the top layer of which is a P-type single crystal silicon layer; cleaning and chemical mechanical polishing (CMP) the surface of the P-type single crystal silicon layer;

[0014] S2: depositing and growing a layer of metal Ti, Co or Mo, and then performing a rapid thermal annealing process to oxidize the metal Ti, Co or Mo and the surface of the P-type single crystal silicon layer thereunder into TiSi2, CoSi2 or MoSi2, forming a metal silicide layer as a collector region;

[0015] S3: growing a first intrinsic GaN barrier layer on the metal silicide layer;

[0016] S4: growing an N-type AlGaN layer on the first intrinsic GaN barrier layer;

[0017] S5: Continue to grow a second intrinsic GaN barrier layer; grow a P-type GaN layer on the second intrinsic GaN barrier layer;

[0018] S6: Prepare the emitter, base and collector.

[0019] Furthermore, the method for growing the N-type AlGaN layer in step S4 comprises: firstly growing an N-type doped Al on the first intrinsic GaN barrier layer by MOCVD; r Ga 1-r N component gradient layer, and then in the N-type doped Al r Ga 1-r N-type doped Al grown on N-composition graded layer x Ga 1-x N layer; the N-type doped Al r Ga 1-r The Al composition r of the N composition graded layer changes from x to 0 from top to bottom.

[0020] In particular, the Al component r changes from x to 0 from top to bottom in a linear or exponential manner.

[0021] Compared with the prior art, the present invention has the following beneficial effects:

[0022] 1. By growing an extremely thin metal silicide layer with good interface morphology and interface state on single crystal silicon, a Schottky contact of silicon / metal silicide is formed with single crystal silicon, which not only ensures excellent contact interface characteristics, but also improves the switching speed and cut-off frequency of the device. At the same time, the preparation process is relatively simple and compatible with conventional silicon-based processes, reducing production costs and improving production efficiency;

[0023] 2. By introducing SOI substrate technology in the preparation of AlGaN / GaN HBT devices, it can further reduce parasitic capacitance effects, reduce device power consumption, avoid latch-up effects, etc., which can improve the overall performance of the device and facilitate process integration with current small-size, low-power SOI CMOS devices;

[0024] 3. By providing a first intrinsic GaN barrier layer on the metal silicide layer, the parasitic barrier effect caused by the diffusion of impurity atoms in the heavily doped N-type AlGaN base region into the metal silicide layer can be effectively prevented; by providing a second intrinsic GaN barrier layer under the P-type GaN layer, the parasitic barrier effect caused by the diffusion of doped atoms in the P-type heavily doped GaN emitter region into the base region can be effectively suppressed;

[0025] 4. By adopting a multi-layer base region structure with a gradient composition, under the forward bias condition of the emitter junction, an electric field that accelerates the transport of forward injected minority carriers (holes) is introduced into the gradient layer, thereby further increasing the base region transit time, which is beneficial to improving the frequency characteristics of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic structural diagram of a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0027] Figure 2 N-type doped Al r Ga 1-r Schematic diagram of the gradient of N-component gradient layer;

[0028] Figure 3 The schematic diagram of the device structure after step S1 of the method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0029] Figure 4 Schematic diagram of the device structure after step S2 of the method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0030] Figure 5 Schematic diagram of the device structure after step S4 of the method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0031] Figure 6 Schematic diagram of the device structure after step S5 of the method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0032] Figures 7-8 Schematic diagram of the device structure in step S6 of the method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device in the present invention;

[0033] Among them, 1 substrate, 2 buried oxide layer, 3 collector region, 31 P-type single crystal silicon layer, 32 metal silicide layer, 33 collector, 4 base region, 41 N-type doped Al x Ga 1-x N layer, 42N type doped Al r Ga 1-r N component graded layer, 43 first intrinsic GaN barrier layer, 44 base, 5 emitter region, 51 P-type GaN layer, 52 second intrinsic GaN barrier layer, 53 emitter. DETAILED DESCRIPTION

[0034] In order to make the technical means, creative features, objectives and effects of the invention easy to understand, the invention is further described below in conjunction with specific diagrams. It can be understood that the directional terms such as "upper" and "lower" used in this article do not refer to a specific direction, do not constitute a limitation of the scheme itself, but are merely a description method that is easy to understand based on the specific instructions and drawings.

[0035] In one aspect of the present invention, a PNP-type Schottky collector region AlGaN / GaN HBT device includes, from bottom to top, a substrate 1, a buried oxide layer 2, a collector region 3, a base region 4, and an emitter region 5, wherein the collector region 3 includes a lower P-type single crystal silicon layer 31 and an upper metal silicide layer 32, the base region 4 includes an N-type AlGaN layer, and the emitter region 5 includes a P-type GaN layer 51; a collector electrode 33 is provided on the P-type single crystal silicon layer 31, a base electrode 44 is provided on the N-type AlGaN layer, and an emitter electrode 53 is provided on the P-type GaN layer 51. In particular, the metal silicide in the metal silicide layer 32 may be one of TiSi2, CoSi2, and MoSi2.

[0036] The substrate may be an N-type doped single crystal silicon substrate. Both sides of the P-type single crystal silicon layer are collector contact regions. In practice, it is found that the interface morphology and interface state at the interface where the metal silicide layer contacts the single crystal silicon thereunder have a greater impact on the device characteristics, and the metal silicide layer and the N-type single crystal silicon layer thereunder form a "combined collector" structure. The P-type GaN layer may be 100 nm thick and form a good Schottky contact with the emitter.

[0037] First, this solution uses SOI substrate in the preparation of AlGaN / GaN HBT devices, which further reduces parasitic capacitance effects, reduces device power consumption, avoids latch-up effects, etc., can improve the overall performance of the device, and facilitates process integration with current small-size, low-power SOI CMOS devices.

[0038] Secondly, this scheme replaces the collector junction of the conventional HBT with a Schottky junction. In addition to avoiding the large dislocations and interface states generated by the single-crystal GaN collector based on sapphire or silicon carbide substrates, it can also further improve the operating speed of the device. This is because the Schottky contact has the following two obvious main advantages: (1) the collector resistance is 0; (2) because there is no collector junction space charge region, the collector junction transit time can be 0, and the charge storage time is also zero, which can further increase the cutoff frequency. At the same time, it also takes into account the compatibility with conventional silicon-based CMOS processes, facilitating large-scale commercial manufacturing. Considering that titanium silicide (TiSi2) has very ideal material physical properties: high conductivity, high selectivity, excellent thermal stability and better silicon adsorption, good process adaptability and very low signal interference, this solution forms a Schottky contact of silicon / metal silicide with single crystal silicon by growing an extremely thin layer of metal silicide with good interface morphology and interface state on the single crystal silicon material, which not only ensures excellent contact interface characteristics, but also improves the device switching speed and cutoff frequency. At the same time, the preparation process is relatively simple and compatible with conventional silicon-based processes. The TiSi2 can also be replaced by CoSi2 and MoSi2 with similar properties. As far as the current process is concerned, TiSi2 is the preferred solution.

[0039] As a further optimization, a first intrinsic GaN barrier layer 43 is provided between the N-type AlGaN layer and the metal silicide layer 32, and a second intrinsic GaN barrier layer 52 is provided between the N-type AlGaN layer and the P-type GaN layer 51. In particular, the thickness of the first intrinsic GaN barrier layer 43 and the second intrinsic GaN barrier layer 52 may be 5 to 10 nm. If the barrier layer is too thin, it will not play a blocking role and increase the series resistance; if it is too thick, it will increase the transport time of carriers and affect the frequency performance.

[0040] In this scheme, a first intrinsic GaN barrier layer is arranged on the metal silicide layer, which can prevent the impurity atoms in the heavily doped N-type AlGaN base region from diffusing into the metal silicide layer, forming a parasitic barrier effect and deteriorating the electrical characteristics of the Schottky interface; a second intrinsic GaN barrier layer is arranged under the P-type GaN layer, which can effectively suppress the parasitic barrier effect caused by the diffusion of doped atoms in the P-type heavily doped GaN emitter region into the base region.

[0041] As a further optimization, the N-type AlGaN layer includes N-type doped Al x Ga 1-x The N-type doped Al layer 41 and the N-type doped Al layer thereunder r Ga 1-r N-type doped Al r Ga 1-r The molar composition r of Al in the N-composition graded layer 42 changes gradually from x to 0 from top to bottom.

[0042] The N-doped Al x Ga 1-x In the N layer, 0 < x < 1, and the value of x can be adjusted according to actual needs; the thickness of this layer can be 20 nm, and the doping concentration can be 1×10 18 cm -3 。The N-doped Al r Ga 1-r In the N-component graded layer, 0 < r < x, the thickness of this layer can be 50 nm, and the doping concentration of arsenic can be 2×10 19 cm -3 。Below the N-doped Al x Ga 1-x An N-doped arsenic (As) Al r Ga 1-r The N-component graded layer is set as the base region, which can avoid the base region trapping effect and accelerate the transport process of minority carriers (holes) in the base region. As Figure 2 shown, the grading method can be linear grading or exponential grading.

[0043] This solution adopts a multi-layer base region structure. Under the condition that the emitter junction is forward-biased, the conduction band of the N-doped Al r Ga 1-r The N-component graded layer hardly tilts, and the change in the bandgap width is mainly reflected in the valence band. Therefore, an electric field that accelerates the transport of minority carriers (holes) injected forward will be introduced in the graded layer, further improving the base transit time and being beneficial to improving the frequency characteristics of the device.

[0044] On the other hand, a method for fabricating a PNP-type Schottky collector region AlGaN / GaN HBT device according to the present invention includes the following steps:

[0045] S1: Prepare an SOI substrate, the top P-type single-crystalline silicon layer 31 is heavily doped, and the doping concentration can be 2×10 19 cm -3 ; Clean and perform chemical mechanical polishing (CMP) treatment on the surface of the P-type single-crystalline silicon layer 31; As Figure 3 shown;

[0046] S2: Fabricate a metal silicide layer 32: Deposit and grow a layer of metal titanium (Ti) or cobalt (Co) or molybdenum (Mo), and then perform rapid thermal annealing (RTA) treatment to oxidize Ti and the surface of the underlying P-type single-crystalline silicon layer 31 into TiSi2 or CoSi2 or MoSi2 to form a metal silicide layer 32 as the collector region; As Figure 4 shown;

[0047] S3: Grow a first intrinsic GaN blocking layer 43 on the metal silicide layer 32, and its thickness can be 5 nm;

[0048] S4: growing an N-type AlGaN layer on the first intrinsic GaN barrier layer 43; Figure 5 As shown;

[0049] S5: Continue to grow a second intrinsic GaN barrier layer 52, the thickness of which may be 5 nm; grow a P-type GaN layer 51 on the second intrinsic GaN barrier layer 52, the thickness of which may be 100 nm; Figure 6 As shown;

[0050] S6: Prepare the emitter 53, the base 44 and the collector 33: according to the preset widths of the emitter, the base and the collector, the emitter region, the base region and the collector region are sequentially etched to form a mesa structure; on the entire etched mesa structure, a SiO2 oxide layer covering the entire mesa is formed by dry oxygen oxidation, such as Figure 7 As shown; the distance between the upper surface of the oxide layer and the upper surface of the GaN emitter layer can be 20nm, and then the excess planar SiO2 oxide layer on both sides of the table is removed by dry plasma etching process, so that a 20nm thick oxide layer is retained on both sides, such as Figure 8 As shown; then the oxide layers of the emitter, base and collector windows are etched away to form emitter, base and collector windows, and finally metal or metal silicide (such as CoSi2) is deposited on the emitter, base and collector windows to form good ohmic contacts with the heavily doped emitter, base and collector regions, and serve as emitter, base and collector. Figure 1 shown.

[0051] The growth of metallic titanium in step S2 may be performed by physical vapor deposition (PVD). The growth of the intrinsic GaN barrier layer and the growth of the N-type AlGaN layer in steps S3 and S4 may be performed by metal organic chemical vapor deposition (MOCVD). The thickness of the buried oxide layer of the SOI substrate should not be too thick, and its typical value may be 0.5 μm. The thickness of the metallic titanium may be 5 nm, and the thickness of the metal silicide layer formed by oxidation is usually less than 10 nm. The method for preparing the emitter, base and collector in step S6 belongs to the prior art.

[0052] The doping concentration of the P-type single crystal silicon layer may be 2×10 19 cm -3 . In order to reduce the capacitance of the collector region, the thickness of the P-type single crystal silicon layer should not be too thin; and because the resistance of the depletion region is very large, in order to ensure that the resistance of the collector region does not become too large due to the influence of the width of the depletion region, its thickness should be much larger than the depletion thickness t of the layer caused by the substrate bias. Under the action of the substrate voltage, the SOI substrate forms a back-to-back MOS capacitor structure. According to the physics of semiconductor devices, the depletion thickness t can be solved by a quadratic equation:

[0053]

[0054] Wherein, q is the electronic charge, and N Si is the doping concentration of the P+ monocrystalline silicon layer above the oxide layer, and ε Si and ε OX are the dielectric constants of the monocrystalline silicon and the oxide layer respectively, and t OX is the thickness of the oxide layer, and V S , V C and V MS are the substrate voltage, the collector voltage, and the work function difference of the monocrystalline silicon regions on both sides of the oxide layer respectively.

[0055] As a further optimization, as Figure 5 shown, the method for growing the N-type AlGaN layer in the step S4 includes:

[0056] First, use MOCVD to grow an N-type doped Al r Ga 1-r N composition graded layer 42 on the first intrinsic GaN barrier layer 43, and then grow an N-type doped Al r Ga 1-r N layer 41 on the N-type doped Al x Ga 1-x N composition graded layer 42; in the N-type doped Al x Ga 1-x N layer 41, 0 < x < 1, and the value of x can be adjusted according to actual needs. In the N-type doped Al r Ga 1-r N composition graded layer 42, the Al composition r gradually changes from x to 0 from top to bottom.

[0057] The N-type doped Al r Ga 1-r N composition graded layer can be doped with arsenic, its thickness can be 50 nm, and the arsenic doping concentration can be 2×10 19 cm -3 ; the thickness of the N-type doped Al x Ga 1-x N layer can be 20 nm, and its doping concentration can be 1×10 18 cm -3 . The gradient mode can be a linear gradient mode or an exponential gradient mode, as Figure 2 shown.

[0058] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiment. All technical solutions belonging to the principle of the present invention belong to the protection scope of the present invention. For those skilled in the art, several improvements made without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. PNP type Schottky collector region AlGaN / GaN HBT device, characterized in that: It includes, from bottom to top, a substrate, a buried oxide layer, a collector region, a base region, and an emitter region, wherein the collector region includes a lower P-type single crystal silicon layer and an upper metal silicide layer, and the metal silicide layer forms a Schottky contact with the P-type single crystal silicon layer; the base region includes an N-type AlGaN layer, and the emitter region includes a P-type GaN layer; a collector electrode is provided on the P-type single crystal silicon layer, a base electrode is provided on the N-type AlGaN layer, and an emitter electrode is provided on the P-type GaN layer; The metal silicide in the metal silicide layer is one of TiSi2, CoSi2, and MoSi2; the N-type AlGaN layer includes an N-type doped Al x Ga 1-x N layer and an N-type doped Al r Ga 1-r N composition grading layer thereunder, in the N-type doped Al r Ga 1-r N composition grading layer, the molar fraction r of Al gradually changes from x to 0 from top to bottom, 0 < x < 1; in the N-type doped Al x Ga 1-x N layer, the thickness is 20 nm; in the N-type doped Al r Ga 1-r N composition grading layer, the thickness is 50 nm; the way of gradually changing from x to 0 of the molar fraction r of Al from top to bottom is linear gradual change or exponential gradual change.

2. The PNP type Schottky collector region AlGaN / GaN HBT device according to claim 1, characterized in that: A first intrinsic GaN barrier layer is disposed between the N-type AlGaN layer and the metal silicide layer, and a second intrinsic GaN barrier layer is disposed between the N-type AlGaN layer and the P-type GaN layer.

3. The PNP type Schottky collector region AlGaN / GaN HBT device according to claim 2, characterized in that: The thickness of the first intrinsic GaN barrier layer and the second intrinsic GaN barrier layer is 5-10 nm.

4. A method for preparing a PNP type Schottky collector region AlGaN / GaN HBT device, characterized in that: The steps include: S1: preparing an SOI substrate, the top layer of which is a P-type single crystal silicon layer; cleaning and chemical mechanical polishing (CMP) treatment of the surface of the P-type single crystal silicon layer; S2: depositing and growing a layer of metal Ti, Co or Mo, and then performing a rapid thermal annealing process to silicidize the metal Ti, Co or Mo and the surface of the P-type single crystal silicon layer thereunder into TiSi2, CoSi2 or MoSi2, forming a metal silicide layer as a collector region, wherein the metal silicide layer forms a Schottky contact with the P-type single crystal silicon layer; S3: growing a first intrinsic GaN barrier layer on the metal silicide layer; S4: growing an N-type AlGaN layer on the first intrinsic GaN barrier layer; S5: Continue to grow a second intrinsic GaN barrier layer; grow a P-type GaN layer on the second intrinsic GaN barrier layer; S6: Prepare the emitter, base and collector.

5. The method for preparing a PNP-type Schottky collector region AlGaN / GaN HBT device according to claim 4, characterized in that: The method for growing the N-type AlGaN layer in step S4 comprises: firstly growing an N-type doped AlGaN layer on the first intrinsic GaN barrier layer by MOCVD; r Ga 1-r N component gradient layer, and then in the N-type doped Al r Ga 1-r N-type doped Al grown on N-composition graded layer x Ga 1-x N layer; the N-type doped Al r Ga 1-r The Al component r of the N component graded layer changes from x to 0, 0 from top to bottom. <x<1。

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