A PLC-based high-power special power supply fault interlocking protection device
By adopting a PLC-based fault chain protection device in the special power supply system of high-power particle accelerator, using optical fiber to transmit fault information, the problems of slow fault response speed and electromagnetic interference in the prior art are solved, and higher power system reliability and fault handling efficiency are achieved.
Patent Information
- Application Number
- CN201911025748.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-10-25
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2039-10-25
AI Technical Summary
The prior art cannot effectively solve the problem of fault chain protection in special power supply systems of high-power particle accelerators, especially when the number of power supplies increases, the fault response speed is slow, which can easily lead to electromagnetic interference and delayed information transmission.
The fault chain protection device based on PLC is adopted, and the fault information is directly transmitted between the power supplies in the form of light through the PLC, forming a dual protection channel, isolating electromagnetic interference, and ensuring the reliability of the power supply system through the fault holding and reset functions.
It improves the reliability and fault response speed of high-power special power system, reduces the incidence rate, and improves the overall working reliability of the power system by isolating electromagnetic interference.
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Figure CN110854801B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the fields of electrical technology and power electronics technology, and in particular to a PLC-based high-power special power supply fault interlocking protection device. Background Art
[0002] With the continuous development of scientific research and medical particle accelerator technology, the requirements for accelerator power supplies are getting higher and higher. Such power supplies have the characteristics of high precision, large capacity, small ripple, high reliability and diversified output current waveforms. Power supplies usually work together in series, parallel or a combination of series and parallel. In previous power supply systems, the fault chain between power supplies was only transmitted in the form of communication. The transmission of signals through wire connections often caused electromagnetic interference to be transmitted between power supplies, which brought great trouble to the accuracy and measurement of power supplies. In high-voltage and high-current power supply systems, as the number of power supplies increases, the reliability requirements for the operation of the power supply are getting higher and higher, and the response speed requirements for each power supply to faults are also getting faster and faster. The complex CAN bus communication method that makes the power supply faults chained together can no longer meet the working requirements of the entire accelerator power supply system, and the existing technology cannot solve the above technical problems. Summary of the invention
[0003] The purpose of the present invention is to solve the problem of fault interlocking protection of special power supplies for high-power particle accelerators in the prior art, and to provide a high-power special power supply fault interlocking protection device based on PLC that enables faults to be transmitted between power supplies in the form of light.
[0004] In order to achieve the above object, the present invention adopts the following technical solutions:
[0005] A PLC-based high-power special power supply fault interlocking protection device comprises a main controller and a slave controller connected to the main controller, the slave controller is connected to the PLC, a fault input point of the PLC is connected to a fault receiving circuit, a reset output point of the PLC is connected to a fault reset circuit, the other end of the fault receiving circuit is connected to an external fault transmission optical fiber, a power interface of the fault receiving circuit is connected to a voltage conversion circuit, the voltage conversion circuit is connected to a power indication circuit, and the power indication circuit is connected to a 24V power supply; the fault output point of the PLC is connected to a fault sending circuit, the fault sending circuit is connected to an external fault transmission optical fiber, the external fault transmission optical fiber is connected to a next fault receiving circuit, and a fault holding circuit is connected between the fault receiving circuit and the fault sending circuit.
[0006] Furthermore, the power indication circuit includes an eighth resistor and a light-emitting diode connected in series, and the eighth resistor is connected in series with the first light-emitting diode and then respectively connected in parallel with the first filter capacitor and the second filter capacitor to the 24V power supply, and the eighth resistor is connected to the positive electrode of the 24V power supply, and the first light-emitting diode is connected to the negative electrode of the 24V power supply.
[0007] Furthermore, the voltage conversion circuit includes a first resistor connected to the positive electrode of the 24V power supply, the first resistor is connected to a second resistor, the second resistor is connected to the cathode of a Zener diode, the anode of the Zener diode is connected to the negative electrode of the 24V power supply, and a 5V power supply output terminal is connected between the second resistor and the Zener diode.
[0008] Furthermore, the fault receiving circuit includes a receiving optical fiber head, and the VCC terminal of the receiving optical fiber head is connected to a fifth resistor, and this end of the fifth resistor is also connected to the positive electrode of the 5V power supply, and the other end of the fifth resistor is connected to the OUT terminal of the receiving optical fiber head; a first capacitor is also connected in parallel between the VCC terminal and the GND terminal of the receiving optical fiber head, and a first diode and a second capacitor are also connected in parallel between the OUT terminal of the receiving optical fiber head and the ground wire, and the anode of the first diode is grounded, and the OUT terminal of the receiving optical fiber head is also connected to the base of transistor No. 1, the collector of transistor No. 1 is grounded, and the emitter of transistor No. 1 is connected to terminal No. 2 of the optocoupler, terminal No. 1 of the optocoupler is connected in series with the sixth resistor and connected to the positive electrode of the 5V power supply, terminal No. 4 of the optocoupler is connected to the positive electrode of the 24V power supply, and terminal No. 3 of the optocoupler is the output point of the fault signal, which is connected to the fault input point of the PLC.
[0009] Furthermore, the fault sending circuit includes a transmitting optical fiber head, terminals 2, 6, and 7 of the transmitting optical fiber head are connected to a fourth resistor, the fourth resistor is connected to a third resistor, the third resistor is connected to the fault output point of the PLC, and terminal No. 3 of the transmitting optical fiber head is connected to the anode of a second light-emitting diode, and the cathode of the second light-emitting diode is grounded.
[0010] Furthermore, the fault holding circuit includes a seventh resistor connected to the OUT terminal of the receiving optical fiber head, the other end of the seventh resistor is connected to the base of the second transistor, the emitter of the second transistor is grounded, and the collector of the second transistor is connected to the fault reset circuit.
[0011] Furthermore, the fault reset circuit is a relay, terminal No. 4 of the relay is connected to the collector of transistor No. 2, terminal No. 6 of the relay is also connected between the third resistor and the fourth resistor through the XSI terminal, terminal No. 1 of the relay is connected to the reset output point of the PLC, terminal No. 16 of the relay is grounded, the normally open contact 13 of the relay is connected to the positive pole of the 24V power supply, and the normally open contact 9 of the relay is connected to the third resistor.
[0012] Furthermore, the PLC is connected to the master controller through the slave controller.
[0013] Compared with the prior art, the present invention has the following beneficial effects:
[0014] In the special power supply of high-power accelerator, the power supply is usually a plurality of single power supplies that work together in series, parallel or in combination of series and parallel. The control method is usually master-slave control, that is, a master controller controls multiple slave controllers through communication, the slave controller controls the PLC through communication, and the PLC controls other devices. When a device of a single power supply fails, the PLC of this single power supply uploads the fault information to the corresponding slave controller through communication, and the slave controller uploads the fault information to the main controller through communication. The main controller processes the fault information and sends it to the slave controllers of other single power supplies. The slave controller sends the fault information to the corresponding PLC for processing. This makes the fault information go through several controllers and PLCs when it is transmitted through communication, which not only causes information transmission delay, but also may lose fault information, so that the equipment in the high-power accelerator power supply system cannot be protected in time.
[0015] The fault interlocking protection device of the present invention directly connects the fault information of the single power supply in series through the PLC of the single power supply to form another fault transmission channel, which constitutes double protection with the communication transmission, thus greatly improving the reliability of the high-power special power supply, accelerating the response speed of the power supply to faults, enabling the power supply to be effectively protected in time, and then reducing the occurrence rate of accidents.
[0016] The fault interlocking protection device of the present invention uses optical fiber to transmit fault information between single power supplies in the form of light, isolates electromagnetic interference between power supplies, and further improves the reliability of the power supply system.
[0017] The fault interlocking protection device of the present invention has the function of maintaining and resetting fault information. When the fault information of one of the cooperatively working single power supplies is not cleared, due to the effect of the fault interlocking, other single power supplies cannot be closed until the fault is eliminated. The main controller uniformly sends reset information to reset all power supplies before they can be closed normally, thereby ensuring the safety of personnel and equipment to a certain extent.
[0018] The fault interlocking protection device of the present invention adopts a modular design and has a standard external interface. It can be arbitrarily configured and installed according to the number of single power supplies to perform fault interlocking, making installation, debugging, and maintenance more convenient and quick. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 It is a schematic diagram of the power conversion circuit principle of the present invention.
[0020] Figure 2 It is a schematic diagram of the principle of the fault interlocking protection device of the present invention.
[0021] Figure 3 It is a system block diagram of the invention application.
[0022] The meanings of the reference numerals are as follows: 1. master controller; 2. PLC; 3. fault receiving circuit; 4. fault sending circuit; 5. fault holding circuit; 6. fault resetting circuit; 7. slave controller. DETAILED DESCRIPTION
[0023] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.
[0024] like Figure 1-3 As shown, a PLC-based high-power special power supply fault interlocking protection device includes a main controller 1 and multiple PLCs 2 connected to the main controller 1, and the PLCs 2 are connected to the main controller through a slave controller 7. The fault input point of the PLC2 is connected to a fault receiving circuit 3, the fault reset circuit 6 is connected to the reset output point of the PLC2, the other end of the fault receiving circuit 3 is connected to an external fault transmission optical fiber, the power interface of the fault receiving circuit 3 is connected to a voltage conversion circuit, the voltage conversion circuit is connected to a power indication circuit, and the power indication circuit is connected to a 24V power supply; the fault output point of the PLC2 is connected to a fault sending circuit 4, the fault sending circuit 4 is connected to an external fault transmission optical fiber, and the external fault transmission optical fiber is connected to the next fault receiving circuit 3, and a fault holding circuit 5 is connected between the fault receiving circuit 3 and the fault sending circuit 4.
[0025] like Figure 1 As shown, the power indication circuit includes an eighth resistor R8 and a light-emitting diode V2 connected in series, and the eighth resistor R8 is connected in series with the first light-emitting diode V2 and then connected in parallel with the first filter capacitor C01 and the second filter capacitor C03 on the 24V power supply, and the eighth resistor R8 is connected to the positive electrode of the 24V power supply, and the first light-emitting diode V2 is connected to the negative electrode of the 24V power supply.
[0026] The voltage conversion circuit includes a first resistor R1 connected to the positive electrode of the 24V power supply, the first resistor R1 is connected to a second resistor R2, the second resistor R2 is connected to the cathode of the Zener diode V1, the anode of the Zener diode V1 is connected to the negative electrode of the 24V power supply, and a 5V power supply output terminal is connected between the second resistor R2 and the Zener diode V1.
[0027] The fault interlocking protection device is powered by a 24V power supply. When working, the 24V power supply is filtered by the first filter capacitor C01 and the second filter capacitor C03, and then limited by the first resistor R1 and the second resistor R2 and converted by the voltage regulator diode V1 into the 5V voltage required by the circuit; the power supply indication circuit composed of the eighth resistor R8 and the first light-emitting diode V2 can display in real time whether the voltage of the power supply is normal.
[0028] like Figure 2 As shown, the fault receiving circuit 3 includes a receiving fiber head U1, a VCC terminal of the receiving fiber head U1 is connected to a fifth resistor R5, and this end of the fifth resistor R5 is also connected to the positive electrode of the 5V power supply, and the other end of the fifth resistor R5 is connected to the OUT terminal of the receiving fiber head U1; a first capacitor C1 is also connected in parallel between the VCC terminal and the GND terminal of the receiving fiber head U1, a first diode V6 and a second capacitor C2 are also connected in parallel between the OUT terminal of the receiving fiber head U1 and the ground line, and the anode of the first diode V6 is grounded, the OUT terminal of the receiving fiber head U1 is also connected to the base of the first transistor V3, the collector of the first transistor V3 is grounded, the emitter of the first transistor V3 is connected to the No. 2 terminal of the optical coupler V4, the No. 1 terminal of the optical coupler V4 is connected in series with the sixth resistor R6 and then connected to the positive electrode of the 5V power supply, the No. 4 terminal of the optical coupler V4 is connected to the positive electrode of the 24V power supply, and the No. 3 terminal of the optical coupler V4 is the output point of the fault signal, which is connected to the fault input point of PLC2.
[0029] The fault sending circuit 4 includes a sending optical fiber head U2, and the terminals 2, 6, and 7 of the sending optical fiber head U2 are connected to a fourth resistor R4, and the fourth resistor R4 is connected to a third resistor R3. The third resistor R3 is connected to the fault output point of PLC2, and the terminal No. 3 of the sending optical fiber head U2 is connected to the anode of the second light-emitting diode V7, and the cathode of the second light-emitting diode V7 is grounded.
[0030] The fault holding circuit 5 includes a seventh resistor R7 connected to the OUT terminal of the receiving optical fiber head U1, the other end of the seventh resistor R7 is connected to the base of the second transistor V5, the emitter of the second transistor V5 is grounded, and the collector of the second transistor V5 is connected to the reset circuit.
[0031] The fault reset circuit 6 is a relay K1, wherein terminal No. 4 of the relay K1 is connected to the collector of the second transistor V5, terminal No. 6 of the relay K1 is also connected between the third resistor R3 and the fourth resistor R4 through the XSI terminal, terminal No. 1 of the relay K1 is connected to the reset output point of the PLC2, terminal No. 16 of the relay K1 is grounded, the normally open contact 13 of the relay K1 is connected to the positive pole of the 24V power supply, and the normally open contact 9 of the relay K1 is connected to the third resistor R3.
[0032] Port description of PLC 2: Fault output point Q0.1 outputs low level if there is a fault, and outputs high level if there is no fault; reset output point Q0.2 outputs low level without resetting, and outputs high level to reset; fault receiving point I0.1 receives low level if there is a fault, and receives high level if there is no fault.
[0033] When the system is initialized and working, the whole system must be initialized with a reset signal, that is, the main controller 1 sends a reset signal to PLC 2 through the slave controller 7, so that the reset output point Q0.2 of PLC 2 outputs a high level (time is 1s) reset signal. After receiving the reset signal, the reset relay K1 is energized, so that the normally open contacts 13 and 9 of the reset relay K1 are closed, and the normally closed contacts 4 and 6 are disconnected. At this time, the 24V power supply is connected to the fault sending circuit 4 through the contacts 13 and 9 of the relay K1, and the sending optical fiber head U2 starts to emit light and transmits the light through the optical fiber; at the same time, the receiving optical fiber head U1 in the fault receiving circuit 3 receives the optical signal sent by other fault interlocking devices. When the receiving optical fiber head U1 receives the optical signal, the No. 6 terminal of the receiving optical fiber head U1 outputs a low level, so that the No. 1 transistor V3 is turned on, thereby turning on the optical coupler V4, and 24V (high level) is sent to the fault receiving point I0.1 of PLC 2 through the optical coupler V4. PLC 2 detects that there is no fault, so the fault output point Q0.1 outputs a high level, allowing the transmitting optical fiber head U2 to continue to emit light. At this time, the reset signal disappears, and the relay K1 returns to its initial state (the normally open contacts 13 and 9 are disconnected, and the normally closed contacts 4 and 6 are closed). In this way, the entire fault-free information system is established and the system initialization work is completed.
[0034] When a single power supply device fails, the local PLC 2 will process the received fault information and output a low level 0V at the fault output point Q0.1. At this time, the sending optical fiber head U2 does not emit light due to the lack of driving current, and the fault information is transmitted to the receiving circuit of the fault interlocking device of other single power supplies through the external fault transmission optical fiber.
[0035] When this single power supply receives fault information from other single power supplies, the receiving optical fiber head U1 will output a high level at its No. 6 terminal because it cannot receive the optical signal, which makes the No. 1 transistor V3 turned off and the No. 2 transistor V5 turned on; after the No. 1 transistor V3 is turned off, the optical coupler V4 is also turned off, so that 24V cannot be sent to the fault receiving point I0.1 of PLC 2. The fault receiving point I0.1 receives a low level, and the fault information is transmitted to the local PLC 2. At the same time, after the No. 2 transistor V5 is turned on, the potential between the third resistor R3 and the fourth resistor R4 is forcibly pulled to 0V through the normally closed points 4 and 6 of the relay K1 and XS1 (short circuit). At this time, no matter whether the fault output point Q0.1 of PLC2 is at a low level, the sending optical fiber head U2 will not emit light, so that the fault chain protection device will directly pass the received fault information to the next single power supply through the hardware circuit, bypassing the processing of PLC 2.
[0036] Fault retention principle: when a fault occurs, since the receiving fiber optic head U1 cannot receive the optical signal, its port 6 outputs a high level, so that the second transistor V5 is always turned on, and the potential between the first resistor R3 and the second resistor R4 is forcibly pulled to 0V, so that the sending fiber optic head U2 cannot emit light. The fault is therefore maintained until there is a reset message. Due to the attraction of relay K1, the normally closed contacts 4 and 6 are disconnected, and the potential between the first resistor R3 and the second resistor R4 can be maintained, so that the system fault chain information can be eliminated.
[0037] Figure 3 The system diagram of the fault interlocking protection device in the high-power special power supply system of the present invention is shown. When the equipment of the 1# single power supply fails, the PLC 2 of the 1# power supply processes the fault information and sends the fault information to the fault sending circuit 4 of the 1# power supply through its fault output point. The fault sending circuit 4 converts the fault information into an optical signal and sends it to the fault receiving circuit 3 of the 2# single power supply. The fault receiving circuit 3 converts the received optical information into electrical information and sends it to the 2# power supply PLC2 for processing. At the same time, the signal is latched through the fault holding circuit 5 and sent to the fault sending circuit 4. The fault sending circuit 4 transmits the fault information to the next power supply. In this way, even if the PLC 2 of the 2# power supply does not send the fault information, the fault information still continues to be transmitted through the hardware circuit, directly skipping the processing of the PLC 2 and the controller until all power supplies receive the fault information. After the fault is eliminated, the host computer is used to make the main controller 1 send a reset signal to the slave controller 7 of each power supply uniformly, and the slave controller 7 sends a reset signal to the corresponding PLC, and the PLC then sends a reset signal to the corresponding fault interlocking protection device, so that the entire fault interlocking protection device is restored to the initialization state.
Claims
1. A PLC-based high-power special power supply fault interlocking protection device, characterized by: The invention comprises a main controller (1) and a slave controller (7) connected to the main controller (1), wherein the slave controller (7) is connected to a PLC (2), and is characterized in that: a fault input point of the PLC (2) is connected to a fault receiving circuit (3), a reset output point of the PLC (2) is connected to a fault reset circuit (6), the other end of the fault receiving circuit (3) is connected to an external fault transmission optical fiber, a power interface of the fault receiving circuit (3) is connected to a voltage conversion circuit, the voltage conversion circuit is connected to a power indication circuit, and the power indication circuit is connected to a 24V power supply; a fault output point of the PLC (2) is connected to a fault sending circuit (4), the fault sending circuit (4) is connected to an external fault transmission optical fiber, the external fault transmission optical fiber is connected to a next fault receiving circuit (3), and a fault holding circuit (5) is connected between the fault receiving circuit (3) and the fault sending circuit (4): The power indication circuit comprises an eighth resistor (R8) and a first light-emitting diode (V2) connected in series, and the eighth resistor (R8) and the first light-emitting diode (V2) are connected in series and are respectively connected in parallel with a first filter capacitor (C01) and a second filter capacitor (C03) on a 24V power supply, and the eighth resistor (R8) is connected to the positive electrode of the 24V power supply, and the first light-emitting diode (V2) is connected to the negative electrode of the 24V power supply; The voltage conversion circuit comprises a first resistor (R1) connected to the positive electrode of a 24V power supply, the first resistor (R1) is connected to a second resistor (R2), the second resistor (R2) is connected to the cathode of a voltage-stabilizing diode (V1), the anode of the voltage-stabilizing diode (V1) is connected to the negative electrode of the 24V power supply, and a 5V power supply output terminal is connected between the second resistor (R2) and the voltage-stabilizing diode (V1); The fault receiving circuit (3) comprises a receiving optical fiber head (U1), a VCC terminal of the receiving optical fiber head (U1) is connected to a fifth resistor (R5), one end of the fifth resistor (R5) is also connected to the positive electrode of a 5V power supply, and the other end of the fifth resistor (R5) is connected to an OUT terminal of the receiving optical fiber head (U1); a first capacitor (C1) is also connected in parallel between the VCC terminal and the GND terminal of the receiving optical fiber head (U1), and a first diode (V6) and a second capacitor (C1) are also connected in parallel between the OUT terminal of the receiving optical fiber head (U1) and a ground wire. (C2), and the anode of the first diode (V6) is grounded, the OUT terminal of the receiving optical fiber head (U1) is also connected to the base of the first transistor (V3), the collector of the first transistor (V3) is grounded, the emitter of the first transistor (V3) is connected to the No. 2 terminal of the optical coupler (V4), the No. 1 terminal of the optical coupler (V4) is connected in series with the sixth resistor (R6) and then connected to the positive electrode of the 5V power supply, the No. 4 terminal of the optical coupler (V4) is connected to the positive electrode of the 24V power supply, and the No. 3 terminal of the optical coupler (V4) is the output point of the fault signal, which is connected to the fault input point of the PLC (2); The fault transmission circuit (4) comprises a transmission optical fiber head (U2), terminals 2, 6, and 7 of the transmission optical fiber head (U2) are connected to a fourth resistor (R4), the fourth resistor (R4) is connected to one end of a third resistor (R3), the other end of the third resistor (R3) is connected to a fault output point of the PLC (2), terminal No. 3 of the transmission optical fiber head (U2) is connected to an anode of a second light-emitting diode (V7), and a cathode of the second light-emitting diode (V7) is grounded; The fault holding circuit (5) comprises a seventh resistor (R7) connected to the OUT terminal of the receiving optical fiber head (U1), the other end of the seventh resistor (R7) is connected to the base of the second transistor (V5), the emitter of the second transistor (V5) is grounded, and the collector of the second transistor (V5) is connected to the fault reset circuit (6); The fault reset circuit (6) is a relay (K1), the normally closed contact 4 of the relay (K1) is connected to the collector of the second transistor (V5), the normally closed contact 6 of the relay (K1) is also connected between the third resistor (R3) and the fourth resistor (R4) through the XSI terminal, the terminal 1 of the relay (K1) is connected to the reset output point of the PLC (2), the terminal 16 of the relay (K1) is grounded, the normally open contact 13 of the relay (K1) is connected to the positive pole of the 24V power supply, and the normally open contact 9 of the relay (K1) is connected to the other end of the third resistor (R3); The relay (K1) is energized after receiving the reset signal, so that the normally open contacts 13 and 9 of the relay (K1) are closed and the normally closed contacts 4 and 6 are opened; When the reset signal disappears, the relay (K1) returns to its initial state, the normally open contacts 13 and 9 are disconnected, and the normally closed contacts 4 and 6 are closed; When a fault occurs, since the receiving fiber optic head (U1) cannot receive the optical signal, its OUT terminal outputs a high level, causing the second transistor (V5) to be turned on all the time, forcing the potential between the third resistor (R3) and the fourth resistor (R4) to be pulled to 0V, making the transmitting fiber optic head (U2) unable to emit light, and the fault is thus maintained.
2. According to the PLC-based high-power special power supply fault interlocking protection device of claim 1, it is characterized by: The PLC (2) is communicatively connected to the master controller (1) via the slave controller (7).
Citation Information
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