Power System

Abstract

The present invention provides a power supply system and a power supply device with high reliability. The power supply system (1) includes at least two power supply devices (10) that supply current to a load (70). The power supply device (10) includes: a converter (20) that supplies current to the load (70); an FET (40) that is connected in series between the converter (20) and the load (70); a current detection device (Rs) that detects the current flowing between the converter (20) and the load (70); and a droop characteristic control unit (32) that causes the output voltage of the converter (20) to droop at a droop rate determined based on the magnitude of the load current flowing from the converter (20) to the load (70). The droop rate when the load current is included in the first current interval is greater than the droop rate when the load current is included in the second current interval and the third current interval respectively. The second current interval includes a current smaller than the current included in the first current interval. The third current interval includes a current larger than the current included in the first current interval.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Japanese Patent Application No. 2019-53174 (filed on March 20, 2019), the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] The invention relates to a power supply system and a power supply device. Background Art

[0004] Conventionally, as a power supply device used in a duplicated power supply, there is known a power supply device in which the output voltage decreases as the current output to a load increases (see, for example, Patent Document 1).

[0005] Prior art literature

[0006] Patent document 1: Japanese Patent Publication No. 8-289468

[0007] When a duplicate power supply is configured by the power supply device disclosed in Patent Document 1, the outputs of the two power supply devices are directly connected to each other. If a short circuit occurs in one of the power supply devices, the voltage supplied to the load may drop. Summary of the invention

[0008] In view of the above problems, an object of the present invention is to provide a power supply system and a power supply device having high reliability.

[0009] A power supply system of various embodiments includes at least two power supply devices that supply current to a load. The power supply device includes: a converter that supplies current to the load; a FET that is connected in series between the converter and the load; a current detection device that detects the current flowing between the converter and the load; and a droop characteristic control unit that causes the output voltage of the converter to droop at a droop rate determined based on the magnitude of the load current flowing from the converter to the load. The droop rate when the load current is included in the first current interval is greater than the droop rate when the load current is included in the second current interval and the third current interval, respectively. The second current interval includes a current that is smaller than the current included in the first current interval. The third current interval includes a current that is larger than the current included in the first current interval. Thus, by increasing the droop rate in a specified current interval, it is easy to achieve a balance of the load current. As a result, the reliability of the power supply system is improved.

[0010] In a power supply system of one embodiment, the power supply device may further include a reverse current limiting device, which limits the reverse current flowing from the load to the converter at a reverse current limiting reference value. Thus, even if a short circuit occurs in one power supply device, other power supply devices in operation are not likely to stop in a chain reaction. As a result, the reliability of the power supply system is improved.

[0011] In a power supply system of one embodiment, the reverse current limiting device may include a cut-off unit, which inputs a signal based on a comparison result of the reverse current detection result of the current detection device and the reverse current limiting reference value into the gate of the FET. As a result, the reverse current is limited to within a specified value. As a result, the reliability of the power supply system is improved.

[0012] In a power supply system of one embodiment, the reverse current limiting device may include a voltage monitoring unit, which inputs a signal based on a comparison result of the sum of the source potential of the FET and the monitoring bias voltage with the drain potential of the FET to the gate of the FET. Thus, the FET is cut off when the reverse current exceeds a specified value. As a result, the loss in the FET caused by the reverse current is almost zero.

[0013] In a power supply system of one embodiment, the converter may have a rated current. The rated current may be set to a value greater than the sum of the maximum load current and the reverse current limit reference value. Thus, even if a reverse current flows in one power supply device, the other power supply devices in operation are not likely to stop in a chain reaction. As a result, the reliability of the power supply system is improved.

[0014] In one embodiment of the power supply system, a resistance element may be connected in series on at least one of the paths that bridge the path for current to flow from the converter to the load and the ground point. Thus, the short-circuit current flowing due to a short-circuit fault in the power supply device is limited. As a result, the reliability of the power supply system is improved.

[0015] In a power supply system of one embodiment, the first current interval may include a current of 50% of the maximum load current. Thus, when two power supply devices are connected to a load, a balance of currents output by each power supply device is achieved. By achieving a balance of currents, the difference in heat generation in each power supply device is reduced. As a result, the difference in the life of components of each power supply device is reduced, thereby improving the reliability of the power supply system.

[0016] In a power supply system of one embodiment, the droop rate of the load current when it is included in the fourth current interval may be greater than the droop rate of the load current when it is included in the fifth current interval and the third current interval, respectively; the fourth current interval includes a current larger than the current included in the third current interval; the fifth current interval includes a current larger than the current included in the fourth current interval; the first current interval includes a current represented by the product of the reciprocal of a first specified number and the maximum load current; and the fourth current interval includes a current represented by the product of the reciprocal of a second specified number obtained by subtracting 1 from the first specified number and the maximum load current. Thus, in any case where all the power supply devices of the first specified number connected to the load are in operation, or in any case where one of the power supply devices fails, it is easy to achieve a balance of the current output by the operating power supply devices. As a result, the reliability of the power supply system is improved.

[0017] A power supply device in various embodiments includes: a converter that supplies current to a load; a FET that is connected in series between the converter and the load; a current detection device that detects the current flowing between the converter and the load; and a droop characteristic control unit that causes the output voltage of the converter to droop at a droop rate determined based on the magnitude of the load current flowing from the converter to the load. The droop rate when the load current is included in the first current interval is greater than the droop rate when the load current is included in the second current interval and the third current interval, respectively. The second current interval includes a current that is smaller than the current included in the first current interval. The third current interval includes a current that is larger than the current included in the first current interval. Thus, by increasing the droop rate in a specified current interval, it is easy to achieve a balance in the load current. As a result, the reliability of the power supply device is improved.

[0018] According to the present invention, a power supply system and a power supply device having high reliability are provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 3 is a circuit diagram showing a power supply system of Comparative Example 1.

[0020] Figure 2 This is a block diagram showing a configuration example of a power supply system according to an embodiment.

[0021] Figure 3 This is a block diagram showing a configuration example of a power supply device according to an embodiment.

[0022] Figure 4 This is a block diagram showing a configuration example of a converter.

[0023] Figure 5 It is a block diagram showing a configuration example of a current detection unit.

[0024] Figure 6 This is a graph showing an example of droop characteristics of a power supply device according to an embodiment.

[0025] Figure 7 : is a graph showing the droop characteristics of the power supply device of Comparative Example 2.

[0026] Figure 8 This is a block diagram showing a configuration example of a voltage monitoring unit.

[0027] Fig. 9 It is a block diagram showing a configuration example of a power supply system according to another embodiment.

[0028] Fig.10 This is a graph showing an example of droop characteristics of a power supply device according to another embodiment.

[0029] Description of Reference Numerals

[0030] 1. Power System

[0031] 10 (10a, 10b, 10c) power supply device

[0032] 11 (11a, 11b, 11c) output terminal

[0033] 12 (12a, 12b, 12c) grounding terminal

[0034] 20 Converter

[0035] 21 Converter output terminal

[0036] 22 Converter ground terminal

[0037] 23 Feedback terminal

[0038] 24 Control Department

[0039] 25 Error amplifier

[0040] 26 Voltage conversion unit

[0041] 30 Current detection unit

[0042] 32 Droop characteristic control unit

[0043] 34 Cutting section

[0044] 40FET

[0045] 50 Voltage monitoring unit

[0046] 70 Load

[0047] 80 grounding point DETAILED DESCRIPTION

[0048] The embodiment of the present invention will be described in comparison with a comparative example.

[0049] (Comparative Example)

[0050] <Comparative Example 1>

[0051] like Figure 1 As shown, the power supply system 90 of Comparative Example 1 includes a power supply device 91 and a power supply device 92. The power supply device 91 includes a converter 911, a butt diode 912, an output terminal 913, and a ground terminal 914. The power supply device 92 includes a converter 921, a butt diode 922, an output terminal 923, and a ground terminal 924. Hereinafter, the matters common to the power supply devices 91 and 92 will be described only for the power supply device 91.

[0052] The power supply devices 91 and 92 are connected in parallel with the load 70. One end of the load 70 is connected to the output terminals 913 and 923. The other end of the load 70 is connected to the ground point 80 and the ground terminals 914 and 924. The power supply system 90 supplies the load 70 with a current obtained by adding the current output from the output terminal 913 of the power supply device 91 and the current output from the output terminal 923 of the power supply device 92. The current supplied to the load 70 may flow to the ground point 80 or may be fed back to the power supply devices 91 and 92 through the ground terminals 914 and 924.

[0053] The butt diodes 912 and 922 are Schottky barrier diodes with a small forward voltage drop. The power supply devices 91 and 92 are connected in parallel with the load 70 via the butt diodes 912 and 922. The butt diode 912 prevents current from flowing from the output terminal 913 to the converter 911. The butt diode 922 prevents current from flowing from the output terminal 923 to the converter 921.

[0054] The converter 911 controls the voltage between the output terminal 913 and the ground terminal 914. The converter 921 controls the voltage between the output terminal 923 and the ground terminal 924. The converters 911 and 921 control the voltages of the output terminals 913 and 923 to balance the magnitudes of the currents supplied to the load 70 by the power supply devices 91 and 92, respectively, and supply the current required by the load 70.

[0055] If one of the power supply devices 91 and 92 stops due to a failure or the like, the other supplies all the current required by the load 70. For example, if the power supply device 91 stops, the power supply device 92 supplies all the current required by the load 70. Thus, even if one of the power supply devices 91 and 92 stops, the power supply system 90 as a whole can maintain the power supply to the load 70. That is, the power supply system 90 is redundant. In this case, the power supply devices 91 and 92 need to each have the ability to supply all the current required by the load 70.

[0056] When the power supply device 91 is connected to the load 70 via the docking diode 912 as in the power supply system 90, the loss in the docking diode 912 becomes large. For example, when the forward voltage drop of the docking diode 912 is 0.4V (volt), since a current of 10A (ampere) flows as the current supplied to the load 70, the loss in the docking diode 912 also reaches 4W (watt). In this case, the power supply device 91 needs to have a heat dissipation component such as a large heat sink. The heat dissipation component hinders the miniaturization of the power supply device 91. In addition, the heat generated in the docking diode 912 increases the temperature of electronic components such as electrolytic capacitors, thereby shortening the life of the electronic components. As a result, the reliability of the power supply device 91 is reduced.

[0057] The power supply device 91 controls the voltage at the upstream stage of the docking diode 912. In this case, the docking diode 912 is located outside the feedback loop of the feedback control of the power supply device 91. Therefore, the converter 911 cannot compensate for the current-voltage characteristics or temperature characteristics of the docking diode 912 or individual deviations of these characteristics. Since the characteristics of the docking diode 912 cannot be compensated, the error of the voltage output by the power supply device 91 becomes large. As a result, it is difficult for the power supply device 91 including the docking diode 912 to control the voltage. In other words, the voltage regulation characteristics of the power supply device 91 including the docking diode 912 are poor.

[0058] The forward voltage drop of the docking diode 912 generally has a negative temperature characteristic. For example, in a Schottky barrier diode having a forward voltage drop of approximately 0.4V, the difference in forward voltage drop between a low temperature environment and a high temperature environment is sometimes approximately 0.2 to 0.3V. For example, in the case where the power supply device 91 outputs a voltage of 5V, if the forward voltage drop changes by 0.2V to 0.3V due to the temperature characteristic, the output voltage changes by 4% to 6% due to the change. The regulation standard of a general power supply is approximately ±5%. Therefore, in a power supply that includes a factor in which the output voltage changes by 4% to 6%, it is difficult to control the regulation within the standard. In order to control the regulation within the standard, it is necessary to adjust the voltage setting with high precision by using a trimming resistor or the like. High-precision adjustment leads to increased manufacturing costs.

[0059] The higher the temperature of the docking diode 912, the lower the forward voltage drop of the docking diode 912 becomes due to the negative temperature characteristic. Since the forward voltage drop of the docking diode 912 becomes lower, the voltage output by the power supply device 91 becomes higher. Since the voltage output by the power supply device 91 becomes higher, the current output by the power supply device 91 to the load 70 increases. The increase in the current output by the power supply device 91 causes the temperature of the docking diode 912 to rise. As described above, positive feedback is sometimes applied to the temperature of the docking diode 912. Therefore, in the structure connected to the load 70 via the docking diodes 912 and 922, the balance between the current output by the power supply device 91 to the load 70 and the current output by the power supply device 92 to the load 70 is easily destroyed.

[0060] <Comparative Example 2>

[0061] As a comparative example 2, the case where the power supply devices 91 and 92 do not have the butt diodes 912 and 922 is described. In comparative example 2, the current-voltage characteristics of the power supply devices 91 and 92 have a droop characteristic. The droop characteristic refers to a characteristic that the larger the current output to the load 70, the lower the output voltage. When the power supply devices 91 and 92 are connected in parallel with the load 70, even if the butt diodes 912 and 922 are not provided, the droop characteristic makes it easy to balance the currents output by the power supply devices 91 and 92, respectively. However, since there are no butt diodes 912 and 922, for example, when a short-circuit failure occurs in the power supply device 91, the current of the power supply device 92 flows into the short-circuit portion of the power supply device 91. In this case, the power supply system 90 as a whole cannot maintain the power supply to the load 70 because the current supplied from the power supply device 92 to the load 70 is insufficient or the voltage output by the power supply device 92 drops.

[0062] <Comparative Example 3>

[0063] As Comparative Example 3, a structure in which power supply devices 91 and 92 each output a current that matches the current output by the other device is described. In Comparative Example 3, power supply device 91 needs to have a circuit for detecting the current output by the other device and a circuit for controlling the output current based on the detection result. This structure increases the cost of the device.

[0064] <Comparative Example 4>

[0065] As a comparative example 4, the structure in which the power supply devices 91 and 92 are equipped with an MCU (Micro Control Unit) is described. In comparative example 4, one of the power supply devices 91 and 92 connected in parallel with the load 70 functions as a master device, and the other functions as a slave device. The MCU of the device that functions as the master device outputs control information to the MCU of the device that functions as the slave device based on the detection results of the voltage and current output by each device. As a result, the MCU can balance the current output by each device and reduce the voltage variation. However, the structure using the MCU needs to have a structure for detecting the voltage and current output by each device or for communicating. In addition, it is necessary to have a program to operate the MCU. Therefore, the use of the MCU leads to an increase in the cost of the device.

[0066] <Conclusion>

[0067] As described above, the configurations of the comparative examples have the following problems: it is difficult to balance the currents output by the power supply devices 91 and 92 or there is a vulnerability to short-circuit failure. These problems reduce the reliability of the power supply system 90 and the power supply device 91.

[0068] Therefore, the present invention describes a power supply device and a power supply system with high reliability.

[0069] (One embodiment of the present invention)

[0070] like Figure 2 As shown, a power supply system 1 according to an embodiment includes power supply devices 10a and 10b. The power supply devices 10a and 10b are referred to as power supply devices 10 when no distinction is required.

[0071] The power supply device 10a includes an output terminal 11a and a ground terminal 12a. The power supply device 10b includes an output terminal 11b and a ground terminal 12b. The output terminals 11a and 11b are referred to as output terminals 11 when there is no need to distinguish them. The ground terminals 12a and 12b are referred to as ground terminals 12 when there is no need to distinguish them.

[0072] The power supply devices 10a and 10b are connected in parallel with the load 70. One end of the load 70 is connected to the output terminals 11a and 11b. The other end of the load 70 is connected to the ground point 80 and the ground terminals 12a and 12b. The current output from the output terminal 11a of the power supply device 10a is represented by I1. The current output from the output terminal 11b of the power supply device 10b is represented by I2. The power supply system 1 supplies the load 70 with a current obtained by adding the current output from the output terminal 11a of the power supply device 10a and the current output from the output terminal 11b of the power supply device 10b. That is, the power supply system 1 supplies the load 70 with a current represented by I1+I2. The current supplied to the load 70 may flow to the ground point 80, or may be fed back to the power supply devices 10a and 10b through the ground terminals 12a and 12b.

[0073] The following description will be given on the assumption that two power supply devices 10 are connected in parallel with the load 70. However, three or more power supply devices 10 may be connected in parallel with the load 70.

[0074] When two power supply devices 10 are connected in parallel to the load 70, even if one power supply device 10 fails, the other power supply device 10 supplies power to the load 70, so the power supply system 1 as a whole continues to supply power to the load 70. In a normal state where both power supply devices 10 are operating, the current output by each power supply device 10 can be controlled to 50% of the current required by the load 70. Thus, the current required by the load 70 is evenly supplied from the two power supply devices 10. The current output by each power supply device 10 is called the load current I L The maximum current required by the load 70 is referred to as the maximum load current. When the load 70 requires the maximum load current, each power supply device 10 controls the load current I L The sum of becomes the maximum load current. In this embodiment, it is assumed that the load 70 requires the maximum load current.

[0075] like Figure 3 As shown, the power supply device 10 includes a converter 20 , a current detection unit 30 , a FET 40 , and a voltage monitoring unit 50 .

[0076] The converter 20 has a converter output terminal 21, a converter ground terminal 22, and a feedback terminal 23. The converter 20 outputs a load current I from the converter output terminal 21 to the output terminal 11. L The current detection unit 30 and the FET 40 are connected in series between the converter output terminal 21 and the output terminal 11. The load current I output from the converter output terminal 21 L The current flows through the current detection unit 30 and the FET 40 and is output from the output terminal 11 to the load 70. That is, the power supply device 10 outputs the load current I from the output terminal 11 connected to one end of the load 70. L .

[0077] The power supply device 10 outputs an output voltage V between the output terminal 11 and the ground terminal 12. out . Output voltage V out The voltage outputted from the converter 20 between the converter output terminal 21 and the converter ground terminal 22 minus the load current I flowing through the current detection unit 30 and the FET 40. L The voltage of the voltage drop caused by the converter 20 is also referred to as the converter voltage V CONV The converter 20 controls the converter voltage V based on the signal at the input feedback terminal 23. CONV .

[0078] The current detection unit 30 detects the load current I flowing from the converter output terminal 21 to the output terminal 11. L The current detection unit 30 is based on the load current I L The detection result generates a current signal I input to the feedback terminal 23. D As described later, the converter 20 converts the input current signal I D Feedback is the converter voltage V CONV control.

[0079] FET40 receives power from the power supply indicated by VCC to be driven. FET40 controls the current flowing between the converter output terminal 21 and the output terminal 11 based on the signal output by the current detection unit 30. FET40 is an n-channel MOSFET (Metal Oxide Silicon FET), but is not limited to this. FET40 has a body diode. FET40 is connected so that the forward direction of the body diode is connected to the load current I L The direction of the current flowing from the converter 20 to the load 70 is the same. The FET 40 is also called a butt FET.

[0080] The voltage monitoring unit 50 detects the voltage across both ends of the FET 40. The voltage monitoring unit 50 controls the switching of the switching element Q14 based on the detection result. When the switching element Q14 is turned off, the source and gate of the FET 40 are short-circuited.

[0081] like Figure 4 As shown, the converter 20 includes a control unit 24, an error amplifier 25, and a voltage converter 26. The converter 20 receives an external power supply V IN The supplied power is converted into a load current I L and the converter voltage V CONV Determine the DC power.

[0082] The voltage conversion unit 26 includes a switch element Q1, a diode D1, an inductor L1, and a capacitor C1. The switch element Q1 is an n-channel MOSFET, but is not limited to this. The drain of the switch element Q1 is connected to the external power supply V IN Connection. External power supply V IN It is shown as a DC power supply, but it can also be an AC power supply. The source of the switching element Q1 is connected to the cathode of the diode D1 and one end of the inductor L1. The gate of the switching element Q1 is connected to the control unit 24. The other end of the inductor L1 is connected to one end of the capacitor C1. The anode of the diode D1 and the other end of the capacitor C1 are connected to the ground point 80.

[0083] The switch element Q1 switches the switch based on the control signal from the control unit 24, thereby switching the external power supply V IN The voltage is converted into an AC signal. The control unit 24 can control the AC signal by PWM (Pulse Width Modulation) or other modulation methods. It is assumed that the switching element Q1 generates a PWM signal controlled by PWM.

[0084] The PWM signal is rectified by the diode D1 and smoothed by the inductor L1 and the capacitor C1 to be converted into a DC voltage having a predetermined voltage level. IN The voltage of the voltage converter 26 is stepped down and outputted as a step-down switching power supply. The larger the duty ratio of the PWM signal, the higher the voltage level of the DC voltage outputted by the voltage converter 26. The voltage converter 26 may also be a step-up switching power supply.

[0085] The node between the inductor L1 and the capacitor C1 of the voltage conversion unit 26 is connected to the converter output terminal 21. The DC voltage output by the voltage conversion unit 26 is the converter voltage V CONV Output from converter output terminal 21 .

[0086] The error amplifier 25 includes an operational amplifier U1, resistors R121, R122 and a reference power supply V ref .

[0087] Resistors R121 and R122 are connected in series between the converter output terminal 21 and the converter ground terminal 22. The node between resistors R121 and R122 is connected to the inverting input terminal of the operational amplifier U1. The voltage at the node between resistors R121 and R122 is proportional to the converter voltage V CONV That is, the converter voltage V CONV The divided voltage is input to the inverting input terminal of the operational amplifier U1. ref Connect to the non-inverting input terminal of the operational amplifier U1.ref The voltage of is input to the non-inverting input terminal of the operational amplifier U1. The output terminal of the operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U1 via a feedback circuit. The feedback circuit may include a resistor and a capacitor.

[0088] The output terminal of the operational amplifier U1 is connected to the control unit 24. The operational amplifier U1 operates so that the voltage of the input inverting input terminal is consistent with the voltage of the input non-inverting input terminal. The operational amplifier U1 outputs to the control unit 24 a signal for making the voltage of the node between the resistor R121 and the resistor R122 consistent with the reference power supply V ref The voltage of the signal is consistent.

[0089] The control unit 24 outputs a control signal for controlling the switching of the switching element Q1 to the gate of the switching element Q1 based on the output of the operational amplifier U1. The control unit 24 can control the converter voltage V by controlling the AC signal output by the switching element Q1 in a PWM manner. CONV The control unit 24 may include a processor such as a CPU (Central Processing Unit). The control unit 24 may control the converter voltage V by executing a predetermined program. CONV .

[0090] When the current signal I is not input to the feedback terminal 23 D In the case of ref The voltage used to control the converter voltage V CONV When the current signal I is input to the feedback terminal 23 D In the case of D Flows into the ground point 80 through the resistor R122. That is, the current signal I D Based on the converter voltage V CONV The currents are superimposed and flow to resistor R122. The current signal I D Also called a superimposed current signal. Since the superimposed current signal flows to the resistor R122, the voltage at the node between the resistor R121 and the resistor R122 rises. Through the operation of the operational amplifier U1 and the control unit 24, the current signal I D The larger the converter voltage V CONV As will be described later, the current detection unit 30 detects the load current I L To determine the current signal I D , so the load current I can be appropriately set L With the converter voltage V CONV The relationship between them.

[0091] like Figure 5As shown, the current detection unit 30 includes a resistor Rs connected in series between the converter output terminal 21 and the FET 40. The resistor Rs detects the load current I L The resistor Rs is also called a current detection device. When the current flows from the converter output terminal 21 to the FET 40, the load current I L The sign of is positive.

[0092] The current detection unit 30 includes a droop characteristic control unit 32. The droop characteristic control unit 32 generates a current signal I based on the voltage across the resistor Rs. D The voltage across the resistor Rs corresponds to the magnitude of the voltage drop caused by the current flowing in the resistor Rs, expressed as Rs and I L The potential of the converter 20 side of resistor Rs is determined by V CONV The potential of the resistor Rs on the FET40 side is represented by V CONV -Rs·I L The potential at each end of the resistor Rs is represented as a potential difference from the ground point 80 .

[0093] The droop characteristic control unit 32 includes operational amplifiers U13B, U13C, and U13D, resistors R135 , R136 , R137 , and R138 , a Zener diode REFN, and a switch element Q139 .

[0094] The end of the resistor Rs on the FET40 side is connected to the non-inverting input terminal of the operational amplifier U13B. The end of the resistor Rs on the converter 20 side is connected to the inverting input terminal of the operational amplifier U13B via the resistor R136, and is connected to the inverting input terminal of the operational amplifier U13B via the Zener diode REFN and the resistor R135. That is, a series circuit of the Zener diode REFN and the resistor R135 and the resistor R136 are connected in parallel between the end of the resistor Rs on the converter 20 side and the inverting input terminal of the operational amplifier U13B. The output terminal of the operational amplifier U13B is connected to the inverting input terminal of the operational amplifier U13B via the resistor R137.

[0095] The operational amplifier U13B controls the output so that the voltage at the inverting input terminal matches the voltage at the non-inverting input terminal. Figure 5 In the example, operational amplifier U13B will output the voltage V B It is controlled to be a value represented by the following formula (1).

[0096] V B =V CONV +R137 / R135 REFN-Rs I L ·{1+R137 / (R135 / / R136)} (1)

[0097] R135 / / R136 represents the parallel resistance value of the resistor R135 and the resistor R136.

[0098] The operational amplifier U13C is connected to the voltage zener diode REFN and the operational amplifiers U13B and U13D, and the lower limit of the voltage input to the non-inverting input terminal of the operational amplifier U13D is clamped to a specified value. The non-inverting input terminal of the operational amplifier U13C is connected to the voltage zener diode REFN. The voltage input to the non-inverting input terminal of the operational amplifier U13C is determined by V CONV -REFN indicates. The inverting input terminal of the operational amplifier U13C is connected to the non-inverting input terminal of the operational amplifier U13D, and is connected to the output terminal of the operational amplifier U13C via a diode. That is, the output terminal of the operational amplifier U13C is connected to the inverting input terminal of the operational amplifier U13C and the non-inverting input terminal of the operational amplifier U13D via a diode. The output terminal of the operational amplifier U13C is also connected to the output terminal of the operational amplifier U13B via a resistor. The diode connected to the output terminal of the operational amplifier U13C is connected so that the direction of current flowing from the output terminal of the operational amplifier U13C becomes the forward direction. By being connected in this manner, the operational amplifier U13C clamps the lower limit of the voltage input to the non-inverting input terminal of the operational amplifier U13D at V CONV -REFN.

[0099] The operational amplifier U13D is connected to the operational amplifiers U13B and U13C, a resistor R138, and a switch element Q139. The switch element Q139 is a p-channel MOSFET, but is not limited thereto. The operational amplifier U13D and the switch element Q139 are based on the load current I L To generate the current signal I D The non-inverting input terminal of the operational amplifier U13D is connected to the output terminals of the operational amplifiers U13B and U13C. The voltage input to the non-inverting input terminal of the operational amplifier U13D is represented by V D The inverting input terminal of the operational amplifier U13D is connected to the converter 20 side of the resistor Rs via the resistor R138, and is connected to the source of the switching element Q139. The output terminal of the operational amplifier U13D is connected to the gate of the switching element Q139. The drain of the switching element Q139 is connected to the feedback terminal 23 of the converter 20. The operational amplifier U13D controls the current signal I flowing from the drain of the switching element Q139 to the feedback terminal 23. D . Current signal I D Based on the load current I L The size of is controlled according to the following three cases 1 to 3.

[0100] (Case 1)

[0101] in I L ≤R137·R136 / {R135·R136+R137·(R135+R136)}×(REFN / Rs) holds true.

[0102] I D =0 (2)

[0103] (Case 2)

[0104] in I L >R137·R136 / {R135·R136+R137·(R135+R136)}×(REFN / Rs), and I L ≤(R135+R137) / {(R135·R136+R137·(R135+R136))×(REFN / Rs)

[0105] I D =[Rs×I L ×{1+R137 / (R135 / / R136)}-R137 / R135×REFN] / R138 (3)

[0106] (Case 3)

[0107] in I L >(R135+R137) / {(R135·R136+R137·(R135+R136))×(REFN / Rs) holds true,

[0108] I D =REFN / R138 (4)

[0109] The load current I will be distinguished between case 1 and case 2 L The value of is also called the first threshold current. The load current I that distinguishes case 2 from case 3 L The value of is also called the second threshold current. According to formula (2), until the load current I L Until the first threshold current is reached, no current signal I is output. D According to formula (3), when the load current I L During the period from being greater than the first threshold current to reaching the second threshold current, the load current I L The more it increases, the current signal I D According to formula (4), when the load current I L When the current is greater than the second threshold current, the current signal I D is a fixed value.

[0110] The converter 20 is based on the current signal I input to the feedback terminal 23. D To control the converter voltage VCONV . Current signal I D The larger the converter voltage V CONV The smaller the load current I L For the case where the converter voltage V is within the range determined by Case 1 CONV No drop. At load current I L For the case where the load current I is within the range determined by Case 2, L The more it increases, the converter voltage V CONV The more the load current I L For the case where the converter voltage V is within the range determined by Case 3 CONV The drop amount is fixed.

[0111] Based on the load current I determined by equations (2) to (4) L With the current signal I D The relationship between the load current I L With the output voltage V out For example, the relationship is determined as Figure 6 The curve graph of Figure 6 In the curve diagram, the horizontal axis represents the load current I L , the vertical axis represents the output voltage V out The curve represented by the Typ characteristic represents the typical current-voltage characteristic based on the configuration of this embodiment. The curves represented by the Max deviation characteristic and the Min deviation characteristic represent the upper and lower limits of the current-voltage characteristic assumed within the deviation range that the parameters of the FET or operational amplifier etc. may have in the configuration of this embodiment. Below, the curve represented by the Typ characteristic represents the current-voltage characteristic of this embodiment.

[0112] The rated current is set as a specification of the power supply device 10. The rated current indicates the upper limit current at which the power supply device 10 can operate stably. That is, when the power supply device 10 outputs a current below the rated current, the operation of the power supply device 10 is stable. On the other hand, when the power supply device 10 outputs a current exceeding the rated current, the operation of the power supply device 10 may be unstable. Figure 6 The horizontal axis of the curve graph is represented by I rate .

[0113] Assume that even when only one power supply device 10 supplies current to the load 70, the load current I L The upper limit is also the maximum load current. In the power supply device 10, the rated current is set to a value greater than the maximum load current. The rated current may be the same value as the maximum load current. The maximum load current is Figure 6 The horizontal axis of the graph is represented as 100% (I Lmax ). Load current IL The ratio to the maximum load current is also called the duty ratio. Figure 6 The horizontal axis of the curve shows the load current I L The value of also represents the load factor. Each power supply device 10 is controlled so that the load current I L For example, when two power supply devices 10 are connected to the load 70 in parallel, if the load factor of one power supply device 10 is 60%, the load factor of the other power supply device 10 is 40%.

[0114] As a specification of the power supply device 10, an OLP (Over Load Protection) point is set for overload protection of the power supply device 10. L When the voltage becomes larger than the OLP point, the power supply device 10 performs an overcurrent protection operation and stops the power supply to the load 70 .

[0115] The curve ( Figure 6 Typ characteristics) include even if the load current I L Increase, output voltage V out The area where the load current I L The more it increases, the higher the output voltage V out The lower the load current I L The more it increases, the higher the output voltage V out The area where the load current I drops further is also called a droop area. The range of the droop area is indicated by the shadow. It can be said that the droop characteristic control unit 32 controls the load current I in the droop area. L The increase in the output voltage V out The droop area can be distinguished from other areas by the slope of the curve. The slope of the curve represents the output voltage V out The change of load current I L The output voltage V out Relative to the load current I L The ratio of the decrease in the output voltage V to the increase in the output voltage V is also called the droop rate. The slope of the curve in the droop region is greater than the slope of the curve in other regions. That is, in the droop region, the output voltage V out A significant drop.

[0116] exist Figure 6 The slope of the curve changes sharply at two locations. Load current I L The point where the slope starts to increase from zero and changes sharply is indicated as P1. The load current I L Corresponding to the first threshold current. Load current I LThe second point where the slope changes sharply is indicated as P2. The load current I L Corresponding to the second threshold current.

[0117] Figure 6 The horizontal axis of the curve graph is divided into multiple intervals with the first threshold current and the second threshold current as boundaries. The current interval that is larger than the first threshold current and smaller than the second threshold current is the interval that determines the droop area, which is called the first current interval. The current interval that is smaller than the first threshold current is called the second current interval. The current interval that is larger than the second threshold current is called the third current interval. The second current interval contains a current that is smaller than the current contained in the first current interval. The third current interval contains a current that is larger than the current contained in the first current interval. It can be said that the load current I L The droop rate included in the first current interval is greater than the load current I L The droop rates are respectively included in the second current interval and the third current interval.

[0118] In this embodiment, the first threshold current is set to a value smaller than 50% of the maximum load current, but it is not limited to this, and it can be set to any value smaller than the second threshold current. The second threshold current is set to a value larger than 50% of the maximum load current, but it is not limited to this, and it can be set to any value larger than the first threshold current.

[0119] Figure 7 The graph shows the load current I in the configuration of the above-mentioned comparative example 2. L With the output voltage V out relationship. Figure 7 In the curve diagram, the horizontal axis represents the load current I L , the vertical axis represents the output voltage V out The curve indicated as the Typ characteristic shows the typical current-voltage characteristic in Comparative Example 2. The curves indicated as the Max Deviation Characteristic and the Min Deviation Characteristic show the upper and lower limits of the current-voltage characteristic assumed within the range of the possible deviation of the parameters of the FET or the operational amplifier in the configuration of Comparative Example 2. In the comparative example, the curve indicated as the Typ characteristic is from the load current I L When the output voltage V out The point where the slope of the curve changes sharply is a region.

[0120] When two power supply devices 10 and a load 70 are connected in parallel, the load current I LEasy to stabilize in the droop region. In the configuration of Comparative Example 2, the droop region includes a case where the load factor is 0%. In this case, the load factor of the power supply device 10 on one side is stabilized at 0% or a value close to 0%, and is also stabilized at 50%. Assume that the load factor of the power supply device 10 on one side is stabilized at 10%, while the load factor of the power supply device 10 on the other side is stabilized at 90%. That is, in the configuration of Comparative Example 2, the load factor of the power supply device 10 may be unstable. On the other hand, in the configuration of the present embodiment, the droop region is limited to a load factor that is larger than the first threshold current and smaller than the second threshold current. In this case, the load factor of the power supply device 10 is more stable than that of Comparative Example 2. As a result, the power supply device 10 of the present embodiment can increase the load current I L balance.

[0121] When the first threshold current is set to a value smaller than 50% of the maximum load current and the second threshold current is set to a value larger than 50% of the maximum load current, the two power supply devices 10 are controlled so that the load current I L That is, it is easy to obtain the load current I of the two power supply devices 10. L balance.

[0122] exist Figure 6 and Figure 7 In each graph, the horizontal axis represents I Bmax and I Bmin I Bmax Indicates that V out =V B The current flowing at the time. Bmin Indicates that V in the Min deviation characteristic out =V B When two power supply devices 10 connected in parallel with the load 70 output 100% of the maximum load current to the load 70, the current output by each power supply device 10 is between I Bmax and I Bmin That is, I Bmax with I Bmin The difference between I and I represents the deviation of the load factor of the power supply device 10. Bmin To I Bmax The range is also called the current balance deviation range at 100% load. Bmax with I Bmin The smaller the difference is, the smaller the load factor deviation of the power supply device 10 is. Since the load factor deviation is small, it is easy to increase the load current I L The load rate deviation in the current-voltage characteristic of the present embodiment is smaller than that in the current-voltage characteristic of the comparative example 2. As a result, the power supply device 10 of the present embodiment can easily increase the load current I Lbalance.

[0123] exist Figure 6 In the drooping area of ​​the curve, the steeper the slope of the curve, the higher the I Bmax with I Bmin That is, the greater the droop rate, the smaller the load factor deviation can be.

[0124] By balancing the load rates of the two power supply devices 10, the deviation of the heat generated inside each power supply device 10 can be reduced. The greater the heat generated by the power supply device 10, the shorter the life of the aluminum electrolytic capacitor according to the Arrhenius law or the time until a component with a life such as an optical coupler fails. Therefore, by balancing the load rates of the two power supply devices 10, the time until at least one of the two power supply devices 10 fails can be extended. As a result, the reliability of the power supply system 1 is improved.

[0125] The power supply device 10 of this embodiment does not include the butt-joint diode 912 of Comparative Example 1 but includes FET 40. The loss caused by the on-resistance of the FET is lower than the loss caused by the voltage drop of the diode. For example, if the on-resistance of the FET 40 is 5 mΩ, the load current I L The loss is 0.5W when the current is 10A. On the other hand, if the voltage drop in the butt diode 912 of Comparative Example 1 is 0.4V, the loss is 4W when the current output by the power supply device 91 is 10A. That is, the power supply device 10 of this embodiment can reduce the loss by including the FET 40. The reduction in loss eliminates the need for heat dissipation components such as a heat sink and helps improve reliability. As a result, the power supply device 10 can be miniaturized and the reliability can be improved.

[0126] In this embodiment, since the on-resistance of the FET 40 is low, the voltage drop in the FET 40 becomes low. That is, even if the output voltage V is controlled based on the detection result of the previous stage voltage of the FET 40, out Even if there is a change in the on-resistance of FET40 due to temperature characteristics or a deviation in on-resistance caused by individual differences in FET40, the output voltage V out The change of the output voltage V caused by the temperature characteristic of the butt diode 912 is also smaller than out Due to the change of output voltage V out The change is small, so the output voltage V out The adjustment of the output voltage V can be easily controlled within the standard. As a result, the output voltage V of the power supply device 10 can be omitted when it is assembled. out This can reduce product costs.

[0127] The on-resistance of FET40 generally has a positive temperature characteristic. The butt diode 912 of Comparative Example 1 has a negative temperature characteristic, so positive feedback is applied to the increase in the current output by the power supply device 91. As a result, the load balance may be unstable or deteriorated. According to the power supply device 10 of this embodiment, since the on-resistance of FET40 has a positive temperature characteristic, the load balance is not stable or deteriorated. L As a result, the load balance is easily stabilized.

[0128] like Figure 5 As shown, the current detection unit 30 includes a cut-off unit 34. The cut-off unit 34 includes: an operational amplifier U13A, resistors R131, R132 and a voltage stabilizing diode REFP. When the power supply device 10 operates normally, the load current I L The current flows from the converter 20 to the FET 40. In this case, the potential of the resistor Rs on the converter 20 side is higher than the potential of the resistor Rs on the FET 40 side.

[0129] Assuming that a short-circuit failure occurs inside converter 20, if FET 40 is turned on, current flows from FET 40 to converter 20 in resistor Rs. In this case, the potential of resistor Rs on the converter 20 side is lower than the potential of resistor Rs on the FET 40 side.

[0130] The non-inverting input terminal of the operational amplifier U13A is connected to the cathode side of the voltage zener diode REFP via the resistor R131, and is connected to the converter 20 side of the resistor Rs via the resistor R132. The voltage input to the non-inverting input terminal of the operational amplifier U13A is as follows: CONV The voltage of the voltage-dividing diode REFP by resistors R131 and R132 is added. The inverting input terminal of the operational amplifier U13A is connected to the FET40 side of the resistor Rs. The voltage input to the inverting input terminal of the operational amplifier U13A is V CONV -Rs·I L The output terminal of the operational amplifier U13A is connected to the inverting input terminal via a feedback circuit including a resistor and a capacitor, and is connected to the gate of the FET 40 .

[0131] When the power supply device 10 operates normally, the voltage of the non-inverting input terminal of the input operational amplifier U13A is higher than the voltage of the input inverting input terminal. Therefore, the output of the operational amplifier U13A is assigned a positive value, so that the FET 40 is turned on. Assuming that a short circuit fault occurs inside the converter 20, the operational amplifier U13A limits the current flowing from the FET 40 to the converter 20 to a value below a specified value. The current flowing from the FET 40 to the converter 20 is also called a reverse current. The upper limit of the reverse current limited by the operational amplifier U13A is also called the reverse current limit value I bk I bk The sign of is negative when the current flows from the FET 40 to the converter 20. Based on the virtual short circuit between the non-inverting input terminal and the inverting input terminal of the operational amplifier U13A, I bk It is represented by the following formula (5).

[0132] I bk ={-REFP×R132 / (R131+R132)} / Rs (5)

[0133] The operational amplifier U13A can control the reverse current to I by controlling the voltage between the gate and source of FET40. bk If the factor causing the reverse current to flow to the resistor Rs is temporary, the FET 40 is required to return to the on state again when the factor disappears. According to the structure of the operational amplifier U13A limiting the reverse current, the FET 40 automatically returns to the on state.

[0134] Hypothesis I bk When the absolute value of is too large, when the reverse current flows in one power supply device 10, the other power supply device 10 needs to output the load current I L The current added to the reverse current. Therefore, I bk The absolute value of and the maximum load current must be below the rated current. The relationship is expressed by the following formula (6).

[0135] |I bk |+ I Lmax ≤I rate (6)

[0136] In other words, when the power supply device 10 satisfying equation (6) is connected in parallel with the load 70, even if a reverse current flows in one of the power supply devices 10, the operation of the entire power supply system 1 can be maintained.

[0137] like Figure 8As shown, the voltage monitoring unit 50 includes an operational amplifier U14 and resistors R141, R142, and R143. The voltage monitoring unit 50 is connected to the switching element Q14. The switching element Q14 is an n-channel MOSFET, but is not limited to this. The source of the switching element Q14 is connected to the source of the FET40. The drain of the switching element Q14 is connected to the gate of the FET40. The gate of the switching element Q14 is connected to the output terminal of the operational amplifier U14. When the output terminal of the operational amplifier U14 outputs a voltage greater than the threshold voltage to the gate of the switching element Q14, the switching element Q14 becomes conductive. When the switching element Q14 becomes conductive, the source and gate of the FET40 are short-circuited. The voltage monitoring unit 50 limits the reverse current by controlling the state of the switching element Q14.

[0138] The non-inverting input terminal of the operational amplifier U14 is connected to the drain of the FET40 via a resistor R143. The voltage input to the non-inverting input terminal of the operational amplifier U14 is the voltage of the drain of the FET40. The inverting input terminal of the operational amplifier U14 is connected to the source of the FET40 via a resistor R142, and to the Zener diode REFP (refer to FIG. 141 ) via a resistor R141. Figure 5 ) is connected to the cathode of the input operational amplifier U14. The voltage input to the inverting input terminal of the operational amplifier U14 is a voltage obtained by adding the voltage of the source of the FET40 to the voltage of the voltage-regulating diode REFP divided by the resistors R141 and R142. The voltage obtained by dividing the voltage of the voltage-regulating diode REFP by the resistors R141 and R142 is also called a monitoring bias voltage.

[0139] The operational amplifier U14 can detect the reverse current based on the voltage between the source and the drain of the FET 40. L Flows from the source to the drain of FET40. In this case, the voltage of the source of FET40 is higher than the voltage of the drain. That is, the voltage input to the inverting input terminal of the operational amplifier U14 is higher than the voltage input to the non-inverting input terminal. The voltage output from the output terminal of the operational amplifier U14 to the gate of the switching element Q14 is 0. As a result, the switching element Q14 is turned off.

[0140] Assuming that a short-circuit fault or the like occurs inside the converter 20 and a reverse current flows, the voltage of the source of the FET 40 is lower than the voltage of the drain. When the difference between the voltage of the drain of the FET 40 and the voltage of the source is greater than the voltage obtained by dividing the voltage of the voltage-stabilizing diode REFP by the resistors R141 and R142, the output terminal of the operational amplifier U14 outputs a positive voltage to the gate of the switching element Q14. By inputting a voltage greater than the threshold voltage to the gate of the switching element Q14, the source and gate of the FET 40 are short-circuited. Since the source and gate of the FET 40 are short-circuited, the FET 40 is turned off. As a result, the reverse current flowing to the FET 40 is cut off. When the reverse current is cut off by the FET 40, when the internal voltage applied to the source side of the FET 40 drops due to an internal fault of the converter 20, the output voltage of the other power supply device 10 is applied to the drain side of the FET 40, thereby keeping the FET 40 in the off state.

[0141] The operational amplifier U14 compares the drain voltage of the FET40 with the sum of the source voltage of the FET40 and the monitoring bias voltage, and outputs a signal based on the comparison result to the gate of the switching element Q14. The switching element Q14 controls the resistance value between the source and the gate of the FET40 based on the signal input to the gate. That is, the voltage monitoring unit 50 inputs a signal to the gate of the FET40, which is based on the comparison result of the voltage of the drain of the FET40 with the sum of the voltage of the source of the FET40 and the monitoring bias voltage. As a result, the reverse current is limited.

[0142] Reverse current threshold I that cuts off reverse current Loff It is represented by the following formula (7).

[0143] I Loff =-REFP×{R142 / (R141+R142)} / R on (7)

[0144] Reverse current threshold I Loff It has a positive value when it flows from the source to the drain of FET 40. on represents the on-resistance of the FET 40 .

[0145] When the power supply device 10 operates normally, assuming that the FET 40 is turned off due to noise or the like, the load current I flowing through the FET 40 L However, if I Loff Regardless of circuit deviations, etc., it is always a negative value, and the FET 40 is always restored to the on state.

[0146] In one power supply device 10, there is a reverse current threshold I Loff When the load current IL The current added to the reverse current. Loff If the absolute value of the load current I L The current added to the reverse current may exceed the OLP point. If the current output by the power supply device 10 exceeds the OLP point, the power supply device 10 reduces the output voltage V out In this case, the power supply to the load 70 cannot continue. Loff The sum of the absolute value of and the maximum load current needs to be limited to a current less than the OLP point of the power supply device 10. The relationship is expressed by the following formula (8).

[0147] |I Loff |+I Lmax ≤I OLP2 (8)

[0148] I OLP2 Indicates the current at the OLP point.

[0149] If I Loff If the sum of the absolute value of and the maximum load current is less than the current at the OLP point of the power supply device 10, the power supply device 10 on the side where no reverse current flows will not stop due to the overload protection function. As a result, the power supply system 1 as a whole can continue to supply power to the load 70. In other words, when the power supply device 10 for which equation (8) is established is connected in parallel with the load 70, even if a reverse current flows in one of the power supply devices 10, the operation of the power supply system 1 as a whole is maintained.

[0150] Normally, the operation of the power supply device 10 is ensured by limiting the output of the current of the power supply device 10 to a value below the rated current. However, in formula (8), the output of the current at the OLP point exceeding the rated current is allowed. The reason why this structure is allowed is that even if the current exceeds the rated current, as long as the time for which the current flows is limited, the failure of the power supply device 10 can be avoided.

[0151] In the power supply device 10, when the reverse current exceeds I Loff In the case of FET40 being turned off, the reverse current is cut off, thereby I Loff The time for the current to flow is limited by the size of the current. Thus, during the limited time, a current exceeding the rated current of the power supply device 10 is allowed to be output.

[0152] The configuration in which the voltage monitoring unit 50 and the switching element Q14 are combined may be replaced by a synchronous rectification control IC.

[0153] The function of limiting the reverse current by the voltage monitoring unit 50 and the switch element Q14 and the function of limiting the reverse current by the cut-off unit 34 can replace each other. Therefore, the power supply device 10 can limit the reverse current and improve reliability by including at least one of the structure combining the voltage monitoring unit 50 and the switch element Q14 and the structure of the cut-off unit 34. The structure combining the voltage monitoring unit 50 and the switch element Q14 and the structure of the cut-off unit 34 are also referred to as reverse current limiting devices. The reverse current limit value I bk and the reverse current threshold I Loff Also called the backflow limit reference value.

[0154] When the reverse current is limited by the voltage monitoring unit 50 and the switching element Q14, the FET 40 is in an off state, so that the loss in the FET 40 when a short circuit failure occurs is reduced or the loss is almost close to 0. By reducing the loss in the FET 40, the possibility of chain failure of other power supply devices 10 connected in parallel with the load 70 is reduced.

[0155] When limiting the reverse current by the cutoff unit 34 , by reducing the variation in the zener voltage of the zener diode REFP and the variation in the resistance values ​​of the resistors R131 and R132 , the variation in the limit value of the reverse current can be reduced.

[0156] The operational amplifier U14 may have a grounding portion that is grounded to the ground point 80. When the grounding portion of the operational amplifier U14 is grounded, the operational amplifier U14 outputs the load current I L The path is bridged with the grounding point 80. Not limited to the operational amplifier U14, sometimes the circuit components included in the current detection unit 30 output the load current I of the power supply device 10 L The path and the grounding point 80 are bridged. The load current I of the output power supply device 10 is L The component that bridges the path and the grounding point 80 is also called a bridging component. L The path bridged by the path and the grounding point 80 is also called a bridged path.

[0157] When a short circuit occurs in the bridge component, a short circuit current flows in the bridge path. Figure 8 In the example, if the ground portion of the operational amplifier U14 is short-circuited with the non-inverting input terminal or the inverting input terminal due to an internal failure of the operational amplifier U14, the load current I of the output power supply device 10 is L The path and the grounding point 80 are short-circuited. As a result, the short-circuit current flows from the output load current I L The path flows toward the grounding point 80.

[0158] Here, the non-inverting input terminal of the operational amplifier U14 and the load current I L A resistor R143 is inserted in series between the paths of the current flowing therefrom, and the resistor R143 limits the short-circuit current flowing through the non-inverting input terminal. L A resistor R142 is inserted in series between the paths where the current flows, and the resistor R142 limits the short-circuit current through the inverting input terminal. This is not limited to the example of the operational amplifier U14, and for other bridge components, a resistor element is connected in series on the bridge path, and the resistor element limits the short-circuit current caused by the short-circuit fault of the bridge component.

[0159] By connecting the resistance element in series to the bridge path, the operation of the power supply device 10 can be easily continued. As a result, the reliability of the power supply device 10 is improved.

[0160] As described above, when the power supply device 10 of this embodiment constitutes the power supply system 1 connected in parallel with the load 70, the reliability of the power supply system 1 is improved. The power supply device 10 of this embodiment can realize various functions for improving reliability without using an MCU. By not using an MCU, the device cost can be reduced.

[0161] (Other embodiments)

[0162] like Fig. 9 As shown, the power supply system 1 of another embodiment includes power supply devices 10a, 10b, and 10c. The power supply devices 10a and 10b are Figure 2 The power supply devices 10a, 10b shown are identical. The power supply devices 10a, 10b, 10c are referred to as the power supply device 10 when no distinction is necessary.

[0163] The power supply device 10c includes an output terminal 11c and a ground terminal 12c. The output terminals 11a, 11b, and 11c are referred to as output terminals 11 when there is no need to distinguish them. The ground terminals 12a, 12b, and 12c are referred to as ground terminals 12 when there is no need to distinguish them.

[0164] The power supply devices 10a, 10b, and 10c are connected in parallel with the load 70. One end of the load 70 is connected to the output terminals 11a, 11b, and 11c. The other end of the load 70 is connected to the ground point 80 and the ground terminals 12a, 12b, and 12c. The current output from the output terminal 11a of the power supply device 10a is represented by I1. The current output from the output terminal 11b of the power supply device 10b is represented by I2. The current output from the output terminal 11c of the power supply device 10c is represented by I3. The power supply system 1 supplies the load 70 with a current obtained by adding the current output from the output terminal 11a of the power supply device 10a, the current output from the output terminal 11b of the power supply device 10b, and the current output from the output terminal 11c of the power supply device 10c. That is, the power supply system 1 supplies the load 70 with a current represented by I1+I2+I3. The current supplied to the load 70 may flow to the ground point 80 or may be fed back to the power supply devices 10a, 10b, 10c through the ground terminals 12a, 12b, 12c.

[0165] When three power supply devices 10 are connected in parallel to the load 70, even if one power supply device 10 fails, the other power supply device 10 supplies power to the load 70, so the power supply system 1 as a whole continues to supply power to the load 70. In a normal state where all three power supply devices 10 are operating, the current output by each power supply device 10 can be controlled to 1 / 3 of the current required by the load 70. Thus, the current required by the load 70 is evenly supplied from the three power supply devices 10.

[0166] The load current I of the power supply device 10 in this embodiment L With the output voltage V out For example, the relationship is determined as Fig.10 The curve graph of Fig.10 In the curve diagram, the horizontal axis represents the load current I L , the vertical axis represents the output voltage V out The curve represented by the Typ characteristic represents the typical current-voltage characteristic based on the structure of the present embodiment. The curves represented by the Max deviation characteristic and the Min deviation characteristic represent the upper and lower limits of the current-voltage characteristic assumed within the range of the deviation that the parameters of the FET or operational amplifier etc. may have in the structure of the present embodiment. Below, the curve represented by the Typ characteristic represents the current-voltage characteristic of the present embodiment.

[0167] exist Fig.10 The slope of the curve changes sharply at four locations. Load current I L The point where the slope starts to increase from zero and changes sharply is indicated as P1. The load current I L Corresponding to the first threshold current. Load current I LThe second point where the slope changes sharply is indicated as P2. The load current I L Corresponding to the second threshold current. Load current I L The third point where the slope changes sharply is indicated as P3. The load current I L Corresponding to the third threshold current. Load current I L The fourth point where the slope changes sharply is indicated as P4. The load current I L Corresponding to the fourth threshold current.

[0168] Fig.10 The horizontal axis of the curve graph is divided into a plurality of intervals with the first threshold current to the fourth threshold current as boundaries. A current interval larger than the first threshold current and smaller than the second threshold current is an interval that determines the first droop region, and is referred to as the first current interval. A current interval smaller than the first threshold current is referred to as the second current interval. A current interval larger than the second threshold current and smaller than the third threshold current is referred to as the third current interval. A current interval larger than the third threshold current and smaller than the fourth threshold current is an interval that determines the second droop region, and is referred to as the fourth current interval. A current interval larger than the fourth threshold current is referred to as the fifth current interval. The second current interval contains a current smaller than the current contained in the first current interval. The third current interval contains a current larger than the current contained in the first current interval and smaller than the current contained in the fourth current interval. The fifth current interval contains a current larger than the current contained in the fourth current interval. It can be considered that the load current I L The droop rate included in the first current interval is greater than the load current I L The droop rate is included in the second current interval and the third current interval respectively. It can be considered that the load current I L The droop rate included in the fourth current interval is greater than the load current I L The droop rates are respectively included in the third current interval and the fifth current interval.

[0169] The maximum load current I Lmax When the current output by each power supply device 10 is balanced, the current output by each power supply device 10 is called the ideal balanced current value I B1 The first threshold current is set to be higher than I B1 The second threshold current is set to be smaller than I B1 Large value. B1 It is represented by the following formula (9).

[0170] I B1 = I Lmax / 3 (9)

[0171] exist Fig.10 In the curve diagram, the horizontal axis represents IB1max and I B1min I B1max and I B1min Respectively, V out =V B1 Current flowing in the Max Deviation Characteristics and Min Deviation Characteristics. V B1 It means that after obtaining the load current I of the three power supply devices 10 L The voltage output from the output terminal of the operational amplifier U13B in the droop characteristic control unit 32 when the droop characteristic is balanced. B1max with I B1min The difference indicates that the load current I of the three power supply devices 10 is obtained. L The load factor deviation that may occur when the balance is reached. B1max with I B1min The smaller the difference is, the smaller the deviation of the load factors of the three power supply devices 10 is.

[0172] Assuming that one of the three power supply devices 10 fails, when the currents output by the two operating power supply devices 10 are balanced, the currents output by the two power supply devices 10 are called the ideal balanced current values ​​I B2 The third threshold current is set to be higher than I B2 The fourth threshold current is set to be smaller than I B2 The maximum reverse current that can flow in a power supply device 10 that has failed is determined by the reverse current limit value I bk When , the following formula (10) holds.

[0173] I B2 =(-I bk +I Lmax ) / 2 (10)

[0174] exist Fig.10 In the curve diagram, the horizontal axis represents I B2max and I B2min I B2max and I B2min Respectively, V out =V B2 Current flowing in the Max Deviation Characteristics and Min Deviation Characteristics. V B2 Indicates that a failure occurs in one power supply device 10 and the load current I of the two power supply devices 10 is obtained. L The voltage output from the output terminal of the operational amplifier U13B in the droop characteristic control unit 32 when the droop characteristic is balanced. B2max with I B2min The difference between the load currents I of the two power supply devices 10 is obtained. L The load factor deviation that may occur when the balance is reached.B2max with I B2min The smaller the difference is, the smaller the deviation in the load factors of the two power supply devices 10 is.

[0175] I B2max Indicates that the load current I L The load current I that can flow through one of the two power supply devices 10 is balanced. L The maximum value of I B2max Than I B2 big. I B2max Required at rated current I rate Therefore, the following formula (11) holds.

[0176] I rate ≥I B2max >(-I bk +I Lmax ) / 2 (11)

[0177] By setting the current-voltage characteristic of the power supply device 10 to Fig.10 In any case where all three power supply devices 10 are operating or one power supply device 10 fails, it is easy to obtain the load current I of the operating power supply device 10. L As a result, the reliability of the power supply system 1 is improved.

[0178] Further generalized, the power supply system 1 may include (N+1) power supply devices 10. N is a natural number greater than or equal to 2. In this case, the above-mentioned equations (9) to (11) are generalized as shown in the following equations (12) to (14).

[0179] I B1 =I Lmax / (N+1) (12)

[0180] I B2 =(-I bk +I Lmax ) / N (13)

[0181] I rate ≥I B2max >(-I bk +I Lmax ) / N (14)

[0182] (N+1) is called the first predetermined number. N is called the second predetermined number. The second predetermined number is the value obtained by subtracting 1 from the first predetermined number. Based on formula (12), I B1 Expressed as the maximum load current I Lmax Based on formula (13), I B2Expressed as the maximum load current I Lmax and reverse current limit value I bk The product of the sum of the absolute values ​​of and the reciprocal of the second specified number. bk With the maximum load current I Lmax When the ratio is sufficiently small, equation (13) can be replaced by the following equation (15).

[0183] I B2 =I Lmax / N (15)

[0184] In this case, I B2 Expressed as the maximum load current I Lmax The product of the value and the reciprocal of the second specified number.

[0185] By making equation (12), equation (13) or (15) and equation (14) valid, it is easy to obtain the load current I of the N power supply devices 10 in any case where all (N+1) power supply devices 10 are operating or one power supply device 10 fails. L As a result, the reliability of the power supply system 1 is improved.

[0186] When the power supply device 10 has a negative power output, a p-channel MOSFET can be used as the FET 40 .

[0187] In one embodiment, the current detection device is connected in series with the load current I output by the converter 20. L In other embodiments, the load current I output by the converter 20 is L In the case where the feedback path to the converter 20 is independent, the current detection device can be connected in series with the load current I L A path for feedback from the load 70 to the converter 20. As a result, in the current detection unit 30, an operational amplifier other than a rail-to-rail operational amplifier can be used as the operational amplifier for acquiring the detection result of the current detection device.

[0188] In the embodiments of the present invention, the description is made based on the drawings and embodiments, but it should be noted by those skilled in the art that various deformations or modifications are easily made based on the present invention. Therefore, it should be noted that these deformations or modifications are also included in the scope of the present invention. For example, the functions included in each component or each step can be reconfigured in a theoretically non-contradictory manner, and multiple components or steps can be combined into one or divided.

Claims

1. A power supply system comprising at least two power supply devices for supplying current to a load, wherein the power supply system is characterized in that: The power supply device comprises: A converter for supplying current to the load; A FET connected in series between the converter and the load; a current detection device for detecting a current flowing between the converter and the load; and a droop characteristic control unit that causes the output voltage of the converter to droop at a droop rate determined based on the magnitude of a load current flowing from the converter to the load, The droop rate of the load current when it is included in the first current interval is greater than the droop rate of the load current when it is included in the second current interval and the third current interval respectively, The second current interval includes a current smaller than a current included in the first current interval, The third current interval includes a current greater than the current included in the first current interval, The first current interval includes a current that is 50% of a maximum load current of the power supply device.

2. A power supply system comprising at least two power supply devices for supplying current to a load, wherein the power supply system is characterized in that: The power supply device comprises: A converter for supplying current to the load; A FET connected in series between the converter and the load; a current detection device for detecting a current flowing between the converter and the load; and a droop characteristic control unit that causes the output voltage of the converter to droop at a droop rate determined based on the magnitude of a load current flowing from the converter to the load, The droop rate of the load current when it is included in the first current interval is greater than the droop rate of the load current when it is included in the second current interval and the third current interval respectively, The second current interval includes a current smaller than a current included in the first current interval, The third current interval includes a current greater than the current included in the first current interval, The droop rate of the load current when it is included in the fourth current interval is greater than the droop rate of the load current when it is included in the fifth current interval and the third current interval respectively, The fourth current interval includes a current greater than the current included in the third current interval, The fifth current interval includes a current greater than the current included in the fourth current interval, The first current interval includes a current represented by the product of the reciprocal of a first predetermined number and the maximum load current of the power supply device. The fourth current section includes a current represented by a product of a reciprocal of a second predetermined number obtained by subtracting 1 from the first predetermined number and a maximum load current of the power supply device.

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