Selective growth of metal-containing hard mask films
By filling the ashable material between the semiconductor substrate features and selectively depositing the metal-containing hard mask, the problems of low etching efficiency and dielectric spacer corrosion in the prior art are solved, and efficient etching process and dielectric spacer protection are achieved.
Patent Information
- Application Number
- CN201980043731.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-06-28
- Filing Date
- 2019-06-21
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2039-06-21
AI Technical Summary
In the manufacturing of semiconductor equipment, it is difficult to effectively utilize a high selective hard mask, especially when the gap depth and width between dielectric spacers are relatively large, resulting in low etching process efficiency and dielectric spacer corrosion.
By filling the ashable filler between the features of the patterned semiconductor substrate, the top horizontal surfaces thereof are exposed, and then selectively depositing a metal-containing hard mask, such as a tungsten hard mask, on these surfaces, the ashable filler is finally removed to maintain the opening between the features.
The selective deposition of metal-containing hard masks in the gap with high aspect ratio is achieved, which improves the efficiency of the etching process and the protection effect of the dielectric spacer, and ensures the contour integrity of the patterned substrate.
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Figure CN112368804B_ABST
Abstract
Description
[0001] Incorporated by Reference
[0002] The PCT application form is filed concurrently with this specification as a part of this application. Each application to which this application claims the benefit or priority as identified in the concurrently filed PCT application form is incorporated herein by reference in its entirety and for all purposes. Background Art
[0003] Semiconductor device manufacturing includes the manufacture of microprocessors, logic and memory devices. These devices can be manufactured using a variety of techniques, including patterning techniques that implement various types of hard masks. Some processes involve forming structures including silicon oxides and silicon nitrides. Some techniques for forming these structures may be limited to patterning techniques that include both etching and deposition.
[0004] The background description provided here is for the purpose of generally presenting the context of the present disclosure. The work of the presently designated inventors is neither explicitly nor implicitly admitted to be prior art against the present disclosure to the extent that it is described in this background section and in aspects of the specification that were not determined to be prior art at the time the application was filed. Summary of the invention
[0005] Methods and apparatus for processing substrates are provided herein. One aspect relates to a method comprising: providing a patterned semiconductor substrate having separated features on an underlying material to be etched; filling spaces between the features with an ashable filler so that top horizontal surfaces of the features are exposed and sidewalls of the features contact the ashable filler; after filling the spaces between the features, selectively depositing a metal-containing hard mask on the exposed top horizontal surfaces of the features relative to the ashable filler; and removing the ashable filler relative to the features and the metal-containing hard mask.
[0006] In various embodiments, the filling between the features is performed to form a planar surface comprising the top horizontal surfaces of the features and the ashable fill.
[0007] In some embodiments, the filling between the features is accomplished by spin coating. The spin coating can be performed by injecting a carbon-containing fluid mixture onto the patterned semiconductor substrate and then thermally curing. In some embodiments, the filling between the features is accomplished by spin coating followed by planarization to expose the top horizontal surface of the features.
[0008] In various embodiments, the filling between features is accomplished by plasma enhanced chemical vapor deposition. The filling between features may involve planarizing the patterned semiconductor substrate after plasma enhanced chemical vapor deposition. For example, planarization may be performed by chemical mechanical planarization. In some embodiments, filling by plasma enhanced chemical vapor deposition involves exposing the features to a phase having the chemical formula C x H y wherein X is an integer between 2 and 10, and Y is an integer between 2 and 24, and including 2 and 24. For example, the hydrocarbon precursor may include methane (CH4), acetylene (C2H2), ethylene (C2H4), propylene (C3H6), butane (C4H 10 ), cyclohexane (C6H 12 ), benzene (C6H6), and toluene (C7H8). In some embodiments, filling by plasma enhanced chemical vapor deposition further involves flowing an inert gas mixture comprising a gas such as any one of argon, nitrogen, helium, and combinations thereof. In some embodiments, filling by plasma enhanced chemical vapor deposition further involves igniting a plasma at a plasma power between about 100 W and about 10 kW.
[0009] In various embodiments, the selective deposition of the metal-containing hard mask is performed at a substrate temperature between about 200°C and about 400°C.
[0010] In some embodiments, the selective deposition of the metal-containing hard mask is performed by one or more cycles of atomic layer deposition. For example, one cycle of atomic layer deposition may include exposure to both a silicon-containing precursor and exposure to a tungsten-containing precursor. In some cases, the plasma is also ignited at a plasma power sufficient to deposit the metal-containing hard mask without causing bombardment of reactive species onto the surface of the patterned semiconductor substrate. In some embodiments, the silicon-containing precursor is a silane. In some embodiments, the tungsten-containing precursor is a tungsten halide. For example, the tungsten-containing precursor can be any of tungsten hexafluoride, tungsten pentachloride, tungsten hexachloride, and combinations thereof. In some embodiments, one cycle of atomic layer deposition deposits about A metal-containing hard mask.
[0011] In various embodiments, the selective deposition is performed for a time sufficient to deposit the metal-containing hard mask to a thickness between about About The thickness between.
[0012] The method can also include etching an underlying material using the feature as a mask. In some embodiments, the thickness of the deposited metal-containing hard mask is selected based on the chemistry used to etch the underlying material.
[0013] In various embodiments, the features contain a dielectric material. An example of a dielectric material is silicon oxide. Another exemplary dielectric material is silicon nitride. In various embodiments, the features contain silicon. For example, in one embodiment, the features contain polysilicon.
[0014] In various embodiments, the metal-containing hard mask comprises tungsten. For example, the metal-containing hard mask can be any one of tungsten, tungsten carbide, tungsten carbonitride, and combinations thereof.
[0015] In various embodiments, the spaces between features have an aspect ratio of at least about 4:1.
[0016] In some embodiments, a feature in the plurality of features has a height measured from a top horizontal surface to an underlying material surface to be etched of at least about
[0017] In various embodiments, filling is performed at a substrate temperature of at least about 150°C.
[0018] In some embodiments, removing the ashable fill includes exposing the patterned semiconductor substrate to an oxygen-containing or hydrogen-containing plasma.
[0019] In various embodiments, removing the ashable filler is performed without applying a bias voltage.
[0020] In some embodiments, filling is performed in a process chamber having a chamber pressure between about 5 mTorr and about 10 Torr.
[0021] Another aspect relates to an apparatus comprising: a processing chamber comprising a showerhead and a substrate support; a plasma generator; and a controller having at least one processor and a memory, wherein the at least one processor is communicatively coupled to the memory, the at least one processor is operatively coupled to at least flow control hardware, and the memory stores machine-readable instructions for: causing introduction of a flow of a carbon-containing deposition precursor and causing generation of a first plasma; causing cessation of the flow of the carbon-containing deposition precursor after causing introduction of the carbon-containing deposition precursor; and causing introduction of temporally separated pulses of a flow of a silicon-containing precursor and a flow of a tungsten-containing precursor after cessation of the flow of the carbon-containing deposition precursor.
[0022] These and other aspects are described in further detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 are process flow diagrams that describe operations performed according to certain disclosed embodiments.
[0024] Figure 2-6 is a schematic diagram of a substrate for performing operations of certain disclosed embodiments.
[0025] Figure 7 is a schematic diagram of an example processing chamber for performing certain disclosed embodiments.
[0026] Figure 8 is a schematic diagram of an exemplary processing apparatus for performing certain disclosed embodiments. DETAILED DESCRIPTION
[0027] In the following description, many specific details are set forth to provide a thorough understanding of the embodiments presented. The disclosed embodiments may be practiced without some or all of these specific details. In other cases, well-known processing operations are not described in detail to avoid unnecessarily obscuring the disclosed embodiments. Although the disclosed embodiments will be described in conjunction with specific embodiments, it should be understood that they are not intended to limit the disclosed embodiments.
[0028] In semiconductor processing, mask processing methods are used to pattern and etch substrates. As the aspect ratio of the substrate increases, the need for highly selective hard masks increases. Many patterning schemes involve the formation of positive features, such as dielectric spacers, to serve as masks for etching the target layer. However, some dielectric spacers may be susceptible to erosion, especially when the gap aspect ratio between the dielectric spacers is very large and the gap depth may therefore be large, which may result in a longer etching duration for etching the target layer below the dielectric spacers. As a result, some dielectric spacers may corrode during etching of the target layer.
[0029] In some cases, the dielectric spacer also includes an additional hard mask above the dielectric spacer that can withstand the etching conditions used to etch the target layer while maintaining the profile of the pattern. Masks with high etching selectivity and easy removal without damaging the substrate are useful in processing substrates. In particular, metal-containing hard masks have significant advantages in the development of front-end process technology. Hard masks containing metal can withstand various etching chemicals to protect the dielectric spacer during etching the target layer. One type of metal-containing hard mask is titanium nitride. However, in some cases, when titanium nitride is used as a hard mask, titanium fluoride (TiF x ), which are difficult to remove from the exposed surfaces of chamber components and substrates.
[0030] Another type of metal-containing hard mask is a tungsten-containing hard mask, such as tungsten metal, tungsten carbide, tungsten nitride, or tungsten carbonitride. Such materials have improved etch product volatility, improved grain size to reduce line width roughness, and improved etch selectivity compared to the exposed dielectric material when exposed to etching chemicals, thereby acting as an effective hard mask. For example, when exposed to fluorine-containing etching chemicals, the etch selectivity of tungsten metal relative to silicon oxide materials can exceed at least about 10:1. In addition, tungsten-containing hard masks are not prone to forming non-volatile materials that are difficult to remove; instead, when using a tungsten-containing hard mask as a mask, the hard mask can form tungsten fluoride, which is volatile under the process conditions of etching. Tungsten-containing hard masks also grow to larger grain sizes, which can be formed using a variety of deposition techniques and process conditions, and in some cases can improve line bending problems.
[0031] One method for forming a tungsten-containing hard mask is by chemical vapor deposition (CVD), which can be performed thermally or using plasma (plasma enhanced chemical vapor deposition or PECVD). As devices shrink, the critical dimensions decrease and the aspect ratio increases for more advanced technologies. In some cases, CVD or PECVD techniques may produce areas that enclose features at the desired thickness, thereby resulting in the formation of voids. Although voids can be avoided by depositing thinner films, such films may not be sufficient as hard masks for tungsten-containing hard masks due to sputtering losses during etching, and the hard mask may degrade during etching, thereby deteriorating the etch profile. In addition, CVD-deposited tungsten-containing hard masks may reduce the critical dimensions of the gaps between features, thereby reducing the aspect ratio. In addition, CVD or PECVD of tungsten-containing hard masks on patterned features not only results in deposition at the bottom of the gaps between features, but also on the sidewalls of the features, thereby reducing the aspect ratio and degrading the feature profile. Some CVD and PECVD techniques may not preferentially deposit on the top horizontal surface of the feature relative to the sidewalls of the feature.
[0032] Provided herein are methods and apparatus for selectively depositing a metal-containing hard mask on patterned features. The patterned features may be a dielectric material having a high aspect ratio gap or space between the patterned features, each patterned feature having a top horizontal surface, and the metal-containing hard mask may be selectively deposited on the top horizontal surface relative to other exposed surfaces on the substrate. In some embodiments, selectivity is achieved by forming a carbon-containing and / or ashable material between the patterned features, wherein the metal-containing hard mask may be selectively deposited on the top horizontal surface of the patterned features relative to the exposed carbon-containing surface. Certain disclosed embodiments relate to: filling the gaps between the patterned features with an ashable material; optionally planarizing the substrate to expose the dielectric on the top horizontal surface of the patterned features; and selectively depositing the metal-containing hard mask material on the exposed dielectric on the top horizontal surface of the patterned features relative to the ashable material.
[0033] Certain disclosed embodiments enable deposition of, for example, a tungsten-containing hard mask to a sufficient thickness so that the tungsten-containing hard mask can withstand subsequent etching chemistries and serve as an effective hard mask, and the deposition technique enables sufficient feature openings between patterned features to provide sufficient space for subsequent etching operations. That is, in some embodiments where material is deposited on patterned features that are not filled with carbon-containing material, some material may be deposited on the sidewalls of the features, thereby reducing the size of the openings between the patterned features. In certain disclosed embodiments, because the spaces between the features are filled with carbon-containing material prior to deposition of the metal-containing hard mask, the openings between the patterned features can be maintained, and the carbon-containing material can be removed after deposition of the metal-containing hard mask, so that the size of the openings between the features is substantially the same before and after deposition of the metal-containing hard mask.
[0034] Figure 1 is a process flow diagram describing operations performed according to certain disclosed embodiments. Operations 110-170 may be performed in a process chamber set at a chamber pressure between about 1 mTorr and about 10 Torr. In some embodiments, the process chamber includes a susceptor set at a temperature between about 75° C. and about 600° C. In some embodiments, Figure 1 The operations in are performed at different temperatures. For example, in some embodiments, operation 130 is performed at a temperature different from operation 150. In some embodiments, operation 150 is performed at a temperature between about 75°C and about 600°C or between about 50°C and about 300°C.
[0035] In operation 110, a patterned substrate having separation features is provided. The substrate can be a silicon wafer, such as a 200 mm wafer, a 300 mm wafer, or a 450 mm wafer, comprising a wafer having one or more layers of material (e.g., dielectric, conductive, or semiconductive material) deposited thereon. Non-limiting examples of lower layers include dielectric layers and conductive layers, such as silicon oxide, silicon nitride, silicon carbide, metal oxide, metal nitride, metal carbide, and metal layers. The substrate can include a target layer etched using a pattern of separation features. The pattern on the substrate includes separation features. The separation features can be pillars on the substrate. In various embodiments, these separation features are positive features.
[0036] The features on the substrate can be patterned silicon-containing materials. For example, in some embodiments, the features include silicon oxide materials. In some embodiments, the features include silicon nitride materials. In some embodiments, the features include silicon. For example, the features can be polysilicon. In some embodiments, the features include silicon carbide materials.
[0037] Certain disclosed embodiments are suitable for selective deposition on features of various sizes and are not limited to deposition on features of a particular height.
[0038] In some embodiments, the spaces between the features can be trenches across the substrate surface. In some embodiments, each feature has a rectangular cross-section from a top view of the feature looking down into the plane of the substrate. From a side view of the feature looking toward the entire substrate surface, the feature can have a cross-section of approximately The height of the feature is between about 5 microns and about 5 microns, wherein the height is measured from the bottom of the feature to the top horizontal surface of the feature. The bottom of the feature abuts the target layer, whereby the sidewall of the feature intersects the horizontal surface of the target layer at 90°±5°. The top horizontal surface of the feature may intersect the sidewall of the feature at 90°±5°.
[0039] In various embodiments, the spaces between features have an aspect ratio of between about 2: 1 and about 20: 1, or at least about 4: 1, or about 4: 1. The distance between features (which may be referred to herein as a critical dimension) or the gap size between features may be less than about 40 nm.
[0040] Figure 2 An exemplary schematic diagram from a side view of a substrate 201 having a target layer 203 and separated features 205 with gaps 207 between the features is provided. The gaps may be defined by the space between adjacent sidewalls 225 of the separated features 205. Each separated feature 205 may have a top horizontal surface 215.
[0041] Back to Figure 1, in operation 130, the spaces between the features are filled with a carbon-containing material. In various embodiments, the spaces between the features may be filled with an "ashable filler," which means a filler that can be removed by an oxygen or hydrogen plasma. The filling of the spaces between the features may be performed by one of a variety of techniques. An exemplary technique is spin coating. In spin coating, a carbon-containing and / or carbon-silicon mixture is injected onto a substrate through a nozzle to spin coat the liquid onto the substrate. In some embodiments, after the fluid flows, the substrate is cured at a temperature of about 250° C., which may shrink and densify the deposited carbon-containing material.
[0042] Another exemplary technique is PECVD. In PECVD, the substrate is exposed to a carbon-containing deposition precursor and a plasma is ignited. During PECVD, the substrate is exposed to a continuous flow of the carbon-containing deposition precursor and the plasma is ignited in situ. In some embodiments, the carbon-containing deposition precursor is ignited in a remote plasma generator or in a plasma upstream of the substrate to form excited species that are transported to the processing chamber for deposition onto the substrate.
[0043] The carbon-containing deposition precursor may be a hydrocarbon. The hydrocarbon may be represented by the chemical formula C x H y Definition, wherein X is an integer between 2 and 10, inclusive, and Y is an integer between 2 and 24, inclusive. Examples include methane (CH4), acetylene (C2H2), ethylene (C2H4), propylene (C3H6), butane (C4H 10 ), cyclohexane (C6H 12 ), benzene (C6H6) and toluene (C7H8).
[0044] In some embodiments, two or more hydrocarbon precursors may be introduced. In addition to hydrocarbon precursors, a carrier gas may also be used to dilute the precursor gas flow. The carrier gas may be any suitable carrier gas, including helium (He), argon (Ar), nitrogen (N2), hydrogen (H2), or any combination of these. In some embodiments, a mixture of hydrocarbons and argon, nitrogen, and helium flows together. The ratio of the carrier gas flow to the hydrocarbon precursor gas flow may be varied by the tool used to introduce the hydrocarbon precursor gas. The ratio of the carrier gas flow to the hydrocarbon precursor gas flow depends on the gas delivery type, spacing, and volume, and may affect the uniformity and particle efficiency of the deposited carbonaceous material.
[0045] In some embodiments, the carbon-containing deposition precursor further includes atoms other than carbon and hydrogen.Other exemplary carbon-containing deposition precursors include amines (eg, tert-butylamine, triethylamine, methylamine, etc.) and alcohols (eg, ethanol, tert-butyl alcohol, etc.).
[0046] Precursor gas flow rates depend on the particular deposition chamber and substrate. Examples of flow rates for four 300 mm substrates are between about 200 sccm and about 4,000 sccm for acetylene, between about 1000 sccm and about 20,000 sccm for hydrogen, and between about 1000 sccm and about 20,000 sccm for helium.
[0047] When introducing the carbon-containing deposition precursor, a dual RF plasma source including a low frequency (LF) component and a high frequency (HF) component is used to ignite the plasma. In some embodiments, the method of the embodiment uses LFRF power to produce high-energy ion bombardment. Low frequency RF power refers to RF power with a frequency between about 100kHz and about 2MHz or about 400kHz. In some embodiments, the pulse frequency may be limited by the operating capacity of the LF generator. In some embodiments, the LF RF power has an RF power with a frequency of about 400kHz, for example, an RF power of 430kHz. During deposition, in some embodiments, the LF power ranges between about 0.001W / cm 2 About 0.05W / cm 2 Between, per cm 2 In some embodiments, the LF power range is between about 0 and about 1.25 W / cm 2 High frequency RF power refers to RF power with a frequency between about 2 MHz and about 60 MHz. In some embodiments, the HF RF power has an RF power with a frequency of about 13.56 MHz. During deposition, in some embodiments, the HF power per substrate area ranges from about 0.001 W / cm 2 About 0.05W / cm 2 In some embodiments, the HF power per substrate area ranges from about 0.05 W / cm 2 Up to 1.25W / cm 2 In some embodiments, for a 4-station chamber, the plasma power may be between about 100 W and about 10 kW. The plasma power may also depend on the size of the chamber.
[0048] The flow rates and RF powers disclosed herein are for a four-station tool configured for 300 mm wafers. Power levels and flow rates generally scale linearly with the number of stations and substrate area. Flow rates and powers can be expressed on a per area basis, for example, 2500 W can also be expressed as 0.884 W / cm 2 .
[0049] During operation 130, the deposition process may be self-limiting in some embodiments. For example, in some embodiments, as the space is filled and the thickness of the carbonaceous material deposited in the space approaches the height of the feature, the deposition of the carbonaceous material may slow down. In some embodiments, experiments are performed to determine a duration that is sufficient to deposit enough carbonaceous material to stop the deposition before the carbonaceous material covers the top horizontal surface of the feature.
[0050] In some embodiments, after deposition, if some of the top horizontal surfaces of the features are covered by some carbon-containing material, a cleaning or planarization operation may be performed to expose the top horizontal surfaces of the features. An example of a cleaning operation is chemical mechanical planarization. Cleaning may be performed by exposing the substrate to a hydrogen plasma or an oxygen plasma to remove the carbon-containing material on the top horizontal surface of the features. In many embodiments, hydrogen plasma is adopted because it is easier to control. Hydrogen plasma cleaning conditions may depend on the tool. In some embodiments, the susceptor temperature during hydrogen plasma cleaning is between about 75° C. and about 600° C. In some embodiments, the chamber pressure during hydrogen plasma cleaning may be between about 1 mTorr and about 10 Torr. In various embodiments, the substrate after operation 130 includes a flat surface across the substrate, the flat surface having the top horizontal surface of the features, and the carbon-containing material filling the space between the separated features. That is, the flat surface includes the carbon-containing material flush with the top horizontal surface of the features.
[0051] In some embodiments, the carbon-containing material deposited in the space is an amorphous carbon layer. In some embodiments, the carbon-containing material is an amorphous carbon layer having trace amounts of hydrogen and nitrogen in the amorphous carbon.
[0052] The carbon-containing material is a sacrificial material. In various embodiments, the carbon-containing material is deposited so that the carbon-containing material covers the sidewalls of the features but does not cover the top horizontal surfaces of the features. In some embodiments, the carbon-containing material is deposited to fill the spaces or gaps between the sidewalls of the features, and an optional cleaning and / or planarization operation may be performed to expose the top horizontal surfaces of the features. In some embodiments, the carbon-containing material completely fills the gaps between the patterned, separated features. In some embodiments, it may not be necessary to completely fill the spaces between the patterned features, as long as the top horizontal surfaces of the features are flush with the carbon-containing material and no sidewalls of the features are exposed during the deposition of the metal-containing hard mask.
[0053] Figure 3 An exemplary substrate 301 is shown having a target layer 303 with features 305 and a carbon-containing material 307 deposited between the features 305 to fill the gaps. Figure 3Carbon-containing material 307 is shown deposited to a thickness that reaches the height of feature 305 , resulting in a planar surface 309 having carbon-containing material 307 and an exposed top horizontal surface 315 of feature 305 .
[0054] Back to Figure 1 In operation 150, a metal-containing hard mask is selectively deposited on the top horizontal surface of the feature relative to the carbon-containing material. Selective deposition can refer to faster nucleation on one surface relative to a second surface. For example, a nucleation delay can result in a difference in deposition thickness between about 10 angstroms and about 100 angstroms. Although the deposition rate of the metal-containing hard mask on the feature and the carbon-containing material may be the same at the beginning of deposition, because the nucleation delay for depositing the metal-containing hard mask on the carbon-containing surface is greater than the nucleation delay on the feature surface, selective deposition can be achieved, resulting in a thicker deposition on the feature surface relative to the carbon-containing surface.
[0055] In various embodiments, the metal-containing hard mask material is a tungsten-containing material. Examples of tungsten-containing materials include, but are not limited to, tungsten metal, tungsten carbide, and tungsten carbonitride. Since selectivity depends on the nucleation delay on the associated material, one way to adjust the selectivity is to adjust the composition of the associated material. In some embodiments, adjusting the tungsten content used in the tungsten-containing hard mask material can adjust the selectivity. In addition, the tungsten content can also adjust the film transparency, which may be required in some embodiments for imaging in lithography.
[0056] In various embodiments, the metal-containing hardmask material contains aluminum. For example, the metal-containing hardmask can be aluminum oxide. In various embodiments, the metal-containing hardmask material contains tin.
[0057] When a metal-containing hard mask is used as a mask to etch a target layer, the material and thickness of the metal-containing hard mask depends on the conditions of subsequent exposure. For example, a polysilicon target layer may be etched using a chlorine-containing etch chemistry, and a thin tungsten hard mask may be used because the chlorine-containing etch chemistry has a high selectivity to tungsten materials. In another example, a fluorine-containing etch chemistry may be used to etch an oxygen-containing target layer, and although the etching may be selective, the oxygen-containing target layer may be etched at a faster rate than etching a tungsten hard mask, but the tungsten hard mask may be etched during the etching, so a thicker tungsten hard mask may be used.
[0058] The metal-containing hard mask material is deposited on the top horizontal surface of the feature at a faster deposition rate than on the carbon-containing material. Therefore, a thicker deposition is observed on the exposed top horizontal surface of the feature. In various embodiments, the material of the top horizontal surface is a silicon-containing material. Without being limited to a particular theory, it is believed that the deposition chemistry used to deposit the metal-containing hard mask does not readily nucleate on the carbon-containing surface, while the deposition chemistry nucleates on the dielectric surface, enabling selective deposition on the dielectric relative to the carbon-containing surface.
[0059] The metal-containing hard mask is deposited to about About In various embodiments, the metal-containing hard mask is deposited to a thickness between about About Deposited to a thickness greater than about The metal-containing hard mask may cause the metal-containing hard mask to grow in all directions, thereby blocking the space between features and causing pinch-off. The deposition is performed to maintain the gap critical dimension between features.
[0060] The selective deposition in operation 150 may be performed by atomic layer deposition (ALD). ALD is a technique for depositing thin layers of material using sequential self-limiting reactions. Typically, an ALD cycle includes the operation of delivering and adsorbing at least one reactant to a substrate surface, followed by reacting the adsorbed reactant with one or more reactants to form a portion of a film layer. As an example, a silicon oxide deposition cycle may include the following operations: (i) delivery / adsorption of a silicon-containing precursor, (ii) purging a silicon precursor from a chamber, (iii) delivery of a tungsten-containing reactant, and (iv) purging the tungsten-containing reactant from a chamber.
[0061] Unlike chemical vapor deposition (CVD) techniques, the ALD process deposits films layer by layer using a surface-mediated deposition reaction. In one example of an ALD process, a substrate surface containing a group of surface active sites is exposed to a first precursor, such as a silicon-containing precursor, distributed in a gas phase and provided in a dose to a processing chamber containing the substrate. Molecules of the first precursor are adsorbed on the substrate surface, which include chemically adsorbed species and / or physically adsorbed molecules of the first precursor. It should be understood that when a compound is adsorbed to the substrate surface as described herein, the adsorbed layer may include the compound and derivatives of the compound. For example, the adsorbed layer of a silicon-containing precursor may include a silicon-containing precursor and a derivative of the silicon-containing precursor. After the first precursor is injected, the chamber is then evacuated to remove most or all of the first precursor maintained in the gas phase, so that most or only the adsorbed species remain. Purging the chamber may involve flowing a purge gas or a purge gas, which may be a carrier gas used in other operations or may be a different gas. In some embodiments, purging may involve evacuating the chamber. Exemplary purge gases include argon, nitrogen, hydrogen, and helium. In some embodiments, operation 306 may include one or more evacuation sub-stages to evacuate the process chamber. In some implementations, the chamber may not be fully evacuated. For example, the chamber may be evacuated so that the partial pressure of the first precursor in the gas phase is low enough to mitigate the reaction. In some embodiments, the purge may be optional.
[0062] A second reactant, such as a tungsten-containing reactant, is introduced into the reaction chamber to allow some of these molecules to react with the first precursor adsorbed on the surface. In some processes, the second reactant reacts immediately with the adsorbed first precursor. The chamber can then be evacuated again to remove unbound second reactant molecules. As described above, in some embodiments, the chamber may not be completely evacuated. Additional ALD cycles may be used to build up the film thickness. One cycle may deposit approximately A metal-containing hard mask material.
[0063] In some embodiments, optional plasma can be ignited during the introduction of the second reactant. For example, low-power plasma can be used to prevent sputtering. In some embodiments, LFRF power has an RF power with a frequency of about 400kHz (such as 430kHz). During deposition, in some embodiments, for four 300mm substrates in a four-station chamber, the LF power range is between about 200W and about 3000W. High-frequency RF power refers to an RF power with a frequency between about 2MHz and about 60MHz. In some embodiments, HF RF power has an RF power with a frequency of about 13.56MHz. During deposition, in some embodiments, for four 300mm substrates in a four-station chamber, the HF power range of each substrate area is between about 400W and about 2500W. Plasma power may also depend on the size of the chamber.
[0064] The flow rates and RF powers disclosed herein are for a four-station tool configured for 300 mm wafers. Power levels and flow rates generally scale linearly with the number of stations and substrate area. Flow rates and powers can be expressed on a per area basis, for example, 2500 W can also be expressed as 0.884 W / cm 2 .
[0065] In certain embodiments, the dose of the ALD first precursor partially fills the surface of the substrate. In some embodiments, the dosing phase of the ALD cycle is terminated before the precursor contacts the substrate to uniformly fill the surface. Typically, the precursor flow is shut off or diverted at this time, and only the purge gas flows. By operating in this subsaturated state, the ALD process reduces cycle time and improves throughput. However, since the precursor adsorption is not saturation-limited, the adsorbed precursor concentration may vary slightly across the substrate surface. An example of operating an ALD process in a subsaturated state is provided in U.S. Patent Application No. 14 / 061,587 (now U.S. Patent No. 9,355,839), filed on October 23, 2013, entitled "SUB-SATURATED ATOMIC LAYER DEPOSITION AND CONFORMAL FILMDEPOSITION," which is incorporated herein by reference in its entirety.
[0066] As described, in some implementations, the ALD method includes plasma activation. As described herein, the ALD method and apparatus described herein can be a conformal film deposition (CFD) method, which is generally described in U.S. Patent Application No. 13 / 084,399, filed on April 11, 2011, entitled "PLASMA ACTIVATED CONFORMAL FILM DEPOSITION" (now U.S. Patent No. 8,728,956) and U.S. Patent Application No. 13 / 084,305, filed on April 11, 2011, entitled "SILICON NITRIDE FILMS AND METHODS", which are incorporated herein by reference in their entirety.
[0067] In the case where the deposited metal-containing hard mask is tungsten metal, an exemplary ALD cycle may include: exposing the substrate to a silicon-containing reactant (such as silane), which may form an adsorption layer of the silicon-containing reactant; purging a processing chamber containing the substrate; exposing the substrate to a tungsten halide (such as tungsten hexafluoride), which reacts with the adsorption layer of the silicon-containing reactant to form tungsten; and purging the processing chamber.
[0068] In the case where the deposited metal-containing hard mask is tungsten carbide, an exemplary ALD cycle may include: exposing the substrate to a silicon-containing reactant (such as silane), which may form an adsorbed layer of the silicon-containing reactant; purging a processing chamber containing the substrate; exposing the substrate to a metal-organic tungsten precursor, which reacts with the adsorbed layer of the silicon-containing reactant to form tungsten carbide; and purging the processing chamber.
[0069] In the case where the deposited metal-containing hard mask is tungsten carbonitride, an exemplary ALD cycle may include: exposing the substrate to a silicon-containing reactant (e.g., silane), which may form an adsorbed layer of the silicon-containing reactant; purging a process chamber containing the substrate; exposing the substrate to a tungsten precursor (e.g., a metal-organic tungsten precursor) and a nitrogen-containing reactant (e.g., nitrogen), which reacts with the adsorbed layer of the silicon-containing reactant to form tungsten carbonitride; and purging the process chamber. In some embodiments, the tungsten precursor has an amine or amide group.
[0070] In the case where the deposited metal-containing hard mask is tungsten nitride, an exemplary ALD cycle may include: exposing the substrate to a silicon-containing reactant (e.g., silane), which may form an adsorbed layer of the silicon-containing reactant; purging a process chamber containing the substrate; exposing the substrate to a mixture of a nitrogen-containing gas and a tungsten precursor, which reacts with the adsorbed layer of the silicon-containing reactant to form tungsten nitride; and purging the process chamber. In some embodiments, the tungsten precursor has an amide group. In some embodiments, the nitrogen-containing gas in the mixture with the tungsten precursor is nitrogen.
[0071] In some embodiments, the nitrogen-containing gas reactant or reactant mixture comprises at least one nitrogen, for example, ammonia, hydrazine, amines (amines with carbon), such as methylamine, dimethylamine, ethylamine, isopropylamine, tert-butylamine, di-tert-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isopentylamine, 2-methylbutyl-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-tert-butylhydrazine, and aromatic amines, such as aniline, pyridine, and benzylamine. The amine can be a primary amine, a secondary amine, a tertiary amine, or a quaternary ammonium (e.g., a tetraalkylammonium compound). The nitrogen-containing reactant can contain heteroatoms other than nitrogen, for example, hydroxylamine, tert-butyloxycarbonylamine, and N-tert-butylhydroxylamine are nitrogen-containing reactants. Exemplary nitrogen-containing reactants include nitrogen, ammonia, and amines.
[0072] Exemplary silicon-containing reactants used in ALD of metal-containing hardmasks include silanes, halosilanes, and aminosilanes. Silicon-containing reactants suitable for use according to the disclosed embodiments include polysilanes (H3Si-(SiH2) wherein n ≥ 0 n -SiH3). Examples of silanes are silane (SiH4), disilane (Si2H6) and organosilanes such as methylsilane, ethylsilane, isopropylsilane, tert-butylsilane, dimethylsilane, diethylsilane, di-tert-butylsilane, allylsilane, sec-butylsilane, tert-hexylsilane, isopentylsilane, tert-butyldisilane, di-tert-butyldisilane, etc.
[0073] Halosilanes include at least one halogen group and may or may not include hydrogen and / or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Although halosilanes, particularly fluorosilanes, can form reactive halide species that can etch silicon materials when plasma is excited, in some embodiments, when plasma is excited, halosilanes cannot be introduced into the chamber, so the formation of reactive halide species from halosilanes may be reduced. Specific chlorosilanes are tetrachlorosilane, trichlorosilane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, t-hexyldimethylchlorosilane, etc.
[0074] Aminosilanes include at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogens, and carbon. Examples of aminosilanes are monoaminosilane, diaminosilane, triaminosilane, and tetraaminosilane (H3Si(NH2), H2Si(NH2)2, HSi(NH2)3, and Si(NH2)4, respectively)) and substituted monoaminosilanes, diaminosilanes, triaminosilanes, and tetraaminosilanes, such as tert-butylaminosilane, methylaminosilane, tert-butylsilylamine, bis(tert-butylamino)silane (SiH2(NHC(CH3)3)2(BTBAS), tert-butylsilylcarbamate, SiH(CH3)-(N(CH3)2)2, SiHCl-(N(CH3)2)2, (Si(CH3)2NH)3, and the like. Another example of an aminosilane is trisilylamine (N(SiH3)).
[0075] In various embodiments, operation 150 is performed at a substrate temperature that is the same as the substrate temperature during operation 130. In some embodiments, the substrate temperature during operation 150 is different from the substrate temperature of operation 130. In various embodiments, operation 150 is performed at a chamber pressure that is the same as the chamber pressure during operation 130. In some embodiments, the chamber pressure during operation 150 is different from the chamber pressure during operation 130. In some embodiments, operations 130 and 150 are performed in the same chamber. In some embodiments, operations 130 and 150 are performed without breaking vacuum. In some embodiments, operations 130 and 150 are performed in different chambers.
[0076] Selective deposition of the metal-containing hard mask maintains spaces between features because the surface exposed to the metal-containing hard mask deposition precursor is a planar surface having an exposed top horizontal surface of the feature on which the metal-containing hard mask deposition precursor can rapidly nucleate, while the remaining planar surfaces are carbon-containing materials on which the metal-containing hard mask deposition precursor may nucleate more slowly or not nucleate.
[0077] Figure 4 An exemplary substrate 401 is shown having a target layer 403 and features 405 filled with carbon-containing material 407 between the features 405 and a metal-containing hard mask 409 that is selectively deposited relative to the carbon-containing material 407 on the top horizontal surface of the features 405 .
[0078] Back to Figure 1In operation 170, the carbon-containing material is selectively removed relative to the metal-containing hard mask and the feature to leave the feature and the metal-containing hard mask, which can then be used to etch the target layer. Since the metal-containing hard mask is resilient to the remote oxygen plasma used to etch the carbon-containing material, selective etching is achieved. The carbon-containing material filled between the features can be removed by an ashing operation. The carbon-containing material is removed using a remote oxygen plasma source. In some embodiments, the carbon-containing material is removed by exposing the substrate to an oxygen plasma or a hydrogen plasma or both. In some embodiments, the plasma is a single-frequency plasma. The plasma can be a remote plasma, such as a plasma ignited in a remote plasma generator and delivered to a processing chamber that accommodates the substrate. In some embodiments, the plasma is an in-situ plasma, which can be generated in a processing space above the substrate in the processing chamber. For the in-situ plasma embodiment, a low-energy plasma is used to reduce sputtering of the substrate material, such as a plasma power between about 50W and about 250W (for four 300mm stations), and its duration is between about 1 second and about 10 seconds. In many embodiments, no bias voltage is applied during removal of the carbonaceous material.
[0079] Figure 5 An exemplary substrate 501 is shown having a target layer 503 and having separated features 505 with a metal-containing hard mask 509 on the top horizontal surface of the separated features 505. Exemplary target layer materials include silicon, silicon germanium, silicon carbide, silicon nitride, and silicon oxide. The carbon-containing material has been removed, leaving gaps 507 between the separated features 505. Since the metal-containing hard mask is selectively deposited on the top horizontal surface of the separated features 505, the critical dimensions of the gaps 507 can be maintained. In addition, when the space between the features is filled with the carbon-containing material, no hard mask material is deposited between the spaces between the features, which also helps to maintain the space between the features and maintain the critical dimensions.
[0080] The isolated features 505 having the metal-containing hard mask 509 can withstand the etching conditions used to etch the target layer 503 without substantially degrading the isolated features 505. When the target layer 503 is etched, the metal-containing hard mask 509 reduces the etching rate in the etching conditions. For example, Figure 6 An example substrate 601 is shown having an etched target layer 613 according to a pattern of isolated features 605 having a metal-containing hard mask 609 on the top horizontal surface that helps maintain the profile of the patterned substrate.
[0081] Device
[0082] Figure 7A schematic diagram of one embodiment of a processing station 700 having a processing chamber body 702 for maintaining a low pressure environment is depicted. A plurality of processing stations 700 may be included in a generally low pressure processing tool environment. For example, Figure 8 One embodiment of a multi-station processing tool 800 is depicted. In some embodiments, one or more hardware parameters of the processing stations 700 (including those discussed in detail below) can be programmatically adjusted by one or more computer controllers 750.
[0083] In various embodiments, the processing station 700 can be used to deposit films by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD).For example, the processing station 700 can be used to deposit the carbon-containing materials described herein.
[0084] Alternatively or additionally, the processing station 700 can be used to deposit films by ALD or plasma enhanced ALD (PEALD).For example, the processing station 700 can be used to deposit a metal-containing hard mask (e.g., a tungsten hard mask, a tungsten carbide hard mask, or a tungsten carbonitride hard mask) on a substrate.
[0085] The processing station 700 is in fluid communication with a reactant delivery system 701a to deliver a process gas to a distribution showerhead 706. The reactant delivery system 701a includes a mixing vessel 704 for mixing and / or conditioning a process gas, such as a silicon-containing reactant gas or a tungsten-containing gas, for delivery to the showerhead 706. One or more mixing vessel inlet valves 720 can control the introduction of process gases into the mixing vessel 704.
[0086] For example, Figure 7 Embodiments include a vaporization point 703, which is used to vaporize liquid reactants to be supplied to a mixing container 704. In some embodiments, the vaporization point 703 can be a heated evaporator. The saturated reactant vapor produced from such an evaporator will condense in the downstream delivery pipeline. Incompatible gases exposed to condensed reactants will produce small particles. These small particles may block pipelines, hinder valve operation, contaminate substrates, etc. Some methods for dealing with these problems involve cleaning and / or emptying the delivery pipeline to remove residual reactants. However, cleaning the delivery pipeline will increase the processing station cycle time and reduce the processing station throughput. Therefore, in some embodiments, the delivery pipeline downstream of the vaporization point 703 can be heat traced. In some embodiments, the mixing container 704 can also be heat traced. In a non-limiting example, the pipeline downstream of the vaporization point 703 has an increased temperature distribution, extending from about 100°C to about 150°C at the mixing container 704.
[0087] In some embodiments, the liquid precursor or liquid reactant can be vaporized at the liquid injector. For example, the liquid injector can inject a pulse of the liquid reactant into the carrier gas flow upstream of the mixing container. In one embodiment, the liquid injector can vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another example, the liquid injector can atomize the liquid into dispersed droplets that are then vaporized in a heated delivery pipe. Smaller droplets can vaporize faster than larger droplets, thereby reducing the delay between liquid injection and completion of vaporization. Faster vaporization can reduce the length of the pipeline downstream of the vaporization point 703. In one embodiment, the liquid injector can be loaded directly to the mixing container 704. In another embodiment, the liquid injector can be loaded directly to the spray head 706.
[0088] In some embodiments, a liquid flow controller (LFC) can be set upstream of the vaporization point 703 to control the mass flow of the liquid for vaporization and delivery to the processing station 700. For example, the LFC can include a thermal mass flow meter (MFM) located downstream of the LFC. Then the plunger valve of the LFC can be adjusted in response to a feedback control signal provided by a proportional integral differential (PID) controller that communicates electrically with the MFM. However, it can take one second or more to use feedback control to stabilize the liquid flow. This can extend the time of dosing liquid reactants. Therefore, in some embodiments, the LFC can be dynamically switched between feedback control mode and direct control mode. In some embodiments, this can be performed by disabling the sensing tube of the PID controller and the LFC.
[0089] Showerhead 706 distributes processing gas toward substrate 712. Figure 7 In the illustrated embodiment, substrate 712 is positioned below showerhead 706 and is shown resting on pedestal 708. Showerhead 706 may have any suitable shape and may have any suitable number and arrangement of ports to distribute process gases to substrate 712.
[0090] In some embodiments, the pedestal 708 may be raised or lowered to expose the substrate 712 to the volume between the substrate 712 and the showerhead 706. It should be appreciated that in some embodiments, the pedestal height may be programmatically adjusted via a suitable computer controller 750.
[0091] In another case, in an embodiment where the plasma is ignited, adjusting the height of the pedestal 708 can allow the plasma density to be changed during the plasma activation period of the process. At the end of the processing stage, the pedestal 708 can be lowered to allow the substrate 712 to be removed from the pedestal 708 in another substrate transfer stage.
[0092] In some embodiments, the susceptor 708 can be temperature controlled by a heater 710. In some embodiments, during the selective deposition of the silicon nitride film as described in the disclosed embodiments, the susceptor 708 can be heated to a temperature between about 25° C. and about 400° C., or between about 200° C. and about 300° C. In some embodiments, the susceptor is set at a temperature between about 75° C. and about 600° C., or at least about 75° C., or between about 200° C. and about 400° C.
[0093] Additionally, in some embodiments, pressure control for the processing station 700 may be provided by a butterfly valve 718. Figure 7 In the embodiment shown in FIG. 7 , butterfly valve 718 regulates the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of process station 700 can also be regulated by changing the flow rate of one or more gases introduced into process station 700.
[0094] In some embodiments, the position of the showerhead 706 can be adjusted relative to the pedestal 708 to change the volume between the substrate 712 and the showerhead 706. In addition, it should be understood that the vertical position of the pedestal 708 and / or the showerhead 706 can be changed by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 708 can include a rotation axis for rotating the orientation of the substrate 712. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more appropriate computer controllers 750.
[0095] In some embodiments where plasma may be used as described above, the showerhead 706 and the pedestal 708 are electrically connected to a radio frequency (RF) power source 714 and a matching network 716 to provide power to the plasma. For example, after depositing silicon nitride, the plasma may be used to remove organic moieties from the surface of the substrate. In some embodiments, the energy of the plasma may be controlled by controlling one or more of the pressure of the processing station, the concentration of the gas, the RF source power, the RF source frequency, and the timing of the plasma power pulses. For example, the RF power source 714 and the matching network 716 may be operated at any suitable power to form the plasma.
[0096] The plasma power is selected to be low enough to prevent sputtering of the material on the substrate surface. The RF power source 714 can provide RF power of any appropriate frequency. In some embodiments, the RF power source 714 can be configured to control a high-frequency RF power source and a low-frequency RF power source that are independent of each other. Exemplary low-frequency RF frequencies can include, but are not limited to, frequencies between 0kHz and 500kHz. Exemplary high-frequency RF frequencies can include, but are not limited to, frequencies between 1.8MHz and 2.45GHz, for example, or frequencies greater than about 13.56MHz, or greater than 27MHz, or greater than 40MHz, or greater than 60MHz. It should be understood that any suitable parameter can be discretely or continuously adjusted to provide plasma energy for surface reactions.
[0097] In some embodiments, the plasma can be monitored in situ by one or more plasma monitors. In one case, the plasma power can be monitored by one or more voltage and current sensors (e.g., VI probes). In another case, the plasma density and / or the concentration of the process gas can be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be adjusted programmatically based on the measurement results from such an in-situ plasma monitor. For example, an OES sensor can be used in a feedback loop to provide programmatic control of the plasma power. It should be understood that in some embodiments, other monitors can be used to monitor plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure sensors.
[0098] In some embodiments, instructions for the controller 750 may be provided via input / output control (IOC) sequencing instructions. In one example, instructions for setting conditions for a process stage may be included in a corresponding recipe stage of a process recipe. In some cases, the process recipe stages may be arranged in sequence so that all instructions for a process stage are executed simultaneously with the process stage. In some embodiments, instructions for setting one or more reactor parameters may be included in a recipe stage. For example, a first recipe stage may include instructions for setting the flow rate of a hydrocarbon gas, instructions for igniting a plasma, instructions for setting the flow rate of a carrier gas (e.g., argon), and time delay instructions for the first recipe stage. A second recipe stage may include instructions for setting the flow rate of an inert precursor gas and / or a silicon-containing precursor gas, instructions for setting the flow rate of a carrier gas (such as argon); and time delay instructions for the second recipe stage. A subsequent third recipe stage may include instructions for adjusting or stopping the flow rate of an inert gas and / or a reactant gas, instructions for adjusting the flow rate of a carrier gas or a purge gas, and time delay instructions for the third recipe stage. The fourth recipe stage may include instructions for adjusting the flow rate of the tungsten-containing gas, instructions for adjusting the flow rate of the carrier gas or the purge gas, and time delay instructions for the fourth recipe stage. The subsequent fifth recipe stage may include instructions for adjusting or stopping the flow rate of the inert gas and / or the reactant gas, and instructions for adjusting the flow rate of the carrier gas or the purge gas, and time delay instructions for the fifth recipe stage. It should be understood that within the scope of the present disclosure, these recipe stages may be further subdivided and / or repeated in any appropriate manner. In some embodiments, the controller 750 may include the following with respect to Figure 8 Any features described for system controller 850.
[0099] As described above, one or more processing stations may be included in a multi-station processing tool. Figure 8A schematic view of an embodiment of a multi-station processing tool 800 is shown, which has an inbound load lock 802 and an outbound load lock 804, one or both of which may include a remote plasma source. A robot 806 at atmospheric pressure is configured to move a wafer from a box loaded through a cabin 808 into the inbound load lock 802 via an atmospheric port 810. The wafer is placed on a pedestal 812 in the inbound load lock 802 by the robot 806, the atmospheric port 810 is closed, and the load lock is evacuated. When the inbound load lock 802 includes a remote plasma source, the wafer can be exposed to the environment in the load lock before being introduced into the processing chamber 814. In addition, the wafer can also be heated in the inbound load lock 802, for example to remove moisture and adsorbed gases. Next, the chamber transfer port 816 leading to the processing chamber 814 is opened, and another robot (not shown) places the wafer into the reactor on the pedestal of the first station shown in the reactor for processing. Although in Figure 8 The embodiment depicted in FIG. 1 includes a load lock, but it should be understood that in some embodiments, substrates may be allowed to enter the processing station directly.
[0100] The depicted processing chamber 814 contains four processing stations, Figure 8 The stations are numbered 1 to 4 in the illustrated embodiment. Each station has a heated susceptor (shown as 818 for station 1) and a gas line inlet. It should be understood that in some embodiments, each processing station may have different or multiple uses. For example, in some embodiments, the processing station may be switchable between ALD and plasma-enhanced ALD processing modes. Additionally or alternatively, in some embodiments, the processing chamber 814 may include a matching pair of one or more ALD and plasma-enhanced ALD processing stations. Although the depicted processing chamber 814 includes 4 stations, it is to be understood that the processing chamber described in accordance with the present disclosure may have any suitable number of stations. For example, in some embodiments, the processing chamber may have 5 or more stations, while in other embodiments, the processing chamber may have 3 or fewer stations.
[0101] Figure 8 An embodiment of a wafer handling system 890 for transferring wafers within a processing chamber 814 is depicted. In some embodiments, the wafer handling system 890 can transfer wafers between various processing stations and / or between a processing station and a load lock. It should be understood that any suitable wafer handling system can be employed. Non-limiting examples include a wafer turntable and a robot for handling wafers. Figure 8Also depicted is an embodiment of a system controller 850 employed to control processing conditions and hardware states of the processing tool 800. The system controller 850 may include one or more memory devices 856, one or more mass storage devices 854, and one or more processors 852. The processor 852 may include a computer or CPU, analog and / or digital input / output connections, a stepper motor controller board, etc.
[0102] In some embodiments, the system controller 850 controls all activities of the processing tool 800. The system controller 850 executes system control software 858 stored in the mass storage device 854, loaded into the memory device 856, and executed by the processor 852. Alternatively, the control logic can be hard-coded in the controller 850. Application-specific integrated circuits, programmable logic devices (such as field programmable gate arrays, or FPGAs), etc. can be used for these purposes. In the following discussion, whether "software" or "code" is used, functionally equivalent hard-coded logic can be used instead. The system control software 858 can include instructions for controlling timing, mixing of gases, gas flow rates, chamber and / or station pressures, chamber and / or station temperatures, wafer temperatures, target power levels, RF power levels, substrate pedestals, chuck and / or pedestal positions, and other parameters of the specific processing performed by the processing tool 800. The system control software 858 can be configured in any appropriate manner. For example, various processing tool component subroutines or control objects can be written to control the operation of the processing tool components used to perform various processing tool processing. The system control software 858 may be coded in any suitable computer readable programming language.
[0103] In some embodiments, the system control software 858 may include input / output control (IOC) sequencing instructions for controlling the various parameters described above. Other computer software and / or programs associated with the system controller 850 and stored in the mass storage device 854 and / or the memory device 856 may be employed in some embodiments. Examples of programs or program segments for this purpose include substrate positioning programs, process gas control programs, pressure control programs, heater control programs, and plasma control programs.
[0104] The substrate positioning program may contain program code for processing tool components used to load a substrate into the pedestal 818 and control the spacing between the substrate and other parts of the processing tool 800.
[0105] The process gas control program may include code for controlling gas composition (e.g., hydrocarbon gas, tungsten-containing precursor gas, silicon-containing precursor gas, nitrogen-containing gas, carrier gas, inert gas, and / or purge gas as described herein) and flow rate, and optionally code for flowing the gas into one or more process stations prior to deposition to stabilize the pressure in the process station. The pressure control program may include code for controlling the pressure within a process station by adjusting, for example, a throttle valve in an exhaust system of the process station, gas flow into the process station, and the like.
[0106] The heater control program may contain code for controlling the flow of current to a heating unit for heating the substrate. Alternatively, the heater control program may control the delivery of a heat transfer gas (such as helium) toward the substrate.
[0107] A plasma control program may include code for setting RF power levels applied to process electrodes within one or more process stations according to embodiments herein.
[0108] The pressure control program may include code for maintaining the pressure within the reaction chamber according to embodiments herein.
[0109] In some embodiments, there may be a user interface associated with the system controller 850. The user interface may include a display screen, a graphical software display of apparatus and / or process conditions, and user input devices such as a pointing device, keyboard, touch screen, microphone, and the like.
[0110] In some embodiments, the parameters adjusted by the system controller 850 may relate to process conditions. Non-limiting examples include process gas composition and flow rate, temperature, pressure, plasma conditions (e.g., RF bias power level), etc. These parameters may be provided to the user in the form of a recipe, which may be entered using the user interface.
[0111] Signals for monitoring the process may be provided from various process tool sensors by analog and / or digital input connections of the system controller 850. Signals for controlling the process may be output through analog and digital output connections of the process tool 800. Non-limiting examples of process tool sensors that may be monitored include mass flow controllers, pressure sensors (e.g., manometers), thermocouples, etc. Appropriately programmed feedback and control algorithms may be used with the data from these sensors to maintain process conditions.
[0112] The system controller 850 may provide program instructions for performing the above-described deposition process. The program instructions may control various process parameters, such as DC power level, RF bias power level, pressure, temperature, etc. The instructions may control these parameters to operate the in-situ deposition of the film stack according to the various embodiments described herein.
[0113] The system controller 850 will typically include one or more memory devices and one or more processors configured to execute instructions so that the apparatus will perform the methods described in accordance with the disclosed embodiments. A machine-readable medium containing instructions for controlling processing operations in accordance with the disclosed embodiments may be coupled to the system controller 850.
[0114] In some implementations, the system controller 850 is part of a system that can be part of the above-described embodiments. Such a system can include a semiconductor processing device that includes one or more processing tools, one or more processing chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems can be integrated with electronic devices for controlling their operations before, during, and after processing semiconductor wafers or substrates. The electronic device can be referred to as a "controller" that can control various elements or subcomponents of one or more systems. Depending on the processing requirements and / or the type of system, the system controller 850 can be programmed to control any process disclosed herein, including controlling process gas delivery, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer in and out of tools and other transfer tools and / or load locks connected to or interfaced with a specific system.
[0115] In a broad sense, the system controller 850 can be defined as an electronic device with various integrated circuits, logic, memory and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. The integrated circuit can include a chip in the form of firmware that stores program instructions, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions transmitted to the system controller 850 in the form of various separate settings (or program files) that define operating parameters for performing specific processing on or for a semiconductor wafer or system. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer for completing one or more processing steps during the preparation of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.
[0116] In some implementations, the system controller 850 may be part of or coupled to a computer that is integrated with, coupled to, otherwise networked to, or a combination of the system. For example, the system controller 850 may be in the "cloud" or may be all or part of a wafer fab host system, thereby allowing remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, examine the history of past manufacturing operations, examine trends or performance criteria for multiple manufacturing operations, change parameters of a current process, set processing steps to follow a current process, or start a new process. In some embodiments, a remote computer (e.g., a server) may provide a process recipe to the system over a network, which may include a local network or the Internet. The remote computer may include a user interface that allows for input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some embodiments, the system controller 850 receives instructions in the form of data that specify parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool to which the system controller 850 is configured to connect or control. Thus, as described above, the system controller 850 can be distributed, for example, by including one or more discrete controllers that are networked together and work toward a common goal (e.g., the processes and controls described herein). An embodiment of a distributed controller for these purposes can be one or more integrated circuits on the chamber that communicate with one or more remote integrated circuits (e.g., at a platform level or as part of a remote computer) that are combined to control the processes within the chamber.
[0117] Without limitation, example systems may include plasma etching chambers or modules, deposition chambers or modules, spin cleaning chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, ALD chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the preparation and / or manufacture of semiconductor wafers.
[0118] As described above, depending on the process step or steps to be performed by the tool, the system controller 850 can communicate with one or more other tool circuits or modules, other tool components, combination tools, other tool interfaces, adjacent tools, adjacent tools, tools located throughout the factory, a host computer, another controller, or tools used in material handling to move containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing facility.
[0119] Suitable apparatus for performing the methods disclosed herein are further discussed and described in U.S. patent application Ser. No. 13 / 084399, filed on April 11, 2011, entitled “Plasma Activated Conformal Film Deposition” (now U.S. Patent No. 8,728,956); U.S. patent application Ser. No. 13 / 084305, filed on April 11, 2011, entitled “Silicon Nitride Films and Methods,” each of which is incorporated herein in its entirety.
[0120] The apparatus / processes described herein can be used in conjunction with photolithographic patterning tools or processes, e.g., for preparing or manufacturing semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, though not necessarily, these tools / processes will be used or operated together in a common manufacturing facility. Photolithographic patterning of films typically involves some or all of the following operations, each of which enables multiple available tools: (1) coating a workpiece, i.e., substrate, with photoresist using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate or oven or UV curing tool; (3) exposing the photoresist to visible light or ultraviolet light or x-rays using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece using a dry or plasma assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
[0121] in conclusion
[0122] Although the above embodiments have been described in some detail for the purpose of clarity of understanding, it is apparent that certain variations and modifications may be implemented within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems and devices of the embodiments of the present invention. Therefore, the embodiments of the present invention should be considered illustrative rather than restrictive, and the embodiments are not limited to the details given herein.
Claims
1. A method for processing a substrate, comprising: providing a patterned semiconductor substrate having isolated features on an underlying material to be etched; filling the spaces between the features with an ashable filler such that top horizontal surfaces of the features are exposed and sidewalls of the features contact the ashable filler; depositing a metal-containing hard mask selectively on the exposed top horizontal surfaces of the features relative to the ashable fill after filling the spaces between the features; as well as removing the ashable fill relative to the feature and the metal-containing hard mask; wherein the feature contains a dielectric material.
2. The method according to claim 1, wherein: The filling between the features is performed to form a planar surface including the top horizontal surfaces of the features and the ashable fill.
3. The method according to claim 1, wherein: The filling between the features is done by spin coating.
4. The method according to claim 3, wherein: The spin coating is performed by injecting a carbon-containing fluid mixture onto the patterned semiconductor substrate and then performing thermal curing.
5. The method according to claim 3, wherein: The filling between the features is accomplished by spin coating followed by planarization to expose the top horizontal surfaces of the features.
6. The method according to claim 1 or 2, wherein: The filling between the features is accomplished by plasma enhanced chemical vapor deposition.
7. The method according to claim 6, wherein: The filling between the features further includes planarizing the patterned semiconductor substrate after the plasma enhanced chemical vapor deposition.
8. The method according to claim 6, wherein: The filling by plasma enhanced chemical vapor deposition comprises exposing the feature to a phase having the chemical formula C x H y A hydrocarbon precursor wherein X is an integer between 2 and 10, including 2 and 10, and Y is an integer between 2 and 24, including 2 and 24.
9. The method according to any one of claims 1 to 5, wherein: The selective deposition of the metal-containing hard mask is performed by one or more cycles of atomic layer deposition.
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