Display panel and display device

Abstract

The embodiments of the present disclosure provide a display panel and a display device, which relate to the field of display technology and are used to improve the bright spot problem of the display panel display screen while taking into account the problem of afterimage of the display panel display screen. The display panel includes a plurality of pixel circuits, and the pixel circuit includes a light-emitting device, a driving transistor, a first transistor, and a second transistor. The second electrode of the driving transistor is coupled to the light-emitting device, and the driving transistor is configured to control the magnitude of the current flowing through the first electrode and the second electrode in response to the voltage of the control electrode. The first electrode of the first transistor is coupled to the control electrode of the driving transistor, and the second electrode is configured to write a first initialization signal. The first electrode of the second transistor is coupled to the light-emitting device, and the second electrode is configured to write a second initialization signal. Among them, the first transistor includes at least two sub-transistors connected in series, and the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Currently, organic light-emitting diode (OLED) display devices have been increasingly widely used due to their advantages of self-luminescence, fast response speed, and low power consumption.

[0003] In an OLED display device, the OLED can be driven to emit light by a pixel driving circuit. The pixel driving circuit may include multiple thin film transistors (TFTs). Due to the nature of the thin film transistors themselves, when the thin film transistors are in the off state, there will be leakage current in the thin film transistors, which will cause bright spots and afterimages to appear on the display screen of the display device, making the display screen look worse. Summary of the invention

[0004] Embodiments of the present invention provide a display panel and a display device, which are used to improve the bright spot problem of a displayed picture of the display panel while taking into account the afterimage problem of the displayed picture of the display panel.

[0005] To achieve the above object, the embodiments of the present invention adopt the following technical solutions:

[0006] In the first aspect, a display panel is provided, which includes a plurality of pixel circuits, wherein the pixel circuit includes a light-emitting device, a driving transistor, a first transistor, and a second transistor. The driving transistor includes a first electrode, a second electrode, and a control electrode. In the driving transistor, the second electrode is coupled to the light-emitting device, and the driving transistor is configured to control the magnitude of the current flowing through the first electrode and the second electrode in response to the voltage of the control electrode. The first transistor includes a first electrode, a second electrode, and a control electrode. In the first transistor, the first electrode is coupled to the control electrode of the driving transistor, and the second electrode is configured to write a first initialization signal. The second transistor includes a first electrode, a second electrode, and a control electrode. In the second transistor, the first electrode is coupled to the light-emitting device, and the second electrode is configured to write a second initialization signal. The first transistor includes at least two sub-transistors connected in series, and the control electrodes of at least two gold kicking halls are coupled to each other to form the control electrode of the first transistor, and the width-to-length ratio of the channel of at least one sub-transistor is less than the width-to-length ratio of the channel of the second transistor.

[0007] In some embodiments, in at least two sub-transistors, the width-to-length ratios of the channels of the sub-transistors are the same.

[0008] In some embodiments, the width of the channel of each sub-transistor is equal to the width of the channel of the second transistor.

[0009] In some embodiments, a length of a channel of at least one sub-transistor is 0.8-1.2 μm greater than a length of a channel of the second transistor.

[0010] In some embodiments, a channel of at least one sub-transistor has a width of 2.0-3.0 μm and a length of 2.7-4.0 μm.

[0011] In some embodiments, a channel of at least one sub-transistor has a width of 2.3±0.2 μm and a length of 3.5±0.2 μm.

[0012] In some embodiments, a width of a channel of the driving transistor is greater than a width of a channel of the second transistor.

[0013] In some embodiments, the width of the channel of the driving transistor is 3.0±0.2 μm.

[0014] In some embodiments, the pixel circuit also includes at least one of a capacitor, a fourth transistor, a third transistor, a fifth transistor, and a sixth transistor; wherein the capacitor includes a first electrode and a second electrode, the first electrode is coupled to the control electrode of the driving transistor, and the second electrode is configured to write a power supply voltage signal; the third transistor includes a first electrode, a second electrode, and a control electrode, in the third transistor, the second electrode is coupled to the first electrode of the driving transistor, and the first electrode is configured to write a data signal; the fourth transistor includes a first electrode, a second electrode, and a control electrode, in the fourth transistor, the first electrode is coupled to the second electrode of the driving transistor, and the second electrode is coupled to the control electrode of the driving transistor; the fifth transistor includes a first electrode, a second electrode, and a control electrode, in the fifth transistor, the second electrode is coupled to the first electrode of the driving transistor, and the first electrode is configured to write the power supply voltage signal; the sixth transistor includes a first electrode, a second electrode, and a control electrode, in the sixth transistor, the first electrode is coupled to the second electrode of the driving transistor, and the second electrode is coupled to the light-emitting device.

[0015] In some embodiments, the plurality of pixel circuits include a first pixel circuit located in the N-1th row and a second pixel circuit located in the Nth row. The display panel further includes a reset control signal line. The first pixel circuit and the second pixel circuit are pixel circuits provided by any of the above embodiments. The control electrode of the first transistor in the second pixel circuit and the control electrode of the second transistor in the first pixel circuit are both coupled to the reset control signal line. Wherein N is an integer greater than 1.

[0016] In some embodiments, in the first transistor of the second pixel circuit, the control electrodes of the sub-transistors are coupled to each other and form an integrated pattern, and the integrated pattern is coupled to the reset control signal line. The reset control signal line, the integrated pattern, and the control electrode of the second transistor in the first pixel circuit are located in the same pattern layer, and the width of the integrated pattern is greater than the width of the control electrode of the second transistor and greater than the width of the reset control signal line.

[0017] In some embodiments, the pixel circuit includes a fourth transistor, a third transistor, a fifth transistor, and a sixth transistor. The display panel also includes a first light-emitting control signal line and a second light-emitting control signal line, the control electrode of the fifth transistor and the control electrode of the sixth transistor in the first pixel circuit are coupled to the first light-emitting control signal line, and the control electrode of the fifth transistor and the control electrode of the sixth transistor in the second pixel circuit are coupled to the second light-emitting control signal line. The display panel also includes a first scan signal line and a second scan signal line, the control electrode of the fourth transistor and the control electrode of the third transistor in the first pixel circuit are coupled to the first scan signal line, and the control electrode of the fourth transistor and the control electrode of the third transistor in the second pixel circuit are coupled to the second scan signal line. Wherein, the first light-emitting control signal line, the second light-emitting control signal line, the first scan signal line, the second scan signal line and the integrated pattern are located in the same pattern layer.

[0018] In some embodiments, the pixel circuit includes a capacitor, and the second plate of the capacitor is configured to write a power supply voltage signal. The first plate and the integral pattern are located in the same pattern layer.

[0019] In a second aspect, a display device is provided, comprising the display panel provided by any one of the above embodiments.

[0020] In a transistor, the smaller the width-to-length ratio of the channel is, the worse the conduction performance of the transistor is, and the smaller the leakage current of the transistor in the cut-off state can be. In the pixel circuit provided by the embodiment of the present disclosure, in the first transistor, the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor. Therefore, compared with the second transistor, the overall conduction performance of the first transistor can be poor, and in the process of light emission of the light-emitting device, the leakage current of the first transistor in the cut-off state can be smaller, which can improve the bright spot problem in the display screen. In addition, since the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor, the width-to-length ratio of the channel of the second transistor can be larger. Therefore, the conduction performance of the second transistor can be better, so that the second transistor can better initialize the light-emitting device, and the problem of afterimage of the display screen of the display panel can be improved. That is, the pixel circuit provided by the embodiment of the present disclosure can improve the bright spot problem of the display screen of the display panel under the premise of taking into account the improvement of the afterimage problem of the display screen of the display panel.

[0021] It can be understood that the display device provided in the second aspect includes the above-mentioned display panel, and the beneficial effects that can be achieved can refer to the beneficial effects of the pixel circuit above, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 A top view of a display panel provided for some embodiments of the present disclosure;

[0024] Figure 2 A structural diagram of a display panel provided for some embodiments of the present disclosure;

[0025] Figure 3 An equivalent circuit diagram of a pixel circuit provided for some embodiments of the present disclosure;

[0026] Figure 4 A structural diagram of a light-emitting device in a pixel circuit provided for some embodiments of the present disclosure;

[0027] Figure 5 An equivalent circuit diagram of a pixel circuit provided for some embodiments of the present disclosure;

[0028] Figure 6 A top view of a display panel provided for some embodiments of the present disclosure;

[0029] Figure 7 A top view of a pattern layer in a display panel provided in some embodiments of the present disclosure;

[0030] Figure 8 A top view of a pattern layer in a display panel provided in some embodiments of the present disclosure;

[0031] Fig. 9 A top view of a plurality of pattern layers in a display panel provided for some embodiments of the present disclosure;

[0032] Fig.10 for Fig. 9 A partial enlarged view of the middle area B;

[0033] Fig.11 A structural diagram of a display panel provided for some embodiments of the present disclosure;

[0034] Fig.12 A top view of a display panel provided for some embodiments of the present disclosure;

[0035] Fig.13 A top view of multiple pattern layers of a display panel provided for some embodiments of the present disclosure. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0038] Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and other forms thereof, such as the third person singular form "comprises" and the present participle form "comprising", are to be interpreted as open, inclusive, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0039] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0040] When describing some embodiments, the expressions "coupled" and "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other. For another example, when describing some embodiments, the term "coupled" may be used to indicate that two or more components are in direct physical or electrical contact. However, the term "coupled" or "communicatively coupled" may also refer to two or more components that are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0041] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0042] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0043] "Plurality" means at least two.

[0044] The use of "adapted to" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0045] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0046] As used herein, "about," "approximately," or "substantially" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0047] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0048] The transistor in this article can be an N-type transistor or a P-type transistor, and the embodiments of the present disclosure are not particularly limited to this. The following will take the transistor as a P-type transistor as an example. It can be understood that the transistor is an N-type transistor and can also implement the solution of the present disclosure and obtain the corresponding technical effect.

[0049] Some embodiments of the present disclosure provide a display device. The display device is a product with an image (including: static image or dynamic image, wherein the dynamic image may be a video) display function. For example, the display device may be: a display, a television, a billboard, a digital photo frame, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a digital camera, a portable camcorder, a viewfinder, a navigator, a vehicle, a large-area wall, a home appliance, an information query device (such as business query devices of e-government, banks, hospitals, power departments, etc.), a monitor, etc.

[0050] In some embodiments, the display device may include a display panel and may also include a driving circuit coupled to the display panel. The driving circuit is configured to provide an electrical signal to the display panel. Exemplarily, the driving circuit may include: a data driving circuit (for example, a source driving circuit, Source Driver IC), configured to provide a data signal (also referred to as a data driving signal) to the display panel; a scanning driving circuit, configured to provide a scanning signal to the display panel. The driving circuit may also include a timing control circuit (also referred to as a timing controller, Timer Control Register, referred to as TCON for short), the timing control circuit may be coupled to the data driving circuit and the scanning driving circuit, configured to provide a control signal to the scanning driving circuit and provide a control signal and image data to the data driving circuit. In some possible implementations, the scanning driving circuit may be integrated on the display panel. At this point, it can also be said that the display panel includes a scanning driving circuit, and the scanning driving circuit may be referred to as GOA (Gate Driver on Array, a scanning driving circuit arranged on an array substrate).

[0051] Some embodiments of the present disclosure further provide a display panel, which may be included in the display device provided in any of the above embodiments. The display panel may be one of an OLED (Organic Light Emitting Diode) display panel, a QLED (Quantum Dot Light Emitting Diodes) display panel, and a micro LED (including: miniLED or microLED, LED is a light emitting diode) display panel.

[0052] Figure 1 The structure of the display panel provided by some embodiments of the present disclosure is shown. Figure 1 The display panel 1 may have a display area AA and a peripheral area SA located on at least one side (e.g., one side; for example, all around, i.e., including upper and lower sides and left and right sides) of the display area AA. The display panel 1 includes a plurality of pixel circuits 10 arranged in the display area AA. The pixel circuit 10 may include a light-emitting device 100 and a pixel driving circuit 200 for controlling the light-emitting device 100 to emit light. The pixel driving circuit 200 may be configured to drive the light-emitting device 100 to emit light in response to received data signals and scan signals, and the brightness of the light emitted by the light-emitting device 100 may be positively correlated with the voltage of the data signal. In the display area AA, the pixel driving circuit 200 may be distributed in an array.

[0053] In some embodiments, the display panel 1 may further include a plurality of signal lines. For example, the plurality of signal lines may be located in the display area and coupled to the pixel circuits in the display area. Figure 2 , Figure 2 for Figure 1 A pixel circuit 10 (eg, each pixel circuit 10 ) may be coupled to a plurality of signal lines, and each signal line may be configured to write an electrical signal to the pixel circuit 10 .

[0054] In some embodiments, the plurality of signal lines may include at least one of a data line D, a first power line EL1, a second power line EL2, a reset control signal line R, a light emitting control signal line E, and a scan signal line G. The plurality of signal lines may also include an initialization signal line Vi ( Figure 2 ). Wherein, the data line D can be configured to write a data signal Da to the pixel circuit 10; the first power line EL1 can be configured to write a first power voltage signal ELVDD to the pixel circuit 10; the second power line EL2 can be configured to write a second power voltage signal ELVSS to the pixel circuit 10; the reset control signal line R can be configured to write a reset control signal Sc1 to the pixel circuit 10; the light control signal line E can be configured to write a light control signal Sc2 to the pixel circuit 10; the scan signal line G can be configured to write a scan signal Sc3 to the pixel circuit 10; the initialization signal line Vi can be configured to write an initialization signal Vinit to the pixel circuit 10 (not shown in the figure). Wherein, the data signal Da, the first power voltage signal ELVDD, the second power voltage signal ELVSS, the reset control signal Sc1, the light control signal Sc2, the scan signal Sc3, and the initialization signal Vinit can be voltage signals or other types of electrical signals, and the embodiments of the present disclosure are not limited to this. Wherein, the voltage of the first power voltage signal ELVDD can be greater than the voltage of the second power voltage signal ELVSS. In addition, it should be noted that, Figure 2 The subscript of the corresponding reference numeral of the signal line in FIG. 1 is used to indicate the serial number of the signal line. M Indicates the Mth data line.

[0055] Some embodiments of the present disclosure further provide a pixel circuit, which may be a pixel circuit in the display panel of any of the above embodiments.

[0056] Figure 3 is the equivalent circuit diagram of the pixel circuit. Figure 3Based on the above description, the pixel circuit 10 may include a light emitting device 100 and a pixel driving circuit coupled to the light emitting device 100. The light emitting device 100 may be, for example, an organic light emitting diode OLED, a quantum dot light emitting diode QLED, or a light emitting diode LED, but is not limited thereto. The embodiments of the present disclosure do not limit the type of the light emitting device 100, that is, the light emitting device 100 may be any other light emitting device (e.g., a light emitting device that emits light by discharge), as long as they can emit light in response to an electrical signal so that the display panel can display a picture. In some embodiments, the light emitting device 100 is an OLED.

[0057] In some embodiments, see Figure 4 The light emitting device 100 may be an OLED, and the light emitting device 100 may include a first electrode 110 , a second electrode 130 , and a light emitting functional layer 120 located between the first electrode 110 and the second electrode 130 .

[0058] Exemplarily, the first electrode 110 may be coupled to a pixel driving circuit, and the pixel driving circuit may provide a variable voltage electrical signal to the first electrode 110; the second electrode 130 may be coupled to a power line, and the power line may provide a fixed voltage to the second electrode 130. Exemplarily, the first electrode 110 is an anode, and correspondingly, the second electrode 130 is a cathode; the first electrode 110 is configured to be connected to the first power line (configured to transmit) through the pixel driving circuit. Figure 3 The first power signal ELVDD in the second electrode 130 is coupled to the second power line (configured to transmit Figure 3 1 and 13. In another exemplary embodiment, the first electrode 110 is a cathode, and correspondingly, the second electrode 130 is an anode; the first electrode 110 is coupled to the second power line through the pixel driving circuit, and the second electrode 130 is coupled to the first power line.

[0059] The light-emitting functional layer 120 may have a single-layer structure or a multi-layer structure. Exemplarily, the light-emitting functional layer 120 may include a light-emitting layer, and the light-emitting functional layer may also include: at least one of a hole injection layer, a hole transport layer, and an electron blocking layer located between the anode and the light-emitting layer, and may also include: at least one of a hole blocking layer, an electron transport layer, and an electron injection layer located between the light-emitting layer and the cathode. Among them, the light-emitting layer in a light-emitting device 100 may be a red light-emitting layer, a green light-emitting layer, a blue light-emitting layer, or a white light-emitting layer.

[0060] It should be noted that the structures of other types of light-emitting devices (such as QLED or LED) can also refer to the structure of OLED described above, and the specific structures of other types of light-emitting devices will not be repeated here.

[0061] Continue to see Figure 3 , the pixel driving circuit may include a plurality of transistors T. Specifically, the pixel driving circuit may include a driving transistor Td, a first transistor T1, and a second transistor T2.

[0062] Wherein, the driving transistor Td includes a first electrode Td1, a second electrode Td2 and a control electrode Td3. The driving transistor Td is configured to control the magnitude of the current flowing through the first electrode Td1 and the second electrode Td2 in response to the voltage of the control electrode Td3. Exemplarily, in the driving transistor Td, the control electrode Td3 can be configured to write an electrical signal, and in response to the voltage of the electrical signal, the driving transistor Td can control the magnitude of the current flowing through the first electrode Td1 and the second electrode Td2. The voltage magnitude of the electrical signal is different, and the magnitude of the current flowing through the first electrode Td1 and the second electrode Td2 is different. In some possible implementations, the electrical signal written into the control electrode Td3 can be a data signal Da or a data-related signal Da' (i.e., an electrical signal related to the data signal Da), so that the voltage on the control electrode Td3 can be related to the voltage Vdata of the data signal Da written into the pixel driving circuit, for example, the voltage magnitude of the electrical signal is positively correlated with the magnitude of the voltage Vdata of the data signal Da. Based on this, the magnitude of the current flowing through the first electrode Td1 and the second electrode Td2 can be controlled by providing different data signals Da to the pixel driving circuit.

[0063] The second electrode Td2 is coupled to the light emitting device 100. Exemplarily, the second electrode Td2 can be coupled to the first electrode of the light emitting device 100, so that the driving transistor Td and the light emitting device 100 are connected in series on a line between the first power line EL1 and the second power line EL2. Since the driving transistor Td and the light emitting device 100 are connected in series, the current flowing through the first electrode Td1 and the second electrode Td2 can flow into the light emitting device 100, and the light emitting device 100 can be driven to emit light by the current. Specifically, the light emitting brightness of the light emitting device 100 can be controlled by the current. That is, in the pixel circuit 10, the currents flowing through the first electrode Td1 and the second electrode Td2 of the driving transistor are different in magnitude, and the light emitting brightness of the light emitting device 100 can change accordingly.

[0064] In some embodiments, the first electrode Td1 of the driving transistor may be coupled to the first power line EL1, so that the first power voltage signal ELVDD may be written to the first electrode Td1 of the driving transistor. In some possible implementations, the second electrode Td2 of the driving transistor is coupled to the first electrode of the light emitting device 100, and the second electrode of the light emitting device 100 is coupled to the second power line EL2, so that the first electrode Td1 of the driving transistor may be coupled to the first power line EL1, and the second electrode Td2 of the driving transistor may be coupled to the second power line EL2 through the light emitting device 100. There may be a voltage difference between the first power voltage signal ELVDD on the first power line EL1 and the second power voltage signal ELVSS on the second power line EL2, so that a current flowing through the first electrode Td1 and the second electrode Td2 of the driving transistor, and a current flowing through the light emitting device 100 may be generated.

[0065] The first transistor T1 includes a first electrode T11, a second electrode T12 and a control electrode T13. In the first transistor T1, the first electrode T11 is coupled to the control electrode Td3 of the driving transistor, and the second electrode T12 is configured to write a first initialization signal Vinit1. In this way, when the first transistor T1 is in the on state, the first initialization signal Vinit1 can be written to the control electrode Td3 of the driving transistor through the first transistor T1. By writing the first initialization signal Vinit1 to the control electrode Td3 of the driving transistor, the driving transistor Td can be initialized, so that in the subsequent working stage, the driving transistor Td can be switched from the initialization state to other working states. For example, in the subsequent working stage, the voltage of the control electrode Td3 of the driving transistor can be switched from the voltage corresponding to the initialization signal Vinit1 to other working voltages. In this way, the afterimage phenomenon of the display panel can be improved and the display stability can be improved.

[0066] In some possible implementations, the initialization signal line includes a first initialization signal line, and the first initialization signal line is configured to write a first initialization signal Vinit1 to the pixel circuit 10. The second electrode T12 of the first transistor can be coupled to the first initialization signal line, so that the first initialization signal Vinit output by the first initialization signal line can be written into the second electrode T12 of the first transistor.

[0067] In some embodiments, the control electrode T13 of the first transistor may be configured to control the on and off of the first transistor T1, that is, in response to the voltage of the control electrode T13, the first transistor T1 may be turned on and off. Exemplarily, the control electrode T13 of the first transistor may be coupled to a reset control signal line, and a reset control signal Sc1 output by the reset control signal line may be written into the control electrode T13. In response to the voltage of the reset control signal Sc1, the first transistor T1 may be turned on and off.

[0068] The first transistor T1 includes at least two (for example, two; for example, more than three) sub-transistors connected in series, and the at least two sub-transistors include a sub-transistor T1a and a sub-transistor T1b. Similarly, the sub-transistor includes a first electrode, a second electrode, and a control electrode. For example, the sub-transistor T1a includes a first electrode T1a1, a second electrode T1a2, and a control electrode T1a3; the sub-transistor T1b includes a first electrode T1b1, a second electrode T1b2, and a control electrode T1b3.

[0069] The control electrodes of at least two (for example, two; for example, more than three) sub-transistors connected in series are coupled to each other as the control electrode T13 of the first transistor. Exemplarily, the first transistor T1 includes two sub-transistors connected in series, namely, sub-transistor T1a and sub-transistor T1b. The control electrode T1a3 of sub-transistor T1a and the control electrode T1b3 of sub-transistor T1b are coupled to each other as the control electrode T13 of the first transistor. In response to the voltage of the control electrode T13, the sub-transistor T1a and the sub-transistor T1b can be turned on and off at the same time.

[0070] The second transistor T2 may include a first electrode T21, a second electrode T22, and a control electrode T23. In the second transistor T2, the first electrode T21 is coupled to the light-emitting device 100. For example, the first electrode T21 may be coupled to the first electrode of the light-emitting device 100. The second electrode T22 is configured to write a second initialization signal Vinit2. In this way, when the second transistor T2 is in the on state, the second initialization signal Vinit2 may be written to the light-emitting device 100 through the second transistor T2. By writing the second initialization signal Vinit2 to the light-emitting device 100, the light-emitting device 100 may be initialized, so that in a subsequent working stage, the light-emitting device 100 may be switched from the initialization state to other working states. For example, in a subsequent working stage, the voltage on the first electrode of the light-emitting device 100 may be switched from the voltage corresponding to the second initialization signal Vinit2 to other working voltages. In some possible implementations, the second initialization signal Vinit2 may be a low-voltage electrical signal. When the low-voltage electrical signal is written to the first electrode of the light-emitting device 100, the driving current in the light-emitting device 100 may be small or no driving current, so that the light-emitting device 100 emits light with a small brightness or no light, that is, the pixel circuit 10 including the light-emitting device 100 may display a black color block. In the subsequent working stage, the pixel circuit 10 switches from the state of displaying a black color block to the state of displaying other color blocks. In this way, the afterimage problem of the display panel display screen can be improved, and the display stability can be improved.

[0071] In some possible implementations, the initialization signal line further includes a second initialization signal line, and the second initialization signal line is configured to write a second initialization signal Vinit2 to the pixel circuit 10. The second electrode T22 of the second transistor can be coupled to the second initialization signal line, so that the second initialization signal Vinit2 output by the second initialization signal line can be written into the second electrode T22 of the second transistor.

[0072] In some embodiments, the control electrode T23 of the second transistor can be configured to control the conduction and cut-off of the second transistor T2, that is, in response to the voltage of the control electrode T23, the second transistor T2 can be turned on and off. Exemplarily, the control electrode T23 of the second transistor can be coupled to the reset control signal line, and the reset control signal Sc1 output by the reset control signal line can be written into the control electrode T23. In response to the voltage of the reset control signal Sc1, the second transistor T2 can be turned on and off.

[0073] Based on the above structure of the pixel circuit 10 , illustratively, the workflow of the pixel circuit 10 may include: a stage of initializing the driving transistor Td, a stage of initializing the light emitting device 100 , a data writing stage, and a light emitting stage.

[0074] In the stage of initializing the driving transistor Td, the first transistor T1 is turned on, and the first initialization signal Vinit1 can be written into the control electrode Td3 of the driving transistor Td through the first transistor T1, so as to initialize the driving transistor Td.

[0075] During the initialization of the light emitting device 100 , the second transistor T2 is turned on, and the second initialization signal Vinit2 can be written into the light emitting device 100 through the second transistor T2 . For example, the second initialization signal Vinit2 can be written into the first electrode of the light emitting device 100 , thereby initializing the light emitting device 100 .

[0076] In the data writing phase, the first transistor T1 is in the cut-off state, and the control electrode Td3 of the driving transistor writes an electrical signal. Exemplarily, the electrical signal may be a data signal Da or a data-related signal Da′.

[0077] In the light emitting stage, the first transistor T1 is in the off state, and the second transistor T2 is in the off state. In the driving transistor Td, in response to the voltage of the control electrode Td3 of the driving transistor, the driving transistor Td is turned on to generate a current driving the light emitting device 100 to emit light, and the current is output to the light emitting device 100, so that the light emitting device 100 emits light.

[0078] As described above, the driving transistor Td can control the current flowing through the first electrode Td1 and the second electrode Td2 in response to the voltage of the control electrode Td3, thereby controlling the luminous brightness of the light-emitting device 100. The voltage on the control electrode Td3 is different, and the luminous brightness of the light-emitting device 100 can be changed. In some related technologies, the leakage current of the first transistor in the cut-off state is large, that is, when the first transistor is in the cut-off state, the current flowing between the first electrode and the second electrode of the first transistor is large. Because the first electrode of the first transistor is coupled to the control electrode Td3 of the driving transistor, therefore, in the light-emitting stage, due to the leakage current, the voltage on the control electrode Td3 of the driving transistor can be reduced. Taking the driving transistor Td as a P-type transistor as an example, due to the reduction of the voltage of the control electrode Td3 of the driving transistor, the current driving the light-emitting device 100 to emit light in the pixel circuit of the related technology will be large, so that the brightness of the light-emitting device 100 is too large, and then the color block displayed by the pixel circuit is too bright, so that there are bright spots in the display screen of the display panel.

[0079] In order to solve the above problems, in the pixel circuit provided by some embodiments of the present disclosure, in the first transistor T1, the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor T2. For a transistor, the smaller the width-to-length ratio of the channel, the worse the conduction performance of the transistor, for example, the larger the threshold voltage Vth of the transistor can be. Taking the transistor as a P-type transistor as an example, a lower voltage needs to be written on its control electrode to turn on the transistor. In addition, the smaller the width-to-length ratio of the channel, the smaller the leakage current of the transistor in the off state can be due to the poor conduction performance of the transistor. Based on this, since the width-to-length ratio of the channel of at least one sub-transistor in the first transistor is smaller than the width-to-length ratio of the channel of the second transistor, the conduction performance of the first transistor as a whole can be poorer than that of the second transistor. In the process of light emission of the light-emitting device, the leakage current of the first transistor in the off state can be smaller, which can improve the bright spot problem described above.

[0080] In addition, since the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor, the width-to-length ratio of the channel of the second transistor can be larger. As described above, the second transistor can be configured to initialize the light-emitting device, which can improve the afterimage phenomenon of the display panel. Since the width-to-length ratio of the channel of the second transistor can be larger, the conduction performance of the second transistor can be better and will not affect the initialization of the light-emitting device by the second transistor. That is, the pixel circuit provided in the embodiment of the present disclosure can improve the bright spot problem of the display panel display screen while taking into account the afterimage problem of the display panel display screen.

[0081] In some embodiments, in at least two sub-transistors of the first transistor T1, the width-to-length ratio of the channels of the sub-transistors is the same. That is, the width-to-length ratio of the channels of the sub-transistors is the same and is smaller than the width-to-length ratio of the second transistor T2. In this way, the width-to-length ratio of the entire channel of the first transistor T1 can be further reduced, thereby further reducing the leakage current of the first transistor T1 in the off state, so that the bright spot problem is better improved.

[0082] In some embodiments, the pixel circuit may further include at least one of a capacitor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. Figure 5 FIG. 1 is an equivalent circuit diagram of a pixel circuit, showing the connection relationship between the above-mentioned components. Figure 5 The above components are described in detail respectively.

[0083] The capacitor C includes a first plate S1 and a second plate S2, the first plate S1 is coupled to the control electrode Td3 of the driving transistor, and the second plate S2 is configured to write the first power supply voltage signal ELVDD. Exemplarily, the second plate S2 can be coupled to the first power line EL1, and the first power supply voltage signal ELVDD output by the first power line EL1 can be written into the second plate S2 of the capacitor. The capacitor C can be configured to store an electrical signal, and the electrical signal can be written into the control electrode Td3 of the driving transistor when the light-emitting device 100 is in the light-emitting stage, so that the driving transistor can generate a current that drives the light-emitting device 100 to emit light in response to the electrical signal.

[0084] The third transistor T3 includes a first electrode T31, a second electrode T32 and a control electrode T33. In the third transistor T3, the second electrode T32 is coupled to the first electrode Td1 of the driving transistor, and the first electrode T31 is configured to write the data signal Da. Exemplarily, the first electrode T31 can be coupled to the data line D, and the data signal Da output by the data line D can be written into the first electrode T31. The control electrode T33 can be configured to control the conduction and cut-off of the third transistor T3, that is, in response to the voltage of the control electrode T33, the third transistor T3 can be turned on and off. Exemplarily, the control electrode T33 of the third transistor can be coupled to the scan signal line, and the scan signal Sc3 output by the scan signal line can be written into the control electrode T33 of the third transistor, and in response to the scan signal Sc3, the third transistor T3 can be turned on and off.

[0085] The fourth transistor T4 includes a first electrode T41, a second electrode T42 and a control electrode T43. In the fourth transistor T4, the first electrode T41 is coupled to the second electrode Td2 of the driving transistor, and the second electrode T42 is coupled to the control electrode Td3 of the driving transistor. Due to the above-mentioned structure of the third transistor T3 and the fourth transistor T4, the second electrode T32 of the third transistor T3 can be coupled to the control electrode Td3 of the driving transistor through the driving transistor Td and the fourth transistor T4. The control electrode T43 of the fourth transistor can be configured to control the conduction and cut-off of the fourth transistor T4, that is, in response to the voltage of the control electrode T43, the fourth transistor T4 can be turned on and off. Exemplarily, the control electrode T43 of the fourth transistor can be coupled to the scan signal line, and the scan signal Sc3 output by the scan signal line can be written into the control electrode T43 of the fourth transistor, and in response to the scan signal Sc3, the fourth transistor can be turned on and off. In some embodiments, a scan signal line can be coupled to the control electrode T33 of the third transistor, and can also be coupled to the control electrode T43 of the fourth transistor, so the third transistor T3 and the fourth transistor T4 can be turned on or off at the same time. In other embodiments, the third transistor T3 can be coupled to a scan signal line, and the fourth transistor T4 can be coupled to another scan signal line, so that the third transistor T3 and the fourth transistor T4 can be controlled separately through the two scan signal lines.

[0086] The fifth transistor T5 includes a first electrode T51, a second electrode T52 and a control electrode T53. In the fifth transistor T5, the second electrode T52 is coupled to the first electrode Td1 of the driving transistor, and the first electrode T51 is configured to write the first power supply voltage signal ELVDD. Exemplarily, the first electrode T51 can be coupled to the first power line EL1, and the first power supply signal ELVDD output by the first power line EL1 can be written into the first electrode T51 of the fifth transistor. Therefore, when the fifth transistor T5 is turned on, the first power supply signal ELVDD can be written into the first electrode Td1 of the driving transistor through the fifth transistor T5. The control electrode T53 of the fifth transistor can be configured to control the conduction and cut-off of the fifth transistor T5, that is, in response to the voltage of the control electrode T53, the fifth transistor T5 can be turned on and off. Exemplarily, the control electrode T53 of the fifth transistor can be coupled to the light emitting control signal line, and the light emitting control signal Sc2 output by the light emitting control signal line can be written into the control electrode T53 of the fifth transistor, and in response to the light emitting control signal Sc2, the fifth transistor can be turned on and off.

[0087] The sixth transistor T6 includes a first electrode T61, a second electrode T62 and a control electrode T63. In the sixth transistor T6, the first electrode T61 is coupled to the second electrode Td2 of the driving transistor, and the second electrode T62 is coupled to the light emitting device 100, for example, coupled to the first electrode of the light emitting device 100. In this way, when the sixth transistor T6 is turned on, the current output from the driving transistor Td can be input into the light emitting device 100, thereby driving the light emitting device 100 to emit light. The control electrode T63 of the sixth transistor can be configured to control the conduction and cut-off of the sixth transistor T6, that is, in response to the voltage of the control electrode T63, the sixth transistor T6 can be turned on and off. Exemplarily, the control electrode T63 of the sixth transistor can be coupled to the light emitting control signal line, and the light emitting control signal Sc2 output by the light emitting control signal line can be written into the control electrode of the sixth transistor, and in response to the light emitting control signal Sc2, the sixth transistor T6 can be turned on and off. In some embodiments, a light emitting control signal line can be coupled to the control electrode T51 of the fifth transistor, and can also be coupled to the control electrode T61 of the sixth transistor, so that the fifth transistor T5 and the sixth transistor T6 can be turned on or turned off at the same time. In other embodiments, the control electrode T53 of the fifth transistor can be coupled to a light emitting control signal line, and the control electrode T63 of the sixth transistor can be coupled to another light emitting control signal line, so that the fifth transistor T5 and the sixth transistor T6 can be controlled separately through the two light emitting control signal lines.

[0088] Exemplarily, based on the above structure of the pixel circuit 10 , the workflow of the pixel circuit 10 may include: a stage of initializing the driving transistor Td, a stage of initializing the light-emitting device 100 , a data writing stage, and a light-emitting stage.

[0089] Specifically, in the stage of initializing the driving transistor Td, the first transistor T1 can be turned on, and the first initialization signal Vinit1 is written into the control electrode Td3 of the driving transistor through the first transistor T1 to realize the initialization of the driving transistor Td. Exemplarily, in the stage of initializing the driving transistor Td, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 can be turned off.

[0090] During the initialization of the light emitting device 100 , the second transistor T2 may be turned on, and the second initialization signal Vinit2 is written into the light emitting device 100 , for example, into the first electrode of the light emitting device 100 , through the second transistor T2 , to initialize the light emitting device 100 .

[0091] In the data writing stage, the first transistor T1 and the fifth transistor T5 are turned off. The driving transistor Td, the third transistor T3, and the fourth transistor T4 are turned on. The capacitor C can be charged by the third transistor T3, the driving transistor Td, and the fourth transistor T4. Due to the characteristics of the driving transistor Td itself, when the voltage of the node N1 becomes Vdata+Vth, the driving transistor Td is turned off, the charging process ends, and the voltage of the electrical signal written into the first plate S1 of the capacitor C is Vdata+Vth, where Vdata represents the voltage of the data signal Da, and Vth represents the threshold voltage of the driving transistor Td. The second plate S2 of the capacitor C is written with the first power supply voltage signal ELVDD due to being coupled to the first power supply line EL2.

[0092] In some possible implementations, the data writing phase and the initialization phase of the light emitting device 100 may be performed simultaneously. That is, the third transistor T3, the fourth transistor T4, the driving transistor Td, and the second transistor T2 may be turned on, and the fifth transistor T5, the sixth transistor T6, and the first transistor T1 may be turned off, so that the capacitor C may be charged and the light emitting device 100 may be initialized at the same time.

[0093] In the light emitting stage, the fifth transistor T5 and the sixth transistor T6 are turned on. The first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned off. The driving transistor Td is turned on in response to the voltage of the electric signal on the control electrode Td3, and the electric signal may be the electric signal written into the first electrode plate S1 of the capacitor C in the data writing stage, so that a current flowing through the first electrode Td1 and the second electrode Td2 of the driving transistor can be generated, and the current can be output to the light emitting device 100 to drive the light emitting device 100 to emit light.

[0094] Figure 6 A partial enlarged view of a portion of a pixel circuit in a display panel provided in some embodiments of the present disclosure. It should be noted that, in order to make the illustration clearer, Figure 6 The entire structure of the light emitting device 100 is not shown, and only the first electrode of the light emitting device 100 is shown to illustrate the position and connection relationship of the light emitting device 100. Figure 6 The display panel may have a multi-layer structure. Exemplarily, the display panel may include an active layer 300 , a first pattern layer 400 , a second pattern layer 500 , and a third pattern layer 600 disposed on a substrate S.

[0095] The active layer 300 and the first pattern layer 400 overlap each other to form a transistor, such as a driving transistor Td, a first transistor T1, and a second transistor T2, and one or more of a third transistor T3, a fourth transistor T4, a fifth transistor T5, and a sixth transistor T6. The transistor formed by the overlap of the active layer 300 and the first pattern layer 400 can be called a thin film transistor.

[0096] The material of the active layer 300 is, for example, a semiconductor material. A portion of the pattern of the active layer 300 may be conductorized by a doping process. For example, the portion of the source layer 300 that is not directly facing the first pattern layer 400 in a direction perpendicular to the substrate S (for example, parallel to the z-axis direction) may be conductorized. The conductorized portion may serve as the source region and the drain region of the transistor. The source region may be the first electrode of the transistor, and the drain region may be the second electrode of the transistor; or, the source region may be the second electrode of the transistor, and the drain region may be the first electrode of the transistor. The material of the first pattern layer 400 may be a conductive material, such as a metal or an alloy.

[0097] In order to explain the active layer and the first pattern layer in more detail, Figure 7 is the top view of the active layer. Figure 8 is a top view of the first pattern layer, Fig. 9 A top view of the stacked active layer and the first pattern layer. Figure 8 and Fig. 9 In a direction perpendicular to the substrate S (e.g., parallel to the z-axis direction), a portion of the first conductive layer 400 directly opposite to the active layer 300 may include control electrodes of one or more transistors. For example, the first conductive layer 400 may include a control electrode T13 of a first transistor (e.g., a control electrode T1a3 of a sub-transistor T1a and a control electrode T1b3 of a sub-transistor T1b), a control electrode T23 of a second transistor, a control electrode Td3 of a driving transistor, and may also include one or more of a control electrode T33 of a third transistor, a control electrode T43 of a fourth transistor, a control electrode T53 of a fifth transistor, and a control electrode T63 of a sixth transistor.

[0098] See also Figure 7 and Fig. 9, in a direction perpendicular to the substrate S (e.g., parallel to the z-axis direction), the portion of the active layer 300 directly opposite to the first conductive layer 400 may include one or more channels of a transistor. Specifically, in a direction perpendicular to the substrate S (e.g., parallel to the z-axis direction), the portion of the active layer 300 directly opposite to the control electrode of the transistor, or in other words, the portion of the active layer 300 covered by the control electrode of a transistor may serve as the channel of the transistor. Based on the above, the active layer 300 may include the channel T1' of the first transistor (e.g., including the channel T1a' of the sub-transistor T1a and the channel T1b' of the sub-transistor T1b), the channel T2' of the second transistor, the channel Td' of the driving transistor, and may also include one or more of the channel T3' of the third transistor, the channel T4' of the fourth transistor, the channel T5' of the fifth transistor, and the channel T6' of the sixth transistor.

[0099] To more clearly illustrate the structure of the transistor, Fig.10 for Fig. 9 The partial enlarged view of the region B in FIG. 1 shows the structure of a sub-transistor (eg, sub-transistor T1a). It can be understood that the structures of other transistors may be similar to those of FIG. Fig.10 The structures of the sub-transistors shown are similar, so the structures of other transistors will not be described in detail here. Fig.10 , the sub-transistor T1a may include a first electrode T1a1 and a second electrode T1a2, and a channel T1a' located between the first electrode T1a1 and the second electrode T1a2. The length l1 of the channel T1a' may be the distance between the first electrode T1a1 and the second electrode T1a2, and the length l1 of the channel T1a' may also be equal to the width h1 of the control electrode T1a3 of the transistor located in the first pattern layer 400. The width w1 of the channel may be the width of the portion of the active layer 300 that is directly opposite to the control electrode T1a3. The width w1 of the channel may also be equal to the width d1 of the active pattern in the active layer 300.

[0100] Continue to see Fig. 9As described above, in the pixel circuit provided in some embodiments of the present disclosure, in the first transistor T1, the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor T2. That is, the width-to-length ratio of the channel of at least one sub-transistor is smaller, thereby reducing the leakage current of the sub-transistor in the off state. In order to reduce the width-to-length ratio of the channel of the sub-transistor, the length l1 of the channel of the sub-transistor can be increased, or the width w1 of the channel of the sub-transistor can be reduced. In some embodiments, the width w1 of the channel of each sub-transistor is equal to the width w2 of the channel of the second transistor T2. That is, by setting the width w1 of the channel of each sub-transistor to be equal to the width w2 of the channel of the second transistor T2, and setting the length l1 of the channel of at least one (for example, one; for example, multiple) sub-transistors to be greater than the length l2 of the channel of the second transistor T2, the width-to-length ratio of the channel of at least one (for example, one; for example, each) sub-transistor is less than the width-to-length ratio of the channel of the second transistor T2. Due to the small size of the transistor, it is easier to increase the length of the channel of the transistor than to reduce the width of the channel of the transistor. For example, compared with reducing the width d1 of the active pattern in the active layer 300, increasing the width h1 of the control electrode of the sub-transistor is easier to achieve in the process, which is beneficial to improving the yield of the product.

[0101] In some embodiments, in the first transistor T1, the length l1 of the channel of at least one (e.g., one; for example, each) sub-transistor is 0.8-1.2 μm greater than the length l2 of the channel of the second transistor T2, thereby achieving the purpose of the width-to-length ratio of the channel of at least one (e.g., one; for example, each) sub-transistor being smaller than the width-to-length ratio of the channel of the second transistor T2. For example, the length l1 of the channel of at least one (e.g., one; for example, each) sub-transistor is 0.8 μm, 0.9 μm, 1.0 μm, 1.1 μm, 1.2 μm greater than the length l2 of the channel of the second transistor T2. In some possible implementations, as described above, the width w1 of the channel of each sub-transistor is equal to the width w2 of the channel of the second transistor. At this time, the length l1 of the channel of each sub-transistor can be 0.8-1.2 μm greater than the length l2 of the second transistor T2.

[0102] In some embodiments, considering the difficulty of the process and the effect of the product, in the first transistor T1, the width w1 of the channel of at least one (e.g., one; for example, each) sub-transistor is 2.0-3.0 μm, and the length l1 is 2.7-4.0 μm. Exemplarily, the width w1 of the channel of at least one (e.g., one; for example, each) sub-transistor is 2.3±0.2 μm, and the length l1 is 3.5±0.2 μm. For example, the width w1 of the channel of at least one (for example, one; for example, each) sub-transistor is 2.0μm, 2.1μm, 2.2μm, 2.3μm, 2.4μm, 2.5μm, 2.6μm, 2.7μm, 2.8μm, 2.9μm, or 3.0μm; the length l1 of the channel of at least one (for example, one; for example, each) sub-transistor is 2.7μm, 2.8μm, 2.9μm, 3.0μm, 3.1μm, 3.2μm, 3.3μm, 3.4μm, 3.5μm, 3.6μm, 3.7μm, 3.8μm, 3.9μm, or 4.0μm.

[0103] In some embodiments, the width wd of the channel of the driving transistor Td is greater than the width w2 of the channel of the second transistor T2. In this way, the size uniformity of the channel of the driving transistor Td can be improved, and the performance of the driving transistor Td can be improved. Exemplarily, the width w2 of the channel of the driving transistor Td is 3.0±0.2μm, for example, 2.8μm, 2.9μm, 3.0μm, 3.1μm, or 3.2μm.

[0104] Based on the above, in some embodiments, the width of the channel of at least one (e.g., one; as another example, each) sub-transistor in the first transistor is 2.3±0.2μm, and the length is 3.5±0.2μm. The width of the channel of at least one (e.g., one; as another example, each) of the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor is 2.3±0.2μm, and the length is 2.5±0.2μm. The width of the channel of the driving transistor is 3.0±0.2μm, and the length is 20.7±0.2μm. In this way, the afterimage problem and the bright spot problem of the display panel display screen can be better improved.

[0105] As described above, the display panel includes a plurality of pixel circuits, and in each pixel circuit, the pixel driving circuit may be distributed in an array. The position of the pixel driving circuit may represent the position of the pixel circuit. Based on this, it can also be said that the pixel circuit is distributed in an array, such as Figure 2 As shown. Fig.11 Shows Figure 2 The structure of two pixel circuits and signal lines located in two rows and one column (for example, the N-1th row and the Nth row, the Mth column). Fig.11In some embodiments, the display panel may include a first pixel circuit 10a located in the N-1th (N is an integer greater than 1) row and a second pixel circuit 10b located in the Nth (N is an integer greater than 1) row. The first pixel circuit 10a and the second pixel circuit 10b may be pixel circuits provided by any of the above embodiments. The display panel may also include a reset control signal line R located in the N-1th row (or the N-1th line). N-1 , reset signal line R N-1 The function of the reset signal line R and its connection relationship with the pixel circuit can be as described above, and will not be repeated here. N-1 It can be coupled to the first pixel circuit 10a and can also be coupled to the second pixel circuit 10b. Fig.12 The control electrode T13-10b of the first transistor in the second pixel circuit 10b located in the Nth row and the control electrode T23-10a of the second transistor in the first pixel circuit 10a located in the N-1th row are both connected to the reset control signal line R in the N-1th row. N-1 In this way, through a reset control signal line R N-1 That is, the second transistor in the first pixel circuit 10a and the first transistor in the second pixel circuit 10b can be controlled, so that the structure of the display panel can be more compact and the size of the display panel can be reduced.

[0106] In some embodiments, in the first transistor of the second pixel circuit 10b, the control electrodes of the sub-transistors are coupled to each other and form an integrated pattern U. Exemplarily, the first transistor includes two sub-transistors coupled to each other, the two sub-transistors respectively include a control electrode T1a3-10b and a control electrode T1b3-10b, the control electrode T1a3-10b and the control electrode T1b3-10b are coupled to each other and form an integrated pattern U. Moreover, the integrated pattern U is connected to the reset control signal line R N-1 Coupling.

[0107] Furthermore, the reset control signal line R N-1 , the integrated pattern U, and the control electrode T23-10a of the second transistor in the first pixel circuit 10a are located in the same pattern layer, for example, in the first pattern layer 400. In addition, the width k of the integrated pattern U is greater than the width l2 of the control electrode T23-10a of the second transistor, and is greater than the reset control signal line R N-1The width f. In this way, the length of the channel of at least one (e.g., one; for example, each) sub-transistor in the first transistor in the second sub-pixel 10b can be greater than the length of the channel of the second transistor in the first sub-pixel 10a. Further, it can be achieved in a pixel circuit (e.g., each pixel circuit) that the length of the channel of at least one (e.g., one; for example, each) sub-transistor in the first transistor is greater than the length of the channel of the second transistor, thereby achieving the purpose of the width-to-length ratio of the channel of at least one (e.g., one; for example, each) sub-transistor in the first transistor being less than the width-to-length ratio of the channel of the second transistor. Moreover, on the basis of achieving that the length of the channel of the sub-transistor is greater than the length of the channel of the second transistor, the reset control signal line R N-1 The width f can also be narrower, which can make the structure of the pixel circuit more compact.

[0108] Continue to see Fig.11 In some embodiments, the display panel further includes a first light emitting control signal line E N-1 and the second light emitting control signal line E N . The first light emitting control signal line E N-1 It can be located in the N-1th row (i.e., the first light emitting control signal line E N-1 The second light emitting control signal line E is connected to the first pixel circuit 10a of the N-1th row. N It can be located in the Nth row (i.e., the second light emitting control signal line E N The connection relationship between a pixel circuit and a light emitting control signal line can refer to the above description, which will not be repeated here. Fig.12 , the second light emitting control signal line E N The first light emitting control signal line may be coupled to the control electrode of the fifth transistor T5 and the control electrode of the sixth transistor T6 in the second pixel circuit 10b. Similarly, the first light emitting control signal line may be coupled to the control electrode of the fifth transistor and the control electrode of the sixth transistor in the first pixel circuit 10a.

[0109] Continue to see Fig.11 The display panel may further include a first scanning signal line G N-1 and the second scanning signal line G N The first scanning signal line G N-1 It can be located at the N-1th row (i.e. the first scanning signal line G N-1 The second scanning signal line G is the N-1th scanning signal line) and is coupled to the first pixel circuit 10a of the N-1th row. N It can be located at the Nth row (i.e. the second scanning signal line G NThe connection relationship between a pixel circuit and a scanning signal line can refer to the above description, which will not be repeated here. Fig.12 , the second scanning signal line G N The first scanning signal line may be coupled to the control electrode of the third transistor T3 and the control electrode of the fourth transistor T4 in the second pixel circuit 10b. Similarly, the first scanning signal line may be coupled to the control electrode of the third transistor and the control electrode of the fourth transistor in the first pixel circuit 10a.

[0110] In some embodiments, the reset signal line R (eg, including the reset signal line R N-1 ), scanning signal line G (for example, including the first scanning signal line G N-1 and the second scanning signal line G N ) and the light emitting control signal line E (eg, including the first light emitting control signal line E N-1 and the second light emitting control signal line E N ) and the integrated pattern U can be located in the same pattern layer, for example, in the first pattern layer 400.

[0111] In some embodiments, see Figure 8 The first pattern layer 400 may further include a first plate S1 of a capacitor. That is, the first plate S1 and the reset signal line R, the scan signal line G, the light emission control signal line E, and the integrated pattern U may be located in the same pattern layer.

[0112] Continue to see Fig.12 In some embodiments, the second pattern layer 500 may further include an initialization signal line Vi. The function of the initialization signal line Vi and the connection relationship with the pixel circuit can refer to the above description and will not be repeated here. In some possible implementations, the second electrode of the second transistor in the first pixel circuit 10a located in the N-1th row and the second electrode of the first transistor in the second pixel circuit 10b located in the Nth row may be coupled to the same initialization signal line, such as Fig.12 In some other possible implementations, see Fig.13 In the display panel, the second electrode T22-10a of the second transistor in the first pixel circuit 10a located in the N-1th row can be coupled to an initialization signal line, and the second electrode T12-10b of the first transistor in the second pixel circuit 10b located in the Nth row can be coupled to another initialization signal line.

[0113] Continue to see Fig.12 In some embodiments, the second pattern layer 500 may further include a second electrode of the capacitor C.

[0114] In some embodiments, the third pattern layer 600 may further include a data line D and a first power line EL1. The functions of the data line D and the first power line EL1 and the connection relationship with the pixel circuit can refer to the above description, which will not be repeated here. The third pattern layer 600 may further include a first electrode of the light emitting device 100.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that: include: a plurality of pixel circuits; The pixel circuit comprises: Light emitting device; A driving transistor, comprising a first electrode, a second electrode and a control electrode, wherein the second electrode is coupled to the light emitting device, and the driving transistor is configured to control the magnitude of a current flowing through the first electrode and the second electrode in response to a voltage of the control electrode; A first transistor, comprising a first electrode, a second electrode and a control electrode, wherein the first electrode of the first transistor is coupled to the control electrode of the driving transistor, and the second electrode is configured to write a first initialization signal; A second transistor, comprising a first electrode, a second electrode and a control electrode, wherein the first electrode of the second transistor is coupled to the light emitting device, and the second electrode is configured to write a second initialization signal; The first transistor includes at least two sub-transistors connected in series, the control electrodes of the at least two sub-transistors are coupled to each other to form the control electrode of the first transistor, and the width-to-length ratio of the channel of at least one sub-transistor is smaller than the width-to-length ratio of the channel of the second transistor; The width of the channel of each sub-transistor is equal to the width of the channel of the second transistor; The plurality of pixel circuits include: a first pixel circuit located in the N-1th row and a second pixel circuit located in the Nth row; wherein N is an integer greater than 1; The display panel further includes: a reset control signal line; In the first transistor of the second pixel circuit, control electrodes of the sub-transistors are coupled to each other and form an integrated pattern, and the integrated pattern is coupled to the reset control signal line; The reset control signal line, the integrated pattern, and the control electrode of the second transistor in the first pixel circuit are located in the same pattern layer, and the width of the integrated pattern is greater than the width of the control electrode of the second transistor and greater than the width of the reset control signal line.

2. The display panel according to claim 1, characterized in that: In the at least two sub-transistors, the width-to-length ratios of the channels of the sub-transistors are the same.

3. The display panel according to claim 2, characterized in that: A length of a channel of at least one sub-transistor is greater than a length of a channel of the second transistor by 0.8 to 1.2 μm.

4. The display panel according to claim 1, characterized in that: The width of the channel of at least one sub-transistor is 2.0-3.0 μm, and the length is 2.7-4.0 μm.

5. The display panel according to claim 4, characterized in that: The channel of at least one sub-transistor has a width of 2.3±0.2 μm and a length of 3.5±0.2 μm.

6. The display panel according to claim 1, characterized in that: A width of a channel of the driving transistor is greater than a width of a channel of the second transistor.

7. The display panel according to claim 6, characterized in that: The width of the channel of the driving transistor is 3.0±0.2 μm.

8. The display panel according to claim 1, characterized in that: Also includes: at least one of a capacitor, a fourth transistor, a third transistor, a fifth transistor, and a sixth transistor; The capacitor includes a first plate and a second plate, the first plate is coupled to the control electrode of the driving transistor, and the second plate is configured to write a power supply voltage signal; The third transistor includes a first electrode, a second electrode and a control electrode, in which the second electrode is coupled to the first electrode of the driving transistor, and the first electrode is configured to write a data signal; The fourth transistor includes a first electrode, a second electrode and a control electrode, wherein the first electrode of the fourth transistor is coupled to the second electrode of the driving transistor, and the second electrode is coupled to the control electrode of the driving transistor; The fifth transistor comprises a first electrode, a second electrode and a control electrode, in which the second electrode is coupled to the first electrode of the driving transistor, and the first electrode is configured to write the power supply voltage signal; The sixth transistor includes a first electrode, a second electrode and a control electrode. In the sixth transistor, the first electrode is coupled to the second electrode of the driving transistor, and the second electrode is coupled to the light emitting device.

9. The display panel according to claim 1, characterized in that: A control electrode of the first transistor in the second pixel circuit and a control electrode of the second transistor in the first pixel circuit are both coupled to the reset control signal line.

10. The display panel according to claim 9, characterized in that: The pixel circuit includes a fourth transistor, a third transistor, a fifth transistor and a sixth transistor; The display panel further includes: a first light-emitting control signal line and a second light-emitting control signal line, wherein the control electrode of the fifth transistor and the control electrode of the sixth transistor in the first pixel circuit are coupled to the first light-emitting control signal line, and the control electrode of the fifth transistor and the control electrode of the sixth transistor in the second pixel circuit are coupled to the second light-emitting control signal line; a first scanning signal line and a second scanning signal line, wherein the control electrode of the fourth transistor and the control electrode of the third transistor in the first pixel circuit are coupled to the first scanning signal line, and the control electrode of the fourth transistor and the control electrode of the third transistor in the second pixel circuit are coupled to the second scanning signal line; The first light-emitting control signal line, the second light-emitting control signal line, the first scanning signal line, the second scanning signal line and the integrated pattern are located in the same pattern layer.

11. The display panel according to claim 9, characterized in that: The pixel circuit includes a capacitor; The first electrode plate of the capacitor and the integrated pattern are located in the same pattern layer.

12. A display device, characterized in that: It comprises the display panel as claimed in any one of claims 1 to 11.

Images