Composite component and method of manufacturing the same

Abstract

The composite component has an interposer structure and an electronic component. The interposer structure has: a silicon-based layer having a first main surface and a second main surface facing each other; a rewiring layer formed on the first main surface; a through-silicon via electrically connected to the rewiring layer and penetrating the silicon-based layer; an interposer electrode facing the second main surface; and an adhesive layer. The electronic component has a component electrode connected to the through-silicon via, which is arranged between the interposer electrode and the silicon-based layer. The electronic component adheres the component electrode and the surface on which the component electrode is formed to the second main surface of the silicon-based layer via the adhesive layer. The through-silicon via has a through-silicon via main body and an extended protrusion, which extends from the second main surface, penetrates the adhesive layer and is electrically connected to the component electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the Paris Convention priority based on Japanese Patent Application No. 2019-117035 (filing date: June 25, 2019, invention title: "Composite component and method for manufacturing the same"). The entire contents disclosed in this application are incorporated into this specification by reference. Technical Field

[0003] The present invention relates to composite parts and methods for their manufacture. Background Art

[0004] The electronic components are mounted on the motherboard via an interposer (substrate). As an interposer, for example, there is a document described in the 2013 Electronic Components & Technology Conference Proceedings (Non-Patent Document 1). Figure 7 middle.

[0005] Non-patent document 1: Larry Lin et al., “Reliability Characterization of Chip-on-Wafer-on-Substrate (CoWoS) 3D IC Integration Technology”, 2013 Electronic Components & Technology Conference Proceedings, pp. 366-371

[0006] However, it is known that the interposer has the following problems. That is, the length of the conductive wiring (wiring length) from the rewiring layer to the component electrode of the electronic component becomes relatively long. As a result, for example, there is a problem that the parasitic impedance based on the conductive wiring becomes relatively large, thereby reducing the electrical characteristics of the electronic device using the composite component including the interposer. Summary of the invention

[0007] Therefore, an object of the present invention is to provide a composite component that reduces parasitic impedance due to wiring and improves electrical characteristics of an electronic device using the composite component.

[0008] The inventors of the present invention have conducted intensive research to solve the above-mentioned problems and have realized that the wiring length can be shortened by arranging electronic components between the interposer electrodes and the silicon base layer as the structural element of the interposer, and connecting the through silicon vias (TSV) penetrating the silicon base layer to the component electrodes of the electronic components, thereby completing the present invention for reducing parasitic impedance. That is, the present invention includes the following embodiments.

[0009] In order to solve the above-mentioned problems, a composite component according to one embodiment of the present invention includes:

[0010] An interposer structure comprising a silicon-based layer having a first main surface and a second main surface facing each other, a rewiring layer formed on the first main surface, a through silicon via electrically connected to the rewiring layer and penetrating the silicon-based layer, an interposer electrode facing the second main surface, and an adhesive layer; and

[0011] An electronic component having a component electrode connected to the through silicon via and disposed between the interposer electrode and the silicon-based layer,

[0012] In the above composite component,

[0013] The electronic component has the component electrode and the surface on which the component electrode is formed bonded to the second main surface of the silicon-based layer via the adhesive layer.

[0014] The through silicon via includes a through silicon via main body and an extended protrusion. The extended protrusion extends from the second main surface, penetrates through the adhesive layer, and is electrically connected to the component electrode.

[0015] According to the above method, the electronic component is arranged between the interposer electrode and the silicon-based layer, and the silicon through hole has an extended protrusion extending from the second main surface and electrically connected to the electronic component. By having such a structure, the wiring length connecting the electronic component can be shortened compared with the past, thereby reducing the parasitic impedance. In addition, the electronic characteristics of the electronic device using the composite component of the above method are improved. In addition, the thickness of the composite component can be reduced, thereby making it possible to miniaturize and thin the composite component.

[0016] Additionally, in one embodiment of the composite component,

[0017] The conductive wiring from the component electrode to the rewiring layer is electrically connected to the rewiring layer by only the through silicon via.

[0018] According to the above embodiment, the wiring does not have a solder bump, so the parasitic impedance based on the wiring can be further reduced. In addition, the electronic characteristics of the electronic device using the composite component in the above manner are improved. In addition, since the wiring length can be shortened, the thickness of the composite component can be reduced, thereby making it possible to miniaturize and thin the composite component.

[0019] Additionally, in one embodiment of the composite component,

[0020] The length of the wiring is 3 μm to 46 μm.

[0021] According to the above embodiment, if the length of the wiring is within the above range, it is shorter than the length of the conventional wiring (e.g., about 100 μm), so the parasitic impedance based on the wiring can be further reduced. In addition, the electronic characteristics of the electronic device using the composite component of the above method are improved. In addition, since the wiring length can be shortened, the thickness of the composite component can be reduced, thereby making it possible to miniaturize and thin the composite component.

[0022] Additionally, in one embodiment of the composite component,

[0023] The composite component further comprises a conductive column electrically connecting the through silicon via to the component electrode.

[0024] The conductive wiring electrically connected from the component electrode to the rewiring layer is composed of the through silicon via and the conductive column.

[0025] The conductive pillar is made of the same conductive material as that of the through silicon via.

[0026] According to the above embodiment, the conductive column is made of the same conductive material as the conductive material constituting the through silicon via. By electrically connecting the through silicon via to the component electrode via such a conductive column, the connection resistance (contact resistance) between the through silicon via and the component electrode can be reduced. As a result, the electrical characteristics of the electronic device using the composite component are improved.

[0027] Additionally, in one embodiment of the composite component,

[0028] The thickness of the adhesive layer is 26 μm or less.

[0029] According to the above embodiment, by setting the thickness of the adhesive layer to the above range, the thickness of the composite component can be reduced, thereby making it possible to reduce the size and thickness of an electronic component using the composite component.

[0030] Additionally, in one embodiment of the composite component,

[0031] The cross-sectional shape of the component electrode in the plane perpendicular to the stacking direction of the composite component is substantially rectangular.

[0032] When the cross-sectional shape of the through silicon via in the above plane is substantially circular,

[0033] The diameter φ of the above-mentioned through silicon via satisfies the following formula (1):

[0034] T(Si)+(T(A)-H(C)) / 3≤φ≤r···(1)

[0035] [In formula (1), T(Si) represents the thickness of the silicon-based layer, T(A) represents the thickness of the adhesive layer, H(C) represents the height of the component electrode, and r represents the diameter of a circle inscribed in the cross-sectional shape of the component electrode at the interface between the through silicon via and the component electrode].

[0036] According to the above embodiment, if the diameter φ of the through silicon via satisfies the formula (1), the diameter φ of the through silicon via becomes larger, so the parasitic impedance of the through silicon via is reduced, and the electrical characteristics of the electronic device using the composite component are improved.

[0037] Additionally, in one embodiment of the composite component,

[0038] Two or more through silicon vias are provided to electrically connect one of the component electrodes.

[0039] According to the above embodiment, two or more through silicon vias are electrically connected to one component electrode, so that the parasitic impedance between the redistribution layer and the electronic component is reduced, and the electrical characteristics of the electronic device using the interposer are improved.

[0040] Additionally, in one embodiment of the composite component,

[0041] The composite component further includes a resin that seals the electronic component and integrates the electronic component therewith.

[0042] According to the above embodiment, since the electronic components can be integrated with the resin, even electronic components (more specifically, general electronic components) whose sizes are inconsistent with the silicon base layer can be installed. As a result, low-cost, high-performance electronic components can be used. In addition, a design with a high degree of freedom can be achieved, and electronic components can be combined according to the application.

[0043] Additionally, in one embodiment of the composite component,

[0044] The above resin is epoxy resin,

[0045] The resin further comprises SiO2 filler dispersed in the resin.

[0046] According to the above embodiment, the resin that integrates the electronic components is an epoxy resin and further contains a SiO2 filler, so the linear expansion coefficient of the layer (electronic component layer) that integrates the electronic components using the resin can be close to the linear expansion coefficient of the silicon-based layer. As a result, the bending of the composite component during the manufacture of the composite component can be reduced, thereby improving the reliability of the composite component.

[0047] Additionally, in one embodiment of the composite component,

[0048] The composite component further comprises an insulating film,

[0049] The insulating film includes a first insulating film located between the through silicon via and the silicon-based layer, and a second insulating film located between the adhesive layer and the silicon-based layer.

[0050] The thickness of the second insulating film is smaller than the thickness of the first insulating film.

[0051] According to the above embodiment, since the thickness of the second insulating film is smaller than the thickness of the first insulating film, the diameter of the through silicon via in the adhesive layer becomes larger, thereby reducing the parasitic impedance of the through silicon via and improving the electrical characteristics of the electronic device using the composite component.

[0052] In one embodiment of the composite component, a maximum diameter of the extending protrusion is larger than a minimum diameter of the through silicon via body.

[0053] According to the above embodiment, since the maximum diameter of the extended protrusion is larger than the minimum diameter of the through silicon via body, the parasitic impedance of the through silicon via is reduced, and the electrical characteristics of the electronic device using the composite component are improved.

[0054] In one embodiment of the composite component, a maximum diameter of the extending protrusion is larger than a maximum diameter of the through silicon via body.

[0055] According to the above embodiment, since the maximum diameter of the extended protrusion is larger than the maximum diameter of the through silicon via body, the parasitic impedance of the through silicon via is reduced, and the electrical characteristics of the electronic device using the composite component are improved.

[0056] A method for producing a composite component according to one embodiment of the present invention includes:

[0057] An electronic component bonding step of forming an adhesive layer on a silicon-based layer and bonding an electronic component to the silicon-based layer via the adhesive layer;

[0058] A silicon support laminating step of laminating a silicon support onto the electronic component;

[0059] A silicon base layer thinning step of thinning the silicon base layer;

[0060] A through-hole forming step of forming through-holes in the thinned silicon-based layer and the adhesive layer to expose component electrodes of the electronic component; and

[0061] A through silicon via forming step is performed to form a through silicon via in the through hole by electroplating.

[0062] According to the above embodiment, since the silicon base layer is supported by the silicon support and thinned, the silicon base layer can be thinned. In addition, a silicon through-hole electrically connected to the component electrode of the electronic component can be manufactured. Thus, a composite component with a shorter wiring length than before and a lower parasitic impedance can be manufactured.

[0063] In addition, a method for manufacturing a composite component according to another aspect of the present invention includes:

[0064] An electronic component bonding step of forming an adhesive layer on a silicon-based layer and bonding an electronic component to the silicon-based layer via the adhesive layer;

[0065] An electronic component sealing step of sealing the electronic component with a resin to form an integrated electronic component layer;

[0066] A silicon support forming step of laminating a silicon support on the electronic component layer;

[0067] A silicon base layer thinning step of thinning the silicon base layer;

[0068] A through-hole forming step of forming through-holes in the thinned silicon-based layer and the adhesive layer to expose component electrodes of the electronic component; and

[0069] A through silicon via forming step is performed to form a through silicon via in the through hole by electroplating.

[0070] According to the above embodiment, since the silicon base layer is supported by the silicon support and thinned, the silicon base layer can be thinned. In addition, a silicon through-hole electrically connected to the component electrode of the electronic component can be manufactured. Thus, a composite component with a shorter wiring length than before and a lower parasitic impedance can be manufactured.

[0071] According to the composite component of one embodiment of the present invention, parasitic impedance due to wiring can be reduced, and thus electrical characteristics of an electronic device using the composite component can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] Figure 1 It is a cross-sectional view showing a first embodiment of a composite component.

[0073] Figure 2 yes Figure 1 Enlarged view of part A.

[0074] Figure 3A This is an explanatory diagram for explaining a method for producing a composite component.

[0075] Figure 3B This is an explanatory diagram for explaining a method for producing a composite component.

[0076] Figure 3C This is an explanatory diagram for explaining a method for producing a composite component.

[0077] Figure 3D This is an explanatory diagram for explaining a method for producing a composite component.

[0078] Figure 3EThis is an explanatory diagram for explaining a method for producing a composite component.

[0079] Figure 3F This is an explanatory diagram for explaining a method for producing a composite component.

[0080] Figure 3G This is an explanatory diagram for explaining a method for producing a composite component.

[0081] Figure 3H This is an explanatory diagram for explaining a method for producing a composite component.

[0082] Fig. 3I This is an explanatory diagram for explaining a method for producing a composite component.

[0083] Figure 3J This is an explanatory diagram for explaining a method for producing a composite component.

[0084] Figure 3K This is an explanatory diagram for explaining a method for producing a composite component.

[0085] Figure 3L This is an explanatory diagram for explaining a method for producing a composite component.

[0086] Figure 4 It is a cross-sectional view showing a second embodiment of the composite component.

[0087] Figure 5 yes Figure 4 Enlarged view of part B.

[0088] Fig. 6A This is an explanatory diagram for explaining a method for producing a composite component.

[0089] Figure 6B This is an explanatory diagram for explaining a method for producing a composite component.

[0090] Figure 6C This is an explanatory diagram for explaining a method for producing a composite component.

[0091] Fig.6D This is an explanatory diagram for explaining a method for producing a composite component.

[0092] Fig. 6E This is an explanatory diagram for explaining a method for producing a composite component.

[0093] Fig. 6F This is an explanatory diagram for explaining a method for producing a composite component.

[0094] Figure 6G This is an explanatory diagram for explaining a method for producing a composite component.

[0095] Figure 6HThis is an explanatory diagram for explaining a method for producing a composite component.

[0096] Fig.6I This is an explanatory diagram for explaining a method for producing a composite component.

[0097] Figure 6J This is an explanatory diagram for explaining a method for producing a composite component.

[0098] Figure 6K This is an explanatory diagram for explaining a method for producing a composite component.

[0099] Figure 6L This is an explanatory diagram for explaining a method for producing a composite component.

[0100] Figure 6M This is an explanatory diagram for explaining a method for producing a composite component.

[0101] Figure 7 It is a cross-sectional view showing a composite component in which a part of a conventional composite component is replaced.

[0102] Figure 8 yes Figure 7 Enlarged view of part C. DETAILED DESCRIPTION

[0103] Hereinafter, a composite component of one embodiment of the present invention will be described in detail in conjunction with the illustrated embodiment. In addition, the drawings contain partially schematic portions and sometimes do not reflect actual dimensions and ratios. In addition, the dimensions (more specifically, thickness and diameter, etc.) of the structural elements in the composite component are measured based on SEM images taken using a scanning electron microscope.

[0104] <First embodiment>

[0105] (structure)

[0106] Figure 1 This is a diagram schematically showing a cross section of a composite member 1 according to a first embodiment of the present invention. Figure 2 yes Figure 1 Enlarged view of part A.

[0107] like Figure 1 and Figure 2 As shown, the composite component 1 includes an interposer structure 2 and an electronic component 10. In the figure, the direction parallel to the thickness of the composite component 1 is set as the Z direction, the Z direction is set as the upper side, and the reverse Z direction is set as the lower side. On a plane perpendicular to the Z direction of the composite component 1, the direction parallel to the paper surface on which the drawings are recorded is set as the X direction, and the direction perpendicular to the paper surface on which the drawings are recorded is set as the Y direction.

[0108] In the composite component 1 of the present embodiment, the interposer structure 2 includes: a silicon-based layer 3 having a first main surface 3a and a second main surface 3b facing each other; a rewiring layer 5 formed on the first main surface 3a; a through silicon via 7 electrically connected to the rewiring layer 5 and penetrating the inside of the silicon-based layer 3; an interposer electrode 16 facing the second main surface 3b; and an adhesive layer 11. The electronic component 10 includes a component electrode 10b connected to the through silicon via 7 and provided between the interposer electrode 16 and the silicon-based layer 3. The component electrode 10b in the electronic component 10 and the surface (third main surface 10c) on which the component electrode 10b is formed are bonded to the silicon-based layer 3 via the adhesive layer 11. The through silicon via 7 includes a through silicon via body 7a and an extended protrusion 7b extending from the second main surface 3b, penetrating the inside of the adhesive layer 11 and electrically connected to the component electrode 10b.

[0109] In the composite component 1 of the present embodiment, the length of the conductive wiring from the rewiring layer 5 to the component electrode 10b is shorter than that of the conventional one (e.g., about 100 μm), so that the parasitic impedance based on the conductive wiring is reduced, thereby improving the electrical characteristics of the electronic device using the composite component 1. Examples of such reduction in electrical characteristics include reduction in the function of suppressing power supply voltage fluctuations on the semiconductor component IC driven at high speed and reduction in the function of absorbing high-frequency ripples in the semiconductor component IC mounted on the rewiring layer.

[0110] The composite component 1 can be modularized by being integrally formed with a package substrate (not shown) as required. For example, the composite component 1 can be fixed to the package substrate using solder bumps and modularized with the package substrate. This makes it possible to manufacture a modular product such as a semiconductor package. Figure 1 As shown, the composite component 1 fixes the electronic component 10 inside the interposer structure 2. That is, the composite component 1 is a composite component with an electronic component built in. In the composite component 1, the interposer electrode layer 15 having the interposer electrode 16 forming the solder bump is flat. Therefore, a plurality of solder bumps can be arranged.

[0111] In contrast, the composite member 101 of the comparative example described later (see Figure 7 and Figure 8 ) The electronic component 110 is mounted on the surface of the interposer structure 102. That is, the composite component 101 is a composite component of the electronic component surface mounting type. In detail, the electronic component 110 is arranged on the setting surface of the interposer electrode 116 in the interposer structure 102. Therefore, when the composite component 101 is integrated with the package substrate, the electronic component 110 occupies part of the space on the interposer electrode layer 115. Therefore, it is impossible to arrange a plurality of solder bumps.

[0112] Therefore, the composite component 1 can be fixed to the package substrate more firmly than the composite component 101 .

[0113] (Electronic components, electronic component layer)

[0114] The electronic component 10 has: a third main surface 10c and a fourth main surface 10d, which are opposite to each other; and a component electrode 10b arranged on the third main surface 10c. The electronic component 10 is, for example, an electronic component in which one or more elements are integrated in the same material as the material constituting the silicon-based layer 3. The electronic component 10 is, for example, an active component (more specifically, a CPU, a GPU, and an LSI, etc.) and a passive component (more specifically, a capacitor, a resistor, and an inductor, etc.). The electronic component 10 constitutes the electronic component layer 9 with the electronic component 10 alone. That is, in the first embodiment, the electronic component layer 9 is constituted by the electronic component 10. The dimensions of the electronic component 10 in the X direction and the Y direction are substantially the same as the dimensions of the silicon-based layer 3 in the X direction and the Y direction, respectively.

[0115] The electronic component 10 is provided between the interposer electrode 16 and the silicon-based layer 3 . The component electrode 10 b in the electronic component 10 and the surface on which the component electrode 10 b is formed are bonded to the silicon-based layer 3 via the adhesive layer 11 .

[0116] By electrically connecting to the interposer electrode 16, other electronic components can be further stacked and mounted on the electronic component layer 9 in the composite component 1. Figure 1 and Figure 2 In the embodiment, one electronic component 10 is fixed inside the interposer structure 2 as the electronic component layer 9, but other electronic components may be stacked on the electronic component layer 9 to provide two or more electronic components as the electronic component layer 9. The two or more electronic components may be of the same type or different types.

[0117] The component electrode 10b is connected to the through silicon via 7, and this connection is an electrical connection. The component electrode 10b is made of, for example, Cu, Ni, Sn, Al, and alloys containing these elements as a conductive material. Among these substances, the conductive material is preferably the same material as the through silicon via. The thickness of the component electrode 10b is, for example, 0.1 μm to 10 μm.

[0118] (Adhesive layer)

[0119] The adhesive layer 11 adheres and fixes the electronic component 10 to the inside of the interposer structure 2. More specifically, the adhesive layer 11 adheres the third main surface 10c of the electronic component 10 and the second main surface 3b of the silicon-based layer 3. The thickness of the adhesive layer 11 is, for example, 26 μm or less. If the thickness of the adhesive layer 11 is 26 μm, the thickness of the composite component 1 becomes thinner. As a result, the electronic component using the composite component 1 can be miniaturized and thinned.

[0120] (Intermediary layer structure)

[0121] The interposer structure 2 includes a silicon base layer 3 and an interposer electrode 16 provided away from the silicon base layer 3, and an electronic component 10 is provided between the silicon base layer 3 and the interposer electrode 16. The interposer structure 2 connects, for example, a package substrate having different terminal pitches and the electronic component 10.

[0122] More specifically, the intermediate layer structure 2 comprises: a silicon-based layer 3 having a first main surface 3a and a second main surface 3b opposite to each other; a rewiring layer 5 formed on the first main surface 3a; a through electrode, i.e., a silicon through hole 7, which is electrically connected to the rewiring layer 5 and penetrates through the silicon-based layer 3; an intermediate layer electrode 16 opposite to the second main surface 3b; and an adhesive layer 11.

[0123] (Through Silicon Via)

[0124] The through silicon via 7 has a main body 7a and an extended protrusion 7b. The extended protrusion 7b extends from the second main surface 3b of the silicon-based layer 3, penetrates the adhesive layer 11, and is electrically connected to the component electrode 10b. In this way, the conductive wiring electrically connected from the component electrode 10b to the rewiring layer 5 is composed only of the through silicon via 7, and therefore does not have a solder bump. Therefore, the composite component 1 of the present embodiment can further reduce the parasitic impedance formed by the conductive wiring. In addition, the electronic characteristics of the electronic device using the composite component 1 are improved. In addition, the wiring length can be shortened compared with the past, so the thickness of the composite component 1 can be reduced, so that the composite component 1 can be miniaturized and thinned. The length of the conductive wiring (that is, the length of the through silicon via 7) is, for example, 3μm to 46μm, preferably 3μm to 36μm. If the length of the conductive wiring is 3μm to 46μm, it is shorter than the length of the conventional wiring (for example, about 100μm), so the parasitic impedance formed by the wiring can be further reduced. This improves the electronic characteristics of the electronic device using the composite component 1 of the present embodiment. Furthermore, since the wiring length can be shortened, the thickness of the composite component 1 can be reduced, and the composite component 1 can be made smaller and thinner.

[0125] exist Figure 2 In the embodiment, the through silicon via 7 is formed in a straight line in the stacking direction. Figure 2 In the figure, the cross-sectional shape of the through silicon via 7 is rectangular, but it is not limited thereto and may be tapered in the stacking direction. In addition, the cross-sectional shape of the through silicon via 7 in the XY plane is, for example, substantially circular, substantially polygonal, or substantially polygonal with rounded corners.

[0126] In addition, the conductive wiring may also include a conductive column (not shown) in addition to the through silicon via 7. That is, the conductive column electrically connects the through silicon via 7 to the component electrode. The conductive column is preferably composed of the same conductive material as the conductive material constituting the through silicon via 7. In the above case, the connection resistance between the through silicon via 7 and the component electrode 10b can be reduced. Therefore, the electrical characteristics of the electronic device using the composite component 1 are improved. The shape of the conductive column may be, for example, a cylinder or a prism having the interface with the component electrode 10b as the bottom surface. The conductive column preferably contains the same conductive material as the through silicon via 7 and the component electrode 10b. The conductive column contains the same conductive material, thereby further reducing the connection resistance. The through silicon via 7 is composed of, for example, Cu, Ag, Au or an alloy of these elements as a conductive material. The conductive column and the through silicon via 7 are preferably composed of Cu as a conductive material. The conductive column can be provided on the component electrode 10b of the electronic component 10 before the electronic component layer 9 is arranged on the silicon base layer 3.

[0127] exist Figure 1 In the figure, two through silicon vias 7 are electrically connected to one component electrode 10b, but the present invention is not limited thereto. For example, one through silicon via 7 or three or more through silicon vias 7 may be electrically connected to one component electrode 10b. In these cases, it is also preferable that two or more through silicon vias 7 are electrically connected to one component electrode. By electrically connecting two or more through silicon vias 7 to one component electrode 10b, the parasitic impedance between the redistribution layer and the electronic component is further reduced, thereby improving the electrical characteristics of the electronic device using the interposer.

[0128] The cross-sectional shape of the component electrode 10 b in the plane perpendicular to the stacking direction of the composite component 1 is substantially rectangular.

[0129] When the cross-sectional shape of the through silicon via 7 in the above plane is substantially circular,

[0130] The diameter φ of the through silicon via 7 preferably satisfies the following formula (1):

[0131] T(Si)+(T(A)-H(C)) / 3≤φ≤r···(1)

[0132] [In formula (1), T(Si) represents the thickness of the silicon base layer 3, T(A) represents the thickness of the adhesive layer 11, H(C) represents the height of the component electrode 10b, and r represents the diameter of a circle inscribed in the cross-sectional shape of the component electrode 10b at the interface between the through silicon via 7 and the component electrode 10b].

[0133] In this specification, the diameter of the through silicon via 7 refers to the diameter of the through silicon via 7 at the interface between the through silicon via 7 and the component electrode 10b. When a conductive column is formed on the component electrode 10b, the diameter of the through silicon via 7 is the diameter of the through silicon via 7 at the interface between the silicon via 7 and the conductive column.

[0134] In addition, when a conductive post is formed on the component electrode 10 b , the height of the component electrode 10 b also includes the height of the conductive post.

[0135] The diameter of the circle inscribed in the cross-sectional shape of the component electrode 10 b at the interface between the through silicon via 7 and the component electrode 10 b refers to the diameter of the circle inscribed in the cross-sectional shape of the component electrode 10 b at the interface between the through silicon via 7 and the component electrode 10 b. Figure 2 The diameter of the circle inscribed in the cross-sectional shape of the component electrode 10b in the XY cross-section of the composite component 1 shown. When a conductive post is formed on the component electrode 10b, the diameter of the circle inscribed in the cross-sectional shape of the component electrode 10b is the diameter of the circle inscribed in the cross-sectional shape of the component electrode 10b at the interface between the conductive post and the component electrode 10b. Here, when the cross-sectional shape of the component electrode 10b is a substantially rectangular shape, the inscribed circle refers to a circle that contacts the long side of the substantially rectangular shape at two points.

[0136] If the diameter φ of the through silicon via 7 is greater than or equal to the lower limit of formula (1), the diameter φ of the through silicon via becomes larger, so the parasitic impedance of the through silicon via is reduced, thereby improving the electrical characteristics of the electronic device using the composite component. In addition, if the diameter φ of the through silicon via 7 is less than or equal to the upper limit of formula (1), the electrical connection between the through silicon via 7 and the component electrode 10b is further improved, thereby effectively preventing a short circuit.

[0137] From the viewpoint of further reducing the parasitic impedance of the TSV, the maximum diameter of the extension 7b is preferably larger than the maximum diameter of the TSV body 7a. The maximum diameter of the TSV 7 is, for example, the diameter of the TSV 7 at the interface between the TSV 7 and the rewiring layer 5.

[0138] In order to form the above-mentioned suitable mode, for example Figure 2 As shown, the extended protrusion 7b of the silicon through-hole via 7 can be formed into a substantially elliptical cross-sectional shape. In the through-hole forming step of the manufacturing method of the composite component 1 described later, a suitable method can be achieved by adjusting the etching speed to be different using the material constituting the adhesive layer 11 and the material constituting the silicon base layer 3. More specifically, in Figure 3J In the embodiment, as the material constituting the silicon base layer 3 , a material that is easily etched can be selected as the material constituting the adhesive layer 11 .

[0139] The maximum diameter of the extended protrusion 7b is preferably greater than the minimum diameter of the through silicon via main body 7a. In the above case, the parasitic impedance of the through silicon via 7 is reduced, thereby improving the electrical characteristics of the electronic device using the composite component. The minimum diameter of the through silicon via main body 7a is, for example, the cross-sectional diameter of the through silicon via 7 in the XY plane including the interface between the silicon base layer 3 and the adhesive layer 11.

[0140] (Insulating film, diffusion prevention film, seed layer)

[0141] The interposer structure 2 may further include an insulating film, a diffusion prevention film, a seed layer, and a protective layer. The insulating film, the diffusion prevention film, and the protective layer may be disposed, for example, between the through silicon via body 7a and the silicon base layer 3, and between the extended protrusion 7b and the adhesive layer 11. The insulating film may be, for example, a diffusion prevention film. Figure 2 The short circuit between the through silicon vias 7 shown. The insulating film contains, for example, an insulating material such as SiO2. The diffusion prevention film is a layer that prevents the conductive material constituting the through silicon via 7 from diffusing into the silicon base layer 3 and the adhesive layer 11, and contains, for example, a transition metal such as Ta and a nitride of a transition metal such as TaN. The seed layer is a layer used when forming the through silicon via 7 by electroplating. The seed layer is, for example, a conductive material such as Cu. The protective layer is a layer that suppresses surface oxidation of the conductive material constituting the through silicon via 7 and protects the through silicon via 7. The protective layer contains an insulating silicon compound such as SiN and SiCN. The thickness of the seed layer is, for example, 0.01μm to 0.20μm. Specific examples of the protective layer are SiN (thickness of 0.15μm) and SiCN (0.02μm).

[0142] As described above, the insulating layer includes, for example, a first insulating film located between the through silicon via 7 and the silicon-based layer 3, and a second insulating film located between the adhesive layer 11 and the silicon-based layer 3. The thickness of the second insulating film is preferably smaller than the thickness of the first insulating film, thereby further increasing the diameter of the through silicon via 7 in the adhesive layer 11. As a result, the parasitic impedance of the through silicon via 7 is further reduced, thereby improving the electrical characteristics of the electronic device using the composite component 1.

[0143] (Silicon-based)

[0144] The thickness of the silicon-based layer 3 is, for example, not less than 3 μm and not more than 20 μm. Figure 7 and Figure 8 The thickness of the silicon base layer 3 in the conventional composite component 1 shown is about 100 μm. The reason why the thickness of the silicon base layer 3 can be extremely thinned is that in the manufacturing method of the composite component 1 described later, a silicon support body is bonded to the silicon base layer 3 to enhance the strength. Therefore, even if the silicon base layer is ground and thinned, the silicon base layer 3 is not easily damaged (cracked, etc.) due to insufficient strength. This is because before grinding the silicon base layer 3, a silicon support body 19 is bonded to the second main surface 3b of the electronic component 10 (see Figure 3D). The composite component 1 can be manufactured by reinforcing the strength by the silicon support 19. Since the thickness of the silicon base layer 3 can be extremely thinned compared with the past, the length of the wiring from the component electrode 10b of the electronic component 10 to the rewiring layer 5 can be shortened. The silicon base layer 3 is actually composed of Si.

[0145] (Rewiring Layer)

[0146] The rewiring layer 5 is a multilayer wiring layer. The rewiring layer 5, for example, transforms the wiring layout of the through silicon via 7 on the first main surface side of the silicon base layer 3 into the component electrode layout of the electronic component arranged on the rewiring layer 5. That is, the through silicon via 7 is electrically connected to the electronic component arranged on the rewiring layer 5 via the rewiring layer 5 to form a desired electrical circuit. The rewiring layer 5 includes wiring and a dielectric film 21. The wiring contains a conductive material. The conductive material is, for example, Cu, Ag and Au, and an alloy containing these elements, and Cu is also preferred among these elements. The rewiring layer 5 can have multiple layers, for example, more than two layers of conductive wiring and more than one layer of dielectric film. The thickness of one layer of conductive wiring and one layer of dielectric film constituting the rewiring layer is, for example, 1.5μm to 5.0μm. In this case, the thickness of the rewiring layer is formed as a value obtained by multiplying the thickness of one layer of these layers (1.5μm to 5.0μm) by the total number of layers in the rewiring layer (unit: μm).

[0147] The dielectric film has a conductive through hole. The conductive through hole electrically connects the wiring between different layers in the rewiring layer. The dielectric film contains, for example, Si3N4 and SiO2. The thickness of the dielectric film is, for example, 0.1μm to 2μm. The dielectric film can also be a multi-component film containing two or more components. The multi-component film can also be a multilayer film having multiple layers formed according to the components. The layer structure of the multilayer film is, for example, SiO2 (thickness 0.25μm) / Si3N4 (thickness 0.1μm) / SiO2 (thickness 0.25μm) / Si3N4 (thickness 0.1μm) starting from the silicon base layer side.

[0148] (Intermediate layer electrode layer, intermediate layer electrode)

[0149] The interlayer electrode layer 15 is a layer that can be sandwiched between the composite component 1 and other electronic components when other electronic components are mounted on the composite component 1. In addition, the interlayer electrode layer 15 is a layer that is sandwiched between the composite component 1 and the electronic device when the composite component 1 is mounted on the electronic device. The interlayer electrode layer 15 has an interlayer electrode 16 and a dielectric film. The interlayer electrode 16 electrically connects the composite component with other electronic components or electronic devices, and the dielectric film electrically isolates the necessary parts between the composite component 1 and other electronic components or electronic devices. The interlayer electrode 16 is, for example, Cu, Ag, and an alloy containing these elements, and Cu is also preferred among these elements. The electrical connection between the interlayer electrode 16 and the electronic device is implemented by a solder bump. In order to correspond to the solder bump, the interlayer electrode 16 can have a Ni or Au plating layer on the surface.

[0150] (Method for manufacturing composite component)

[0151] Next, a method for producing the composite member 1 will be described.

[0152] The method for manufacturing the composite component 1 comprises:

[0153] An electronic component bonding step of forming an adhesive layer 11 on a silicon-based layer 3 and bonding an electronic component 10 to the silicon-based layer 3 via the adhesive layer 11;

[0154] A silicon support laminating step of laminating a silicon support 19 onto the electronic component 10;

[0155] A silicon base layer thinning step of thinning the silicon base layer 3;

[0156] A through-hole forming step of forming a through-hole 25 in the thinned silicon base layer 3 and the adhesive layer 11 to expose the component electrode 10 b of the electronic component 10 ; and

[0157] The through silicon via forming step is to form the through silicon via 7 in the through hole 25 by electroplating.

[0158] The method for manufacturing the composite component 1 may also include:

[0159] A silicon base layer preparation step of preparing a silicon base layer 3;

[0160] An electronic component thinning step of grinding the electronic component 10 to thin it;

[0161] A dielectric film forming step of forming a dielectric film 21 having a predetermined pattern on the silicon base layer 3;

[0162] a rewiring layer forming step of forming a rewiring layer 5;

[0163] an interposer electrode forming step of forming the interposer electrode 16; and

[0164] The dicing process is to separate the pieces into individual pieces by dicing.

[0165] Specifically, refer to Figure 3A to Figure 3L An example of a method for producing the composite member 1 will be described. Figure 3A to Figure 3L This is a diagram for explaining a method for manufacturing a composite component 1. The method for manufacturing a composite component 1 according to the first embodiment includes a silicon base preparation step, an electronic component bonding step, an electronic component thinning step, a silicon support body forming step, a silicon base thinning step, a dielectric film forming step, a through hole forming step, a through silicon via forming step, a redistribution layer forming step, an interposer electrode forming step, and a dicing step.

[0166] Furthermore, a mother assembly in which the composite components 1 are integrated is manufactured from the silicon base layer forming step to the rewiring layer forming step, but for convenience of explanation, the manufacturing method will be described focusing on one composite component 1.

[0167] (Silicon base preparation process)

[0168] In the silicon base layer preparation step, a silicon wafer is prepared as the silicon base layer 3. The shape of the silicon wafer can be cylindrical, but is not limited thereto. In the case where the shape of the silicon wafer is cylindrical, the thickness of the silicon wafer is, for example, 755 μm (diameter of the silicon wafer is φ300 mm), 725 μm (φ200 mm), 625 μm (φ150 mm), and 525 μm (φ100 mm).

[0169] (Electronic component bonding process)

[0170] In the electronic component bonding step, an adhesive is applied to the silicon base layer 3, the electronic component 10 is arranged thereon, and the adhesive is cured. Thus, the electronic component 10 is bonded to the silicon base layer 3 to form an adhesive layer 11. As described above, in this embodiment, the electronic component 10 is the electronic component layer 9. Specifically, Figure 3A As shown, a coating film 12 of an adhesive is formed on the second main surface 3b of the silicon-based layer 3. Thus, a coating film is manufactured to form a silicon-based layer. The coating method is, for example, spin coating. It is preferred to control the thickness of the coating film 12 to be within the range of the thickness of the component electrode 10b of the electronic component 10 to 26μm for coating. The adhesive is, for example, a thermosetting resin. Such a thermosetting resin is, for example, a thermosetting resin containing benzocyclobutene (BCB) in a repeating unit, such as 1,3-divinyl-1,1,3,3-tetramethyldisiloxane-bis-benzocyclobutene (DVS-bis-BCB) that can be obtained by polymerization. As a commercially available product, for example, there is "CYCLOTENE" manufactured by Dow Chemical.

[0171] Furthermore, in the electronic component bonding step, before the electronic component 10 is disposed on the silicon base layer 3 , a conductive post may be provided on the component electrode 10 b of the electronic component 10 .

[0172] like Figure 3B As shown, an electronic component 10 is arranged at a predetermined position on a coating film 12 using a device having a vacuum chamber. Specifically, a wafer (electronic component integrated wafer) integrating a plurality of electronic components 10 is bonded to a coating film-forming silicon base layer. Pressure is applied bidirectionally and heated along the stacking direction of the electronic components 10. Specifically, a coating film-forming silicon base layer is placed on a lower workbench in a vacuum chamber of the device. The upper workbench in the vacuum chamber vacuum-attracts the electronic component 10 in such a manner that the component electrode 10b of the electronic component 10 is opposite to the coating film 12. In the process of aligning the coating film-forming silicon base layer with the electronic component integrated wafer, an identification mark of the silicon base layer 3 is used, for example. The electronic component 10 is arranged on the coating film 12 side of the coating film-forming silicon base layer. Pressure is applied bidirectionally and heated along the direction in which the upper and lower workbenches are opposite to each other.

[0173] Heating (adhesive curing) is performed, for example, by using a hot plate heated at 250°C or a hot air circulation oven, and placing the silicon base layer 3 (silicon wafer / adhesive / electronic component) to which the electronic component 10 is bonded with the adhesive for heating for 1 hour. The adhesive is thereby cured to form an adhesive layer 11. After bonding and before the adhesive is cured, the coating film 12 can be pre-cured (adhesive soft-cured). Pre-curing is performed, for example, by using a hot plate heated at 150°C and heating the bonded silicon base layer 3 for 15 minutes. By pre-curing, vacuum voids can be removed in the adhesive layer 11.

[0174] In addition, the silicon base layer 3 can be processed before and after the coating film 12 is formed. Pre-treatments include, for example, cleaning treatments and adhesion enhancement treatments. The cleaning treatment is to clean the second main surface 3b of the silicon base layer 3 to remove contamination. The adhesion enhancement treatment is to apply an adhesion enhancer (for example, "AP3000" manufactured by DOW) on the second main surface 3b to form a coating film 12. As a result, the adhesion between the second main surface 3b and the coating film 12 is improved. Post-treatments include, for example, preliminary heating (soft baking) treatments. After the coating film 12 is formed, preliminary heating is performed to stabilize the coating film 12. Pre-heating is performed, for example, using a hot plate heated at 80°C to 150°C to heat the coating film 12 for about 60 seconds. In addition, an identification mark can be formed on the silicon base layer 3. In a subsequent process, when the electronic component 10 is bonded to the silicon base layer 3, the identification mark is used to align the silicon base layer 3 with the electronic component 10.

[0175] (Electronic component thinning process)

[0176] like Figure 3CAs shown, in the electronic component thinning process, the electronic component 10 is ground using a back grinder to be thinned. In the electronic component thinning process, the surface of the electronic component 10 that is not provided with the component electrode 10b is ground. The grinding amount is preferably as much as possible without damaging the functional parts inside the electronic component 10. The functional parts are, for example, dielectrics and electrodes in the case of capacitors, and wiring in the case of inductors. The thickness of the electronic component layer 9 after thinning is, for example, 50 μm to 150 μm.

[0177] For the electronic component thinning process, after grinding the electronic component 10, a flattening process can be performed as the final finishing. The flattening process is, for example, dry polishing and CMP (Chemical Mechanical Polishing). Through the flattening process, for example, the flatness of the ground fourth main surface 10d can be expressed as TTV (Total Thickness Variation). Relative to the thickness of 5μm of the adhesive layer 11 formed in the subsequent process, the ground surface of the electronic component 10 subjected to the flattening process becomes less than 2μm. For example, if the electronic component 10 using a φ300mm silicon wafer is subjected to a grinding process, the TTV of the ground surface of the electronic component 10 becomes 1.5μm.

[0178] (Silicon support bonding step)

[0179] In the silicon support bonding process, Figure 3D As shown, a silicon support 19 is bonded to the electronic component 10. Specifically, a silicon wafer described in the silicon base preparation step is separately prepared as the silicon support 19. Next, a coating film 12 of an adhesive is formed on the silicon support 19 by the method described in the electronic component bonding step. Then, the polished surface (fourth main surface 10d) of the electronic component 10 is brought into contact with the coating film 12, thereby bonding the electronic component 10 to the silicon support 19, applying pressure and heating. Thus, a silicon support 19 is formed on the polished surface of the electronic component 10. The purpose of providing the silicon support 19 is to prevent the occurrence of disadvantages (more specifically, a reduction in strength, etc.) caused by the layer being thinner than before in the subsequent silicon base thinning step.

[0180] From the viewpoint of improving processing performance, the silicon support 19 can be thinned before lamination as needed. This is because a dielectric film is formed using a semiconductor device in a subsequent process. For example, when the thickness of the electronic component 10 is 150 μm, the silicon wafer (φ300 mm, generally 775 μm thick) serving as the silicon support 19 is thinned to about 625 μm.

[0181] (Silicon base thinning process)

[0182] In the silicon base thinning process, Figure 3E As shown, in the same method as the electronic component thinning process, the silicon base layer 3 is ground to flatten the ground surface. The grinding amount is preferably to prevent the above-mentioned disadvantages, for example, as much as possible within a range that can maintain a certain strength. Considering the difference in the flattening of the ground surface, the thickness of the thinned silicon base layer 3 is preferably 3 μm or more. Considering the difference in the flattening of the ground surface, when the flatness of the ground surface is 2 μm, the thickness of the thinned silicon base layer 3 is further preferably 5 μm or more, and more preferably 10 μm or more.

[0183] (Dielectric film forming process)

[0184] In the dielectric film forming process, Figure 3F , Figure 3G and Figure 3H As shown in FIG. 1 , a dielectric film 21 having a desired pattern is formed on the silicon substrate 3. Specifically, a vapor deposition (CVD) method such as PECVD is used. Figure 3F As shown, a dielectric film (thickness of 0.1 μm to 0.2 μm) 21 is formed on the entire surface of the silicon-based layer 3. The dielectric film 21 may be formed in more than one layer. For example, when four layers of dielectric film 21 are formed, the layers may be SiO2: 0.25 μm / Si3N4: 0.1 μm / SiO2: 0.25 μm / Si3N4: 0.1 μm in order from the silicon-based layer 3 side.

[0185] In addition, the dielectric film forming step can clean the surface of the silicon base layer 3 before forming the dielectric film 21. Cleaning is, for example, wet cleaning and oxygen plasma ashing.

[0186] In addition, attention should be paid to Figure 3F to Figure 3L Compare Figure 3A to Figure 3E is magnified.

[0187] Next, if Figure 3G As shown, the dielectric film 21 is patterned using photolithography. A liquid resist is spin-coated to form a photoresist film 23 on the entire surface of the dielectric film 21. The photoresist film 23 is exposed through a mask corresponding to the desired pattern. The exposed photoresist film 23 is developed. The dielectric film 21 of the photoresist film 23 is selectively removed using RIE (Reactive Ion Etching). For example, in the case where four layers of dielectric film are formed as described above, two layers on the surface side of the dielectric film 21 (the surface side of the dielectric film opposite to the silicon base layer 3 side) are selectively removed. Thereafter, the photoresist film 23 is peeled off. Thus, a dielectric layer having a dielectric layer 21 is formed on the silicon base layer 3. Figure 3H The dielectric film 21 of the desired pattern is shown. The dielectric film 21 is used as Figure 2 An insulating film functions as an electrical insulator between the two through silicon vias 7 shown.

[0188] Furthermore, the first main surface 3a of the silicon-based layer 3 may further include a marking layer. The marking layer can be detected by an IR camera to perform alignment in the photolithography method.

[0189] (Through-hole forming step)

[0190] like Fig. 3I and Figure 3J As shown in FIG. 1 , the through hole forming step forms a through hole 25 on the silicon base layer 3 and the adhesive layer 11. Specifically, a photoresist film 23 is formed on the entire surface. The photoresist film 23 is exposed through a mask corresponding to the pattern of the silicon through hole 7. The exposed photoresist film 23 is developed to form a through hole having a Fig. 3I A photoresist film 23 having a predetermined pattern as shown. Figure 3J As shown, the silicon-based layer 3 and the adhesive layer 11 present in the Z direction are selectively removed (etched) from the opening 29 of the photoresist film 23. Etching is performed using, for example, RIE. Thus, a through hole 25 is formed to expose the component electrode 10b. Here, the extended protrusion 7b has an elliptical shape. This is because the material constituting the adhesive layer 11 is easier to etch than the material constituting the silicon-based layer 3.

[0191] (Through Silicon Via Formation Process)

[0192] like Figure 3K As shown, the through silicon via forming step forms a through silicon via 7 in the through hole 25. The through silicon via 7 is formed in the through hole 25 by electroplating (more specifically, electrolytic copper plating) using a dual damascene method (more specifically, a copper dual damascene method).

[0193] Here, the through silicon via forming step may also include an insulating film forming step, a diffusion prevention film forming step, a protective layer forming step, and a seed layer forming step before forming the through silicon via 7. Figure 3J An insulating film is formed on the surface (inner wall surface) of the exposed silicon base layer 3 in the through hole 25 shown. The diffusion prevention film forming step forms a diffusion prevention film on the insulating film. The protective layer forming step forms a protective layer on the diffusion prevention film. The protective layer functions as a protective layer for the conductive material (more specifically, Cu, etc.) constituting the silicon through via 7, and inhibits surface oxidation of the conductive material. The seed layer is a layer that is energized when the silicon through via 7 is formed by electroplating. The seed layer is, for example, a conductive material such as Cu.

[0194] In addition, the through silicon via forming step may include a planarization step after forming the through silicon via 7. In the planarization step, the top surface of the through silicon via 7 is planarized using CMP, for example.

[0195] (Rewiring Layer Formation Step)

[0196] like Figure 3LAs shown, the rewiring layer forming step forms a dielectric film and wiring having a predetermined pattern by the above-mentioned photolithography and etching to form a rewiring layer 5. The silicon support 19 and the adhesive layer 11 are removed to form the intermediate layer electrode 16. In addition, the rewiring layer forming step may also be performed by thinning the silicon support 19 instead of removing the silicon support 19 and the adhesive layer 11. In the thinning process, for example, the silicon support 19 is ground to form the same thickness as the silicon base layer 3. If the thickness of the silicon support 19 is made the same as the thickness of the silicon base layer 3, the silicon support 19 and the silicon base layer 3 become approximately plane-symmetrical with respect to the electronic component layer 9. As a result, the warping of the composite component 1 is further reduced.

[0197] (Cutting process)

[0198] The dicing step dices the mother assembly into individual pieces, thereby manufacturing the composite component 1 .

[0199] (Example)

[0200] The composite component 1 is manufactured according to the manufacturing method described above. Figure 2 The composite component shown. Specifically, an adhesive ("CYCLOTENE" manufactured by Dow Chemical) is used to bond the electronic component to the silicon base layer. An adhesive layer is thus formed. The thickness of the formed adhesive layer is 5 μm. The thickness of some electrodes of the electronic component is 2 μm. The electronic component is polished to form the thickness of the electronic component to 100 μm. A silicon support is attached to the thinned electronic component and the silicon base layer is thinned by polishing. The thickness of the thinned silicon base layer is 10 μm. A dielectric film having a prescribed pattern is formed on the thinned silicon base layer. A photoresist film is formed on the silicon base layer, and through holes are formed in the silicon base layer and the adhesive layer by RIE. An insulating film, a diffusion prevention film and a seed layer are formed in sequence on the inner walls of the silicon base layer and the adhesive layer in the through hole. The silicon base layer and the adhesive layer of the opening of the photoresist film are selectively removed by copper dual damascene, and a silicon through hole connected to the component electrode is formed by copper electroplating. Thus, a silicon through hole exposing the component electrode is formed. The diameter of the formed silicon via is 10μm. The thickness of the extended protrusion is 3μm, and the cross-sectional shape of the extended protrusion is elliptical. Five rewiring layers are formed on the silicon base layer. The thickness of the rewiring layer is 2.5μm (0.5μm×5). The wiring from the rewiring layer to the component electrode is composed only of silicon vias. The length of the wiring is 13μm. Afterwards, the silicon support is peeled off, and an intermediate layer electrode (thickness of 15μm) is formed on the electronic component that has been peeled off. The thickness of the intermediate layer electrode is 5μm. The thickness of the manufactured composite material is 117.5μm.

[0201] (Comparative Example)

[0202] As a comparative example, a composite component constructed using the interposer described in Non-Patent Document 1 is as follows: Figure 7 and Figure 8 The composite component 101 of the comparative example is a composite component of the non-patent document 1 described above. Figure 7 The substrate in the "TSV+C4 bumpEM test structure" is replaced with an electronic component. Figure 7 and Figure 8 Provide explanation. Figure 7 It is a cross-sectional view of a composite component of a comparative example. Figure 8 yes Figure 7 A partial enlarged view of (C). Figure 7 and Figure 8 As shown, the composite component 101 is an electronic component surface mounting type composite component in which the electronic component 110 is surface mounted on the interposer electrode 116. The composite component 101 includes the electronic component 110 and the interposer structure 102 on which the electronic component 110 is mounted via the solder bump 111. The interposer structure 102 includes: a silicon-based layer 103 having a first main surface 103a and a second main surface 103b facing each other; a rewiring layer 105 formed on the first main surface 103a; a through silicon via 107 electrically connected to the rewiring layer 105 and penetrating the silicon-based layer 103; and an interposer electrode 116 having a predetermined pattern and formed on the second main surface 103b and electrically connected to the through silicon via 107.

[0203] The conductive wiring from the rewiring layer 105 to the component electrode 110b of the electronic component 110 is composed of a through silicon via (100 μm thick) 107, an interposer electrode (5 μm thick) 116, and a solder bump (15 μm thick) 111. The wiring length is 120 μm.

[0204] <Second embodiment>

[0205] Reference Figure 4 and Figure 5 A composite member 1A according to the second embodiment will be described. Figure 4 It is a cross-sectional view showing a second embodiment of a composite member 1A. Figure 5 yes Figure 4 The second embodiment is different from the first embodiment in that the electronic component layer 9 is composed of an electronic component 10A and a resin 10e that integrates the electronic component 10A. The following describes this different structure. In addition, in the second embodiment, the same figure mark as the first embodiment indicates the same structure as the first embodiment, and its description is omitted.

[0206] (Structure) Figure 5As shown, in the composite component 1A of the second embodiment, the electronic component layer 9 is composed of the electronic component 10A and the resin 10e that integrates the electronic component 10A. The composite component 1A of the second embodiment can integrate the electronic component 10A and the resin 10e, so even electronic components (more specifically, general electronic components) that are inconsistent in size with the silicon base layer 3 can be installed. As a result, low-cost, high-performance electronic components can be used. In addition, a design with a high degree of freedom can be achieved, so that electronic components can be combined according to the application.

[0207] In addition, Figure 5 In the embodiment, the electronic component layer 9 includes one electronic component 10A, but the present invention is not limited thereto. The electronic component layer 9 may include two or more electronic components 10A of at least one type.

[0208] The resin 10e is an epoxy resin, and the resin 10e preferably further includes a SiO2 filler dispersed in the resin 10e. In the above case, the linear expansion coefficient of the electronic component layer 9 integrated with the electronic component 10A by the resin 10e can be close to the linear expansion coefficient of the silicon-based layer 3. As a result, the bending of the composite component 1A during the manufacture of the composite component 1A can be reduced, and the reliability of the composite component 1A can be improved.

[0209] (Method of Manufacturing Composite Component 1A)

[0210] The method for manufacturing the composite member 1A according to the second embodiment includes:

[0211] An electronic component bonding step of forming an adhesive layer on the silicon base layer 3 and bonding the electronic component 10A to the silicon base layer 3 via the adhesive layer 11;

[0212] An electronic component sealing step of sealing the electronic component 10A with a resin 10e to form an integrated electronic component layer 9;

[0213] a silicon support forming step of forming a silicon support 19 on the electronic component layer 9;

[0214] A silicon base layer thinning step of thinning the silicon base layer 3;

[0215] A through-hole forming step of forming a through-hole 25 in the thinned silicon base layer 3 and the adhesive layer 11 to expose the component electrode 10 b of the electronic component 10A; and

[0216] The through silicon via forming step is to form the through silicon via 7 in the through hole 25 by electroplating.

[0217] The method for manufacturing the composite component 1A may further include:

[0218] A silicon base layer preparation step of preparing a silicon base layer 3;

[0219] An electronic component layer thinning step of grinding the electronic component layer 9 to thin it;

[0220] A dielectric film forming step of forming a dielectric film 21 having a predetermined pattern on the silicon base layer 3;

[0221] a rewiring layer forming step of forming a rewiring layer 5;

[0222] an interposer electrode forming step of forming an interposer electrode; and

[0223] The dicing process is performed to separate the pieces into pieces.

[0224] Reference Figure 6A to Figure 6M An example of a method for producing the composite member 1A will be described. Figure 6A to Figure 6M It is a diagram for explaining a method for manufacturing the composite member 1A.

[0225] (Silicon base preparation process, electronic component bonding process)

[0226] like Fig. 6A As shown, Figure 3A Similarly, a coating film 12 of an adhesive is formed on the silicon-based layer 3. Figure 6B As shown, the electronic component 10A is mounted at a predetermined position on the coating film 12 using a mounting device for the electronic component 10A. Pressure is applied bidirectionally along the stacking direction of the silicon-based layer 3, and heating is performed. Specifically, the electronic component 10A is vacuum-adsorbed using the head of the mounting device. The electronic component 10A is positioned so that the coated surface of the electronic component 10A and the component electrode 10b face each other. The silicon-based layer 3 on which the electronic component 10A is mounted is heated. As a result, the adhesive is cured to form an adhesive layer, so that the electronic component 10A is bonded to the silicon-based layer 3. In addition, pressure may be applied bidirectionally along the stacking direction of the silicon-based layer 3 during heating.

[0227] (Electronic component sealing process)

[0228] like Figure 6C As shown, the electronic component sealing process uses a resin (sealing resin) 10e to seal the mounted electronic component 10A. Thus, an integrated electronic component layer 9 is formed. Specifically, a dispenser is used to apply a liquid resin on the silicon base layer 3 on which the electronic component 10A is mounted. Thereafter, a compression molding device is used to mold the applied resin. Thereafter, for example, a hot air circulation oven is used to cure the resin. The heat treatment conditions during curing are, for example, 150°C for 1 hour. Thus, an electronic component layer 9 is formed.

[0229] (Electronic component layer thinning process ~ rewiring layer forming process)

[0230] like Fig.6DAs shown in FIG. 1 , the electronic component layer thinning step thins the electronic component layer 9. The resin 10e is ground using a back grinder for a silicon wafer to thin and flatten it. Figure 6E to Figure 6M The silicon support body forming step to the rewiring layer forming step shown in the figure can be Figure 3D to Figure 3L In addition, please note that Figure 6G to Figure 6M Compare Figure 6A to Figure 6F is magnified.

[0231] The above-mentioned manufacturing conditions in the first and second embodiments are not limited as long as through silicon vias electrically connected to component electrodes of electronic components can be formed.

[0232] The present invention is not limited to the first and second embodiments, and can be implemented in various ways as long as the main purpose of the present invention is not changed. In addition, the structure shown in the first and second embodiments is an example and is not particularly limited, and various changes can be made within the scope of the effect of the present invention. For example, the matters described in the first and second embodiments can be appropriately combined. For example, the structure described in the first embodiment can be combined with the structure described in the second embodiment.

[0233] Description of reference numerals:

[0234] 1. 1A. 101…composite component; 2…interlayer structure; 3…silicon base layer; 3a. 103a…first main surface; 3b. 103b…second main surface; 5. 105…rewiring layer; 7. 107…through silicon via; 7a…through silicon via main body; 7b…extended protrusion; 9…electronic component layer; 10. 10A. 110…electronic component; 10a…electronic component main body; 10b. 110b…component electrode; 10c…third main surface; 10d…fourth main surface; 10e…resin; 11…adhesive layer; 12…coating film; 15…interlayer electrode layer; 16. 116…interlayer electrode; 19…silicon support; 21…dielectric film; 23…photoresist film; 25…through hole; 27…wiring; 29…opening; 102…interlayer structure; 111…solder bump.

Claims

1. A composite component comprising: An interposer structure comprising a silicon-based layer having a first main surface and a second main surface facing each other, a rewiring layer formed on the first main surface, a through silicon via electrically connected to the rewiring layer and penetrating the silicon-based layer, an interposer electrode facing the second main surface, and an adhesive layer; and an electronic component having a component electrode connected to the through silicon via and disposed between the interposer electrode and the silicon-based layer, In the composite component, The electronic component has the component electrode and the surface on which the component electrode is formed bonded to the second main surface of the silicon-based layer via the adhesive layer. The through silicon via has a through silicon via main body and an extended protrusion, wherein the extended protrusion extends from the second main surface, penetrates through the adhesive layer and is electrically connected to the component electrode. The cross-sectional shape of the component electrode in a plane perpendicular to the stacking direction of the composite component is substantially rectangular. When the cross-sectional shape of the through silicon via in the plane is substantially circular, The diameter φ of the through silicon via satisfies the following formula (1): T(Si)+(T(A)-H(C)) / 3≤φ≤r···(1) In formula (1), T(Si) represents the thickness of the silicon base layer, T(A) represents the thickness of the adhesive layer, H(C) represents the height of the component electrode, and r represents the diameter of a circle inscribed in the cross-sectional shape of the component electrode at the interface between the through silicon via and the component electrode.

2. The composite component according to claim 1, wherein The conductive wiring from the component electrode to the rewiring layer is electrically connected to the rewiring layer by only the through silicon via.

3. The composite component according to claim 2, wherein: The length of the conductive wiring is 3 μm to 46 μm.

4. The composite component according to claim 1 or 3, wherein: The composite component further comprises a conductive column electrically connecting the through silicon via to the component electrode. The conductive wiring from the component electrode to the rewiring layer is formed by the through silicon via and the conductive column. The conductive pillar is made of the same conductive material as that of the through silicon via.

5. The composite component according to claim 1 or 2, wherein: The thickness of the adhesive layer is 26 μm or less.

6. The composite component according to claim 1 or 2, wherein: Two or more through silicon vias are electrically connected to one component electrode.

7. The composite component according to claim 1 or 2, wherein: The composite component further includes a resin that seals and integrates the electronic component.

8. The composite component according to claim 7, wherein: The resin is an epoxy resin, The resin further comprises SiO2 filler dispersed in the resin.

9. The composite component according to claim 1 or 2, wherein: The composite component further comprises an insulating film, The insulating film includes a first insulating film located between the through silicon via and the silicon-based layer, and a second insulating film located between the adhesive layer and the silicon-based layer. The thickness of the second insulating film is smaller than the thickness of the first insulating film.

10. The composite component according to claim 1 or 2, wherein: The maximum diameter of the extension protrusion is greater than the minimum diameter of the TSV body.

11. The composite component according to claim 1 or 2, wherein: A maximum diameter of the extending protrusion is greater than a maximum diameter of the TSV body.

12. A method for manufacturing a composite component, wherein: include: An electronic component bonding step of forming an adhesive layer on a silicon-based layer and bonding an electronic component to the silicon-based layer via the adhesive layer; A silicon support laminating step of laminating a silicon support onto the electronic component; A silicon base layer thinning step of thinning the silicon base layer; A through-hole forming step of forming through-holes in the thinned silicon-based layer and the adhesive layer to expose component electrodes of the electronic component; and A through silicon via forming step of forming a through silicon via in the through hole by electroplating.

13. A method for manufacturing a composite component, wherein: include: An electronic component bonding step of forming an adhesive layer on a silicon-based layer and bonding an electronic component to the silicon-based layer via the adhesive layer; An electronic component sealing step of sealing the electronic component with a resin to form an integrated electronic component layer; A silicon support forming step of laminating a silicon support on the electronic component layer; A silicon base layer thinning step of thinning the silicon base layer; A through-hole forming step of forming through-holes in the thinned silicon-based layer and the adhesive layer to expose component electrodes of the electronic component; and A through silicon via forming step of forming a through silicon via in the through hole by electroplating.

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