Electrostatic protection structure, thin film transistor substrate and display panel

By using the same bridge structure to connect the second gate and second drain of adjacent electrostatic protection units in the electrostatic protection structure, the problem of the electrostatic protection structure taking up a large space on the display panel is solved, and the electrostatic discharge function and narrow frame are realized Both designs.

CN114078834BActive Publication Date: 2025-02-18CENTURY TECH (SHENZHEN) CORP LTD
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Patent Information

Application Number
CN202010827170.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-08-17
Publication Date
2025-02-18
Estimated Expiration
2040-08-17

AI Technical Summary

Technical Problem

The existing electrostatic protection structure occupies a large space on the display panel, making it difficult to take into account both the electrostatic protection function and the narrow bezel design.

Method used

The electrostatic protection structure is adopted, in which the second gate and second drain of two adjacent electrostatic protection units are electrically connected through the same bridge structure to reduce space occupation, and the electrostatic discharge function is realized through the design of the discharge electrode and the electrostatic protection unit. .

Benefits of technology

It realizes that while meeting the electrostatic discharge function, it reduces the space occupied by the electrostatic protection structure on the thin film transistor substrate, which is conducive to the narrow frame design of the display panel.

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Abstract

An electrostatic protection structure is used for electrostatic discharge of a functional circuit, and the functional circuit includes a plurality of signal lines. The electrostatic protection structure includes a discharge electrode and a plurality of electrostatic protection units. Each electrostatic unit includes a first thin film transistor and a second thin film transistor, the first thin film transistor includes a first gate, a first source and a first drain, and the second thin film transistor includes a second gate, a second source and a second drain. The first gate is electrically connected to the first drain and both are electrically connected to a signal line, the first source is electrically connected to the second drain, the first drain is electrically connected to the second source, the second gate is electrically connected to the discharge electrode, and the second gate is electrically connected to the second drain; the second drains of two adjacent electrostatic protection units are electrically connected, and the second gates and second drains of the two adjacent electrostatic protection units are electrically connected through the same bridge structure. The present invention also provides a thin film transistor basic and a display panel using an electrostatic protection structure.
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Description

Technical Field

[0001] The invention relates to an electrostatic protection structure, a thin film transistor substrate and a display panel. Background Art

[0002] Static electricity is a common phenomenon in nature. When two materials with different dielectric constants rub against each other, static electricity will be generated. When an object with static electricity releases the static electricity and returns to a neutral state, this phenomenon of static electricity release is called electrostatic discharge (ESD).

[0003] In a display panel, the basic function of the electrostatic protection structure is to guide the static electricity inside the panel to the outside of the pixel matrix to prevent the instantaneous discharge current of static electricity from damaging the thin-film transistor components in the pixel matrix area, thereby avoiding the phenomenon of poor panel display. As the market requires narrower and narrower panel border widths, the electrostatic protection structure of the display panel that takes into account both the electrostatic protection function and the narrow border design can better meet market demand. Summary of the invention

[0004] In view of this, it is necessary to provide an electrostatic protection structure for releasing static electricity on the display panel. The electrostatic protection structure has an electrostatic discharge function and is conducive to reducing the space occupied by the electrostatic protection structure on the display panel.

[0005] In one aspect, the present invention provides an electrostatic protection structure for discharging electrostatic charge on a functional circuit, wherein the functional circuit includes a plurality of signal lines, and the electrostatic protection structure includes:

[0006] A discharge electrode and a plurality of electrostatic protection units electrically connected to the discharge electrode;

[0007] Each electrostatic protection unit includes a first thin film transistor and a second thin film transistor, the first thin film transistor includes a first gate, a first source and a first drain, the second thin film transistor includes a second gate, a second source and a second drain, the first gate is electrically connected to the first drain and both are electrically connected to one of the signal lines, the first source is electrically connected to the second drain, the first drain is electrically connected to the second source, the second gate is electrically connected to the discharge electrode, and the second gate is electrically connected to the second drain;

[0008] The second drain electrodes of two adjacent electrostatic protection units are electrically connected, and the second gate electrodes and the second drain electrodes of the two adjacent electrostatic protection units are electrically connected via the same bridge structure. The present invention also provides a thin film transistor substrate having a display area and a non-display area arranged around the display area, wherein the electrostatic protection structure is arranged in the non-display area.

[0009] A second aspect of the present invention provides a thin film transistor substrate having a display area and a non-display area arranged around the display area, the thin film transistor substrate comprising:

[0010] Liners; and,

[0011] The electrostatic protection structure is arranged on the liner and located in the non-display area.

[0012] A third aspect of the present invention provides a display panel, comprising:

[0013] The thin film transistor substrate; a color filter substrate arranged opposite to the thin film transistor substrate; and a liquid crystal layer located between the thin film transistor substrate and the color filter substrate.

[0014] The fourth aspect of the present invention provides another display panel, which includes the thin film transistor substrate; and a light-emitting element array, the light-emitting element array includes a plurality of light-emitting units; each light-emitting unit includes a light-emitting element, and the thin film transistor substrate is used to drive the light-emitting element to emit light to display an image.

[0015] Compared with the prior art, in the above-mentioned electrostatic protection structure, the second gate and the second drain located on different metal layers of two adjacent electrostatic protection units are electrically connected through the same bridging structure, which can save the space occupied by the electrostatic protection structure. When the electrostatic protection structure is applied to the thin film transistor substrate, the electrostatic protection structure can reduce the space occupied by the thin film transistor substrate while meeting the electrostatic discharge function, so that the display panel using the thin film transistor substrate can achieve a narrow frame design. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG. 4 is a schematic diagram of a thin film transistor substrate according to an embodiment of the present invention.

[0017] Figure 2 FIG. 4 is a schematic diagram of a pixel unit of a thin film transistor substrate according to an embodiment of the present invention.

[0018] Figure 3 FIG. 4 is a circuit diagram of two adjacent electrostatic protection units of a thin film transistor substrate according to an embodiment of the present invention.

[0019] Figure 4 for Figure 3 A partial top view schematic diagram of two adjacent electrostatic protection units on a thin film transistor substrate.

[0020] Figure 5 for Figure 4 Along the section line I 1 -I 2 Cross-section of a cut-away bridge structure.

[0021] Figure 6 for Figure 4 Along the section line I 3 -I 4 A schematic cross-sectional view of a cut-away second thin film transistor, a second thin film transistor and a bridge structure.

[0022] Figure 7 for Figure 1 Equivalent circuit diagram of an electrostatic protection unit.

[0023] Figure 8 is a schematic diagram of a display panel according to an embodiment of the present invention.

[0024] Fig. 9 FIG. 4 is a schematic diagram of another display panel according to an embodiment of the present invention.

[0025] Main component symbols

[0026]

[0027]

[0028]

[0029] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0030] The embodiments of the present invention will be described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0031] Reference Figure 1 The thin film transistor substrate 100 of the embodiment of the present invention has a display area 10A (such as Figure 1 The area surrounded by the dotted line frame in the middle) and the non-display area 10B (such as Figure 1The area surrounded by the dotted frame in the middle and the solid frame at the outermost edge). An electrostatic protection structure 10 is provided in the non-display area 10B of the thin film transistor substrate 100. The electrostatic protection structure 10 includes a discharge electrode 30 and a plurality of electrostatic protection units 20 electrically connected to the discharge electrode 30. In this embodiment, the discharge electrode 30 forms a full circle around the display area 10A. A plurality of signal lines 60 are distributed along the thin film transistor substrate 100 in both the X direction and the Y direction. Figure 1 As shown, the X direction and the Y direction intersect each other. In this embodiment, the X direction is perpendicular to the Y direction. Each electrostatic protection unit 20 is electrically connected to a signal line 60 .

[0032] In this embodiment, each electrostatic protection unit 20 includes a first thin film transistor 201 and a second thin film transistor 202. The first thin film transistor 201 includes a first gate 201a, a first source 201b and a first drain 201c. The second thin film transistor 202 includes a second gate 202a, a second source 202b and a second drain 202c. The first drain 201c is electrically connected to the first gate 201a and both are electrically connected to the signal line 60, the first source 201b is electrically connected to the second drain 202c, the first drain 201c is electrically connected to the second source 202b, the second gate 202a is electrically connected to the discharge electrode 30, and the second gate 202a is electrically connected to the second drain 202c. In this embodiment, the second gate 202a of each electrostatic protection unit 20 reuses a part of the discharge electrode 30.

[0033] The discharge electrode 30 may be connected to a ground signal, and the static electricity on the signal line 60 may be guided to the discharge electrode 30 through the static electricity protection unit 20 electrically connected thereto, and then discharged through the discharge electrode 30 being grounded.

[0034] In this embodiment, the second gates 202a of all the electrostatic protection units 20 reuse a portion of the discharge electrode 30. Specifically, the second gates 202a of all the electrostatic protection units 20 are formed by patterning the same metal layer, and the second gates 202a of all the electrostatic protection units 20 are electrically connected to form a portion of the discharge electrode 30.

[0035] In this embodiment, the first thin film transistor 201 and the second thin film transistor 202 of each electrostatic protection unit 20 are both N-type thin film transistors or P-type thin film transistors. In this embodiment, the positive or negative charge on the signal line 60 is released to the discharge electrode 30 through the first thin film transistor 201 and the second thin film transistor 202.

[0036] In this embodiment, both ends of each signal line 60 are connected to one of the electrostatic protection units 20 , so that the electrostatic protection capability can be enhanced.

[0037] Further references Figure 1 In the display area 10A, the area defined by two adjacent signal lines 60 in the X direction and two adjacent signal lines 60 in the Y direction is defined as a pixel unit 80 of the thin film transistor substrate 100. The plurality of pixel units 80 form a pixel matrix 90. In the present embodiment, the discharge electrode 30 surrounds the pixel matrix 90 to form a full circle.

[0038] Reference Figure 2 In each pixel unit 80 on the thin film transistor substrate 100 , a third thin film transistor 801 and a pixel electrode 802 electrically connected to the third thin film transistor 801 are disposed.

[0039] In the present embodiment, the third thin film transistor 801 includes a gate 801a, a source 801b and a drain 801c. In the present embodiment, the signal line 60 in the X direction is a gate scan line 601 electrically connected to the gate 801a of the third thin film transistor 801 or a source signal line 602 electrically connected to the source 801b of the third thin film transistor 801 in the Y direction. The pixel electrode 802 is electrically connected to the drain 801c of the third thin film transistor 801. The static electricity in the pixel unit 80 is guided to the outside of the pixel matrix 90 by the static electricity protection unit 20 electrically connected to the gate scan line 601 and the source signal line 602, so as to prevent the static electricity instantaneous discharge current from damaging the third thin film transistor 801 in the pixel matrix 90 area and affecting the display effect of the panel.

[0040] Reference Figure 3 , Figure 3 The diagram shows the electrical connection between any two adjacent electrostatic protection units 40 and electrostatic protection units 50 on the thin film transistor substrate 100. The two adjacent electrostatic protection units 40 and electrostatic protection units 50 are respectively electrically connected to two adjacent signal lines 60. The electrostatic protection unit 20, the electrostatic protection unit 40 and the electrostatic protection unit 50 are the same electrostatic protection units on the thin film transistor substrate 100.

[0041] like Figure 3As shown, the electrostatic protection unit 40 includes a first thin film transistor 401 and a second thin film transistor 402. The first thin film transistor 401 includes a first gate 401a, a first source 401b and a first drain 401c, and the second thin film transistor 402 includes a second gate 402a, a second source 402b and a second drain 402c. The first drain 401c is electrically connected to the first gate 401a and both are electrically connected to the signal line 60, the first source 401b is electrically connected to the second drain 402c, the first drain 401c is electrically connected to the second source 402b, the second gate 402a is electrically connected to the discharge electrode 30, and the second gate 402a and the second drain 402c are electrically connected.

[0042] like Figure 3 As shown, the electrostatic protection unit 50 includes a first thin film transistor 501 and a second thin film transistor 502. The first thin film transistor 501 includes a first gate 501a, a first source 501b and a first drain 501c, and the second thin film transistor 502 includes a second gate 502a, a second source 502b and a second drain 502c. The first drain 501c is electrically connected to the first gate 501a and both are electrically connected to the signal line 60, the first source 501b is electrically connected to the second drain 502c, the first drain 501c is electrically connected to the second source 502b, the second gate 502a is electrically connected to the discharge electrode 30, and the second gate 502a is electrically connected to the second drain 502c. The second drain 402c is electrically connected to the second drain 502c.

[0043] In this embodiment, the second gate 402a and the second gate 502a are formed by patterning the same metal layer, and the two are electrically connected to form a part of the discharge electrode 30. The second gate 402a and the second gate 502a reuse a part of the discharge electrode 30.

[0044] Reference Figure 4 , Figure 5 and Figure 6The thin film transistor substrate 100 includes a liner 101, and the electrostatic protection structure 10 is located on the liner 101. The thin film transistor substrate 100 also includes a patterned first metal layer 102 located on the liner 101, a first insulating layer 103 located on the first liner 101 and covering the first metal layer 102, a patterned semiconductor layer 106 located on the first insulating layer 103, and a patterned second metal layer 104 located on the first insulating layer 103 and covering the semiconductor layer 106, and the semiconductor layer 106 is partially exposed by the patterned second metal layer 104. The thin film transistor substrate 100 also includes a second insulating layer 105 covering the second metal layer 104 and the semiconductor layer 106. In this embodiment, the semiconductor layer 106 includes a semiconductor layer 1061 of the second thin film transistor 402 and a semiconductor layer 1062 of the second thin film transistor 502.

[0045] like Figure 4 , Figure 5 and Figure 6 As shown, the second gate 402a and the second gate 502a are electrically connected and are both formed by the patterned first metal layer 102, and both constitute a part of the electrostatic discharge electrode 30. The second source 402b, the second drain 402c, the second source 502b and the second drain 502c are all formed by the patterned second metal layer 104. The second gate 402a faces the semiconductor layer 1061, the second source 402b and the second drain 402c are respectively located on both sides of the semiconductor layer 1061, and the second source 402b and the second drain 402c are spaced apart to expose the semiconductor layer 1061. The second gate 502a faces the semiconductor layer 1062, the second source 502b and the second drain 502c are respectively located on both sides of the semiconductor layer 1062, and the second source 502b and the second drain 502c are spaced apart to expose the semiconductor layer 1062. The second drain 402c is electrically connected to the second drain 502c.

[0046] In this embodiment, the gate electrode 801a of the third thin film transistor 801 in the display area 10A is also formed by the patterned first metal layer 102, and the source electrode 801b and the drain electrode 801c of the third thin film transistor 801 are formed by the patterned second metal layer 104. The semiconductor layer 106 also includes a semiconductor layer of the third thin film transistor 801 (not shown).

[0047] further Figure 4 , reference Figure 5 and Figure 6, the thin film transistor substrate 100 further includes a conductive layer 703. The first insulating layer 103 and the second insulating layer 105 jointly define a first opening 701, and the first opening 701 exposes the electrical connection position C of the second gate electrode 402a and the second gate electrode 502a. The second insulating layer 105 defines a second opening 702, and the second opening 702 exposes the electrical connection position D of the second drain electrode 402c and the second drain electrode 502c. The conductive layer 703 is formed on the second insulating layer 105 and extends to the first opening 701 and the second opening 702. The first opening 701, the second opening 702 and the conductive layer 703 constitute a bridge structure 70. In this embodiment, the second gate electrode 402a and the second drain electrode 402c of the second thin film transistor 402 are electrically connected through the bridge structure 70, and the second gate electrode 502a and the second drain electrode 502c of the second thin film transistor 502 are also electrically connected through the bridge structure 70.

[0048] In existing thin film transistor substrates, the gate and drain of thin film transistors located in different metal layers need to be electrically connected through a bridge structure. When each thin film transistor is electrically connected using a bridge structure, more panel space is inevitably occupied. Figure 4 As shown, the second thin film transistor 402 and the second thin film transistor 502 use a bridge structure 70 for electrical connection between the gate and the drain. In this way, the two adjacent electrostatic protection units 50 and the electrostatic protection unit 40 share the bridge structure 70, so that the electrostatic protection structure 10 can reduce the space occupied by the thin film transistor substrate 100 while having the electrostatic discharge function, which is conducive to the realization of a narrow frame design of the panel.

[0049] In this embodiment, the second gates 202 a of all the electrostatic protection units 20 are formed by the patterned first metal layer 102 , and the second gates 202 a together form a part of the discharge electrode 30 .

[0050] In this embodiment, the signal line 60 is located on the substrate 101 and may be formed by a patterned second metal layer 104 .

[0051] Reference Figure 7 , Figure 7 for Figure 1 An equivalent circuit diagram of any electrostatic protection unit 20.

[0052] When the first thin film transistor 201 and the second thin film transistor 202 are N-type transistors, Figure 1 The equivalent circuit diagram of any electrostatic protection unit 20 is as follows: Figure 7The first thin film transistor 201 is equivalent to a diode 2011; the second thin film transistor 202 is equivalent to a diode 2021. Specifically, the first gate 201a and the first drain 201c that are electrically connected are equivalent to the anode of the diode 2011, and the first source 201b is equivalent to the cathode of the diode 2011; the second gate 202a and the second drain 202c that are electrically connected are equivalent to the anode of the diode 2021, and the second source 202b is equivalent to the cathode of the diode 2021.

[0053] like Figure 7 As shown, the cathode of the diode 2011 and the anode of the diode 2021 are both electrically connected to the discharge electrode 30; the anode of the diode 2011 and the cathode of the diode 2021 are both electrically connected to the signal line 60. In this embodiment, static electricity on the signal line 60 is released to the discharge electrode 30 through the diode 2011 and the diode 2021. Specifically, the positive charge on the signal line 60 is released to the discharge electrode 30 through the diode 2011, and the negative charge on the signal line 60 is released to the discharge electrode 30 through the diode 2021.

[0054] In other embodiments, the first thin film transistor 201 and the second thin film transistor 202 may both be P-type transistors. The first gate 201a and the first drain 201c electrically connected are equivalent to the cathode of the diode 2011, and the first source 201b is equivalent to the anode of the diode 2011; the second gate 202a and the second drain 202c electrically connected are equivalent to the cathode of the diode 2021, and the second source 202b is equivalent to the anode of the diode 2021. The anode of the diode 2011 and the cathode of the diode 2021 are both electrically connected to the discharge electrode 30; the cathode of the diode 2011 and the anode of the diode 2021 are both electrically connected to the signal line 60.

[0055] It is understood that the electrostatic protection structure 10 can also be used to discharge electrostatic charge in other functional circuits having multiple signal lines 60, not limited to the switch circuit in the thin film transistor substrate 100. The functional circuit refers to a circuit having functions other than electrostatic discharge.

[0056] The embodiment of the present invention further provides a display panel 200 .

[0057] Reference Figure 8The display panel 200 includes the thin film transistor substrate 100, a color filter substrate 300 disposed opposite to the thin film transistor substrate 100, and a liquid crystal layer 400 located between the thin film transistor substrate 100 and the color filter substrate 300. In this embodiment, the display panel 200 may be an LCD display panel. The display panel 200 also includes an electrostatic protection structure 10 located on the thin film transistor substrate 100, which is used for electrostatic protection of the display panel 200.

[0058] See also Fig. 9 , an embodiment of the present invention also provides another display panel 500 .

[0059] In other embodiments, the display panel 500 includes the thin film transistor substrate 100 and the light emitting element array 600. The light emitting element array 600 includes a plurality of light emitting units 700, each of which includes a light emitting element 800. The thin film transistor substrate 100 is used to drive the light emitting elements 800 of the light emitting element array 600 to emit light to display an image. The display panel 500 also includes an electrostatic protection structure 10 located on the thin film transistor substrate 100, which is used for electrostatic protection of the display panel 500.

[0060] In this embodiment, the light emitting element array 600 is an OLED array, a Micro-LED array or a Mini-LED array.

[0061] It is obvious to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or basic features of the present invention. Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the scope of the technical solutions of the present invention.

Claims

1. A thin film transistor substrate, comprising a display area and a non-display area surrounding the display area, characterized in that: The thin film transistor substrate comprises: Lining; and An electrostatic protection structure, the electrostatic protection structure is disposed on the liner and located in the non-display area, the electrostatic protection structure comprises a discharge electrode and a plurality of electrostatic protection units electrically connected to the discharge electrode; Each electrostatic protection unit includes a first thin film transistor and a second thin film transistor, the first thin film transistor includes a first gate, a first source and a first drain, the second thin film transistor includes a second gate, a second source and a second drain, the first gate is electrically connected to the first drain and both are electrically connected to a signal line, the first source is electrically connected to the second drain, the first drain is electrically connected to the second source, the second gate is electrically connected to the discharge electrode, and the second gate is electrically connected to the second drain; The second drain electrodes of two adjacent electrostatic protection units are electrically connected, and the second gate electrodes and the second drain electrodes of the two adjacent electrostatic protection units are electrically connected via the same bridge structure; Among them, the thin film transistor substrate also includes a patterned first metal layer located on the liner, a first insulating layer covering the first metal layer, a patterned second metal layer located on the first insulating layer, and a second insulating layer covering the second metal layer; the second gates of the two adjacent electrostatic protection units are electrically connected and are both formed by the patterned first metal layer, and the second drains of the two adjacent electrostatic protection units are electrically connected and are both formed by the patterned second metal layer, the first insulating layer and the second insulating layer are jointly provided with a first opening, and the first opening exposes the electrical connection position of the second gates of the two adjacent electrostatic protection units; a second opening is opened in the second insulating layer, and the second opening exposes the electrical connection position of the second drains of the two adjacent electrostatic protection units; a conductive layer is formed on the second insulating layer and extends to the first opening and the second opening; the first opening, the second opening and the conductive layer form the bridging structure.

2. The thin film transistor substrate according to claim 1, wherein: The second gate of each electrostatic protection unit reuses a part of the discharge electrode.

3. The thin film transistor substrate according to claim 1, wherein: The first thin film transistor and the second thin film transistor are transistors of the same type, and the positive charge or negative charge on the signal line is released to the discharge electrode through the first thin film transistor and the second thin film transistor.

4. The thin film transistor substrate according to claim 1, wherein: The discharge electrodes form a complete circle around the display area.

5. The thin film transistor substrate according to claim 1, wherein: The signal line is located on the lining plate, and both ends of the signal line are connected to one of the electrostatic protection units.

6. The thin film transistor substrate according to claim 4, wherein: In the display area, the area defined by two adjacent signal lines in the X direction and two adjacent signal lines in the Y direction of the thin film transistor substrate is defined as a pixel unit, a plurality of the pixel units form a pixel matrix, and the discharge electrode forms a full circle around the pixel matrix.

7. The thin film transistor substrate according to claim 6, wherein: A third thin film transistor and a pixel electrode electrically connected to the third thin film transistor are provided in each pixel unit, and the signal line is a gate scanning line electrically connected to the gate of the third thin film transistor or a source signal line electrically connected to the source of the third thin film transistor.

8. A display panel, characterized in that: include: The thin film transistor substrate according to any one of claims 1 to 7; A color filter substrate disposed opposite to the thin film transistor substrate; as well as A liquid crystal layer is located between the thin film transistor substrate and the color filter substrate.

9. A display panel, characterized in that: include: The thin film transistor substrate according to any one of claims 1 to 7; as well as A light emitting element array, wherein the light emitting element array comprises a plurality of light emitting units; Each light-emitting unit includes a light-emitting element, and the thin film transistor substrate is used to drive the light-emitting element to emit light to display an image.

Citation Information

Patent Citations

  • Electrostatic protection circuit, array substrate and display device

    CN208507683U