Method for preparing pixel electrode, array substrate and display panel

Abstract

The present application discloses a method for preparing a pixel electrode, an array substrate, and a display panel, wherein the method for preparing the pixel electrode comprises the following steps: providing a substrate; depositing a photoresist layer on one side of the substrate, and patterning the photoresist layer; pre-wetting the photoresist layer to form a plurality of holes on the surface and / or inside of the photoresist layer; depositing a transparent conductive layer on the substrate, the transparent conductive layer covering the photoresist layer; stripping the photoresist layer and the transparent conductive layer covering the photoresist layer to form a patterned pixel electrode. The pre-wetting treatment forms a plurality of holes on the surface and / or inside of the photoresist layer, making the pixel electrode on the photoresist layer easier to break, and improving the stripping efficiency of the photoresist layer.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a method for preparing a pixel electrode, an array substrate including pixel electrodes prepared by the method for preparing the pixel electrode, and a display panel. Background Art

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) has the characteristics of small size, low power consumption and no radiation. It has been developed rapidly in recent years and has occupied a dominant position in the current flat panel display market. TFT-LCD has been widely used in various large, medium and small sized products, covering almost all major electronic products in today's information society, such as LCD TV, high-definition digital TV, computers (desktop and notebook), mobile phones, PDAs, GPS, car displays, projection displays, cameras, digital cameras, electronic watches, calculators, electronic instruments, meters, public displays and virtual displays, etc., which are beyond the reach of any flat panel display and CRT.

[0003] TFT-LCD is generally composed of a liquid crystal panel, a driving circuit and a backlight source below. The liquid crystal panel is the most important part of TFT-LCD. It is composed of liquid crystal injected between the color filter (CF) and the TFT array substrate, and polarizers with polarization directions perpendicular to each other are attached to the outside. The color filter is composed of red, green and blue primary color filters to form pixels, and a transparent common electrode is plated on the color filter; and a large number of thin film transistors arranged in a matrix and some peripheral circuits are plated on the array substrate. For TFT-LCD, the TFT array substrate and the manufacturing process determine its product performance, yield and price, and the production of the TFT array substrate is mainly completed by forming a pattern through a set of thin film deposition and photolithography processes. One photolithography process requires a mask plate. Because the design process of the mask plate is complex and the cost is extremely high, the number of mask plates used in the preparation process of a TFT array substrate has become an important criterion for measuring the complexity of the manufacturing process. Therefore, reducing the number of masks used in the manufacturing process of the TFT array substrate has become a key issue in improving the manufacturing process. At present, the manufacturing process of TFT-LCD array substrates has been gradually simplified. From the initial seven-mask process, a three-mask process has been developed. The three-mask process is in the research stage. The key to the technology lies in the complete breaking of the transparent conductive film at the edge of the photoresist. However, the current three-mask process is difficult to ensure the uniformity of the process and the stripping efficiency of the photoresist, which easily leads to photoresist residues and clogging of the stripping machine.

[0004] Therefore, it is urgent to improve the defects in the prior art. Summary of the invention

[0005] The purpose of the present application is to provide a method for preparing a pixel electrode, an array substrate and a display panel, so as to solve the problem in the prior art that the uniformity of the process and the stripping efficiency of the photoresist are difficult to ensure, and photoresist residues and clogging of the stripping machine are easily formed.

[0006] An embodiment of the present application provides a method for preparing a pixel electrode, comprising the following steps: providing a base substrate; depositing a photoresist layer on one side of the base substrate, and patterning the photoresist layer; pre-wetting the photoresist layer to form a plurality of holes on the surface and / or inside of the photoresist layer; depositing a transparent conductive layer on the base substrate, the transparent conductive layer covering the photoresist layer; and stripping the photoresist layer and the transparent conductive layer covering the photoresist layer to form a patterned pixel electrode.

[0007] Optionally, in some embodiments of the present application, before the step of depositing a photoresist layer on one side of the substrate, the step further includes: depositing a passivation layer on the substrate and patterning the passivation layer; wherein the patterned passivation layer forms an undercut structure.

[0008] Optionally, in some embodiments of the present application, a bottom drilling process is used to generate a bottom recess at the edge of the patterned passivation layer to form the undercut structure.

[0009] Optionally, in some embodiments of the present application, a copper etching solution is used to perform a pre-wetting treatment on the photoresist layer.

[0010] Optionally, in some embodiments of the present application, the concentration of the copper etching solution ranges from 20% to 30%.

[0011] Optionally, in some embodiments of the present application, the pre-wetting treatment time is between 10s and 30s.

[0012] Optionally, in some embodiments of the present application, the depth of the hole is defined as H, and the width of the hole is defined as D, which should satisfy: 100nm≤H≤1500nm, 5nm≤H≤1800nm.

[0013] Correspondingly, an embodiment of the present application also provides an array substrate, comprising: a substrate; a gate layer, arranged on one side of the substrate; a gate insulating layer, arranged on a side of the gate layer away from the substrate and exposing a portion of the gate layer; an active layer, arranged on a side of the gate insulating layer away from the gate layer and arranged corresponding to the unexposed gate layer; a source and drain layer, arranged on a side of the active layer away from the gate insulating layer and arranged corresponding to the active layer; a passivation layer, arranged on a side of the source and drain layer away from the active layer and covering the source and drain layer, the active layer and the gate insulating layer and exposing a portion of the gate layer; and the pixel electrode described in the above embodiment, the pixel electrode is arranged on a side of the passivation layer away from the source and drain layer and covers the exposed portion of the gate layer.

[0014] Optionally, in some embodiments of the present application, the material of the pixel electrode includes indium tin oxide or indium zinc oxide.

[0015] Correspondingly, an embodiment of the present application further provides a display panel, which includes an opposing substrate, a liquid crystal layer and the array substrate described in the above embodiment, wherein the opposing substrate and the array substrate are arranged relative to each other and the liquid crystal layer is sandwiched between the array substrate and the opposing substrate.

[0016] In summary, the embodiments of the present application provide a method for preparing a pixel electrode, an array substrate, and a display panel. Through the pre-wetting treatment, a plurality of holes are formed on the surface and / or inside of the photoresist layer. The holes located on the surface of the photoresist layer close to the transparent conductive layer can cause the transparent conductive layer covering the photoresist layer to break, thereby solving the problem that the transparent conductive film cannot be completely broken at the edge of the photoresist in the current three-mask process; the holes located inside the photoresist layer can reduce the quality of the photoresist layer, and the holes located on the surface of the photoresist layer close to the base substrate can reduce the adhesion between the photoresist layer and the base substrate, thereby reducing the difficulty of peeling off the photoresist layer, making the photoresist layer easier to peel off from the base substrate, further optimizing the breakage problem of the transparent conductive layer on the photoresist layer, thereby forming a patterned pixel electrode.

[0017] Furthermore, the present application also uses a bottom drilling process to generate a bottom depression at the edge of the patterned passivation layer to form the undercut structure, which can cause the transparent conductive layer to break at the edge of the photoresist layer, and then the transparent conductive layer is completely broken by peeling off the photoresist layer to form the patterned pixel electrode. This achieves the dual guarantee of complete breaking of the transparent conductive layer on the photoresist layer, and improves the stripping efficiency of the photoresist layer and the uniformity of the pixel electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 The process diagram of the method for preparing the pixel electrode in the embodiment of the present application is as follows Figure 1 ;

[0020] Figures 2A to 2E The structure diagram of each step of the method for preparing the pixel electrode in the embodiment of the present application is as follows Figure 1 ;

[0021] Figure 3 Schematic diagram 2 of a process for preparing a pixel electrode according to an embodiment of the present application;

[0022] Figures 4A to 4F 2 is a structural schematic diagram of each step of the method for preparing a pixel electrode in an embodiment of the present application;

[0023] Figure 5 is a cross-sectional schematic diagram of the photoresist layer after pre-wetting treatment in an embodiment of the present application;

[0024] Figure 6 is a structural schematic diagram of the array substrate in an embodiment of the present application;

[0025] Figure 7 It is a structural schematic diagram of the array substrate in an embodiment of the present application.

[0026] Description of main reference numerals:

[0027] DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words used, such as "up", "down", "left" and "right", can be the direction of the actual use or working state of the device, can also be the direction of the drawing with reference to the accompanying drawings, and can also refer to two relative directions; while "inside" and "outside" refer to the outline of the device.

[0029] For details, please refer to Figure 1 as well as FIG. 2A to FIG. 2E The present application embodiment provides a method for preparing a pixel electrode 310, comprising the following steps:

[0030] like Figure 1 and Figure 2A As shown, step S1: providing a substrate 100;

[0031] like Figure 1 and Figure 2B As shown, step S2: depositing a photoresist layer 200 on one side of the substrate 100, and patterning the photoresist layer 200;

[0032] like Figure 1 and Figure 2C As shown, step S3: performing a pre-wetting treatment on the photoresist layer 200 to form a plurality of holes 210 on the surface and / or inside of the photoresist layer 200;

[0033] like Figure 1 and Figure 2D As shown, step S4: depositing a transparent conductive layer 300 on the base substrate 100, wherein the transparent conductive layer 300 covers the photoresist layer 200;

[0034] like Figure 1 and Figure 2E As shown, step S5: stripping the photoresist layer 200 and the transparent conductive layer 300 covering the photoresist layer 200 to form a patterned pixel electrode 310.

[0035] In this embodiment, a plurality of holes 210 are formed on the surface and / or inside of the photoresist layer 200 through the pre-wetting treatment. The holes 210 located on the surface of the photoresist layer 200 close to the transparent conductive layer 300 can break the transparent conductive layer 300 covering the photoresist layer 200, thereby solving the problem that the transparent conductive film cannot be completely broken at the edge of the photoresist in the current three-mask process; the holes 210 located inside the photoresist layer 200 can reduce the quality of the photoresist layer 200, and the holes 210 located on the surface of the photoresist layer 200 close to the base substrate 100 can reduce the adhesion between the photoresist layer 200 and the base substrate 100, thereby reducing the difficulty of peeling off the photoresist layer 200, making it easier for the photoresist layer 200 to be peeled off from the base substrate 100, further optimizing the breakage problem of the transparent conductive layer 300 on the photoresist layer 200, thereby forming the patterned pixel electrode 310.

[0036] In one embodiment, please refer to Figure 3 as well as FIG. 4A to FIG. 4E The method for preparing the pixel electrode 310 described in the present application comprises the following steps:

[0037] like Figure 3 and Figure 4A As shown, step S01: providing a substrate 100;

[0038] like Figure 3 and Figure 4B As shown, step S02: depositing a passivation layer 400 on the substrate, and patterning the passivation layer 400; wherein the passivation layer 400 after patterning is formed with an undercut structure;

[0039] like Figure 3 and Figure 4C As shown, step S03: depositing a photoresist layer 200 on one side of the substrate 100, and patterning the photoresist layer 200;

[0040] like Figure 3 and Figure 4D As shown, step S04: performing a pre-wetting treatment on the photoresist layer 200 to form a plurality of holes 210 on the surface and / or inside of the photoresist layer 200;

[0041] like Figure 3 and Figure 4E As shown, step S05: depositing a transparent conductive layer 300 on the base substrate 100, wherein the transparent conductive layer 300 covers the photoresist layer 200;

[0042] like Figure 3 and Figure 4F As shown, step S06 : stripping the photoresist layer 200 and the transparent conductive layer 300 covering the photoresist layer 200 to form a patterned pixel electrode 310 .

[0043] In this embodiment, a bottom drilling process is used to generate a bottom depression at the edge of the patterned passivation layer 400 to form the undercut structure. The undercut structure can cause the transparent conductive layer 300 to break at the edge of the photoresist layer 200. Then, by peeling off the photoresist layer 200, the transparent conductive layer 300 is completely broken to form the patterned pixel electrode 310. When peeling off the photoresist layer 200, in order to prevent the photoresist layer 200 from being completely peeled off due to factors such as adhesion, a plurality of holes 210 are formed on the surface and / or inside of the photoresist layer 200 through the pre-wetting treatment, so that the photoresist layer 200 is more easily peeled off from the substrate 100, further optimizing the fracture problem of the transparent conductive layer 300 on the photoresist layer 200, achieving a double guarantee of complete fracture of the transparent conductive layer 300 on the photoresist layer 200, and improving the peeling efficiency of the photoresist layer 200 and the uniformity of the pixel electrode 310.

[0044] Specifically, the present application conducted a beaker experiment of pre-wetting treatment of the photoresist layer 200, mainly including aluminum etching solution, isopropyl alcohol / ethylene glycol etching solution, dimethyl sulfoxide etching solution, ethanolamine etching solution and copper etching solution, and observed the etching effect of the photoresist layer 200 under different liquid components, liquid concentrations and treatment times by scanning electron microscopy. Scanning electron microscopy (SEM) is an observation method between a transmission electron microscope and an optical microscope. It uses a focused very narrow high-energy electron beam to scan the sample, and stimulates various physical information through the interaction between the beam and the material. This information is collected, amplified, and re-imaged to achieve the purpose of characterizing the microscopic morphology of the material. It can be understood by those skilled in the art that different liquid components have different etching effects at different concentrations and immersion times. Some experimental results in the present application are shown in the following table:

[0045]

[0046] It can be seen from the above table that when the photoresist layer 200 is etched by aluminum etching solution, isopropyl alcohol / ethylene glycol etching solution, dimethyl sulfoxide etching solution or ethanolamine etching solution, multiple holes 210 cannot be formed on the surface and / or inside of the photoresist layer 200. When the photoresist layer 200 is etched by copper etching solution, multiple holes 210 can be formed on the surface and / or inside of the photoresist layer 200. Therefore, the present application uses copper etching solution to pre-wet the photoresist layer 200. The copper etching solution has a fast reaction speed, low operating temperature, long solution life, easy post-processing, and little environmental pollution. The concentration range of the copper etching solution is between 20% and 30%, and the pre-wetting treatment time is between 10s and 30s. Preferably, the concentration of the copper etching solution is 25%, and the pre-wetting treatment time is between 15s and 20s.

[0047] See also Figure 5 In one embodiment of the present application, when the photoresist layer 200 is peeled off, in order to prevent the photoresist layer 200 from being completely peeled off due to factors such as adhesion, a plurality of holes 210 are formed on the surface and / or inside of the photoresist layer 200 through the pre-wetting treatment. In this embodiment, the depth of the hole is defined as H, and the width of the hole is defined as D, which should satisfy: 100nm≤H≤1500nm, 5nm≤H≤1800nm. Preferably, the depth of the hole is H and satisfies: 200nm≤H≤300nm; the width of the hole is D and satisfies: 5nm≤H≤100nm. It can be understood that when the size of the plurality of holes 210 formed on the surface and / or inside of the photoresist layer 200 meets the above range, it is easier to peel off from the substrate 100, which can improve the peeling efficiency of the photoresist layer 200 and the uniformity of the formed pixel electrode 310.

[0048] See also Figure 6The present application also provides an array substrate 10, which includes: a gate layer 12, a gate insulating layer 13, an active layer 14, a source and drain layer 15 stacked on a substrate 11, and the passivation layer 400 and the pixel electrode 310 in the above embodiment. The gate layer 12 is disposed on one side of the substrate 11; the gate insulating layer 13 is disposed on the side of the gate layer 12 away from the substrate 11, and exposes a portion of the gate layer 12; the active layer 14 is disposed on the side of the gate insulating layer 13 away from the gate layer 12, and is disposed corresponding to the unexposed gate layer 12; the source-drain electrode layer 15 is disposed on the side of the active layer 14 away from the gate insulating layer 13, and is disposed corresponding to the active layer 14; the passivation layer 400 is disposed on the side of the source-drain electrode layer 15 away from the active layer 14, and covers the source-drain electrode layer 15, the active layer 14 and the gate insulating layer 13, and exposes a portion of the gate layer 12; the pixel electrode 310 is disposed on the side of the passivation layer 400 away from the source-drain electrode layer 15, and covers the exposed portion of the gate layer 12. The pixel electrode 310 is connected to the gate electrode exposed by the gate layer 12.

[0049] The pixel electrode 310 in this embodiment is prepared by the preparation method in the above embodiment. The array substrate 10 in this application is preferably prepared by three mask processes, the first mask process forms the pattern of the gate layer 12, the second mask process uses halftone technology to form the pattern of the active layer 14 and the source and drain layer 15, and the third mask process forms the pattern of the passivation layer 400 and the pixel electrode 310.

[0050] The substrate 11 includes a transparent glass substrate, a quartz substrate and a polyimide substrate; the gate layer 12 is deposited on the substrate 11 by sputtering or thermal evaporation. The metal of the gate layer 12 can be selected from metals such as Cr, W, Ti, Ta, Mo or their alloys. The gate layer 12 composed of multiple metal layers or alloy layers can also meet the needs. During the first mask process, after coating the photoresist, a mask plate is used for exposure and development, the gate layer 12 is etched and the photoresist is removed to obtain a gate layer 12 pattern including the gate electrode and the gate scanning line. At the same time, the photoresist can also be coated on the substrate 11 first, and the photoresist is exposed and developed to form a photoresist pattern, and then a gate metal film is deposited on the formed photoresist pattern, and a lift-off process is used to form the pattern of the gate electrode and the gate scanning line.

[0051] Furthermore, after the pattern of the gate layer 12 is obtained, the gate insulating layer 13, the active layer 14 and the source-drain electrode layer 15 are continuously deposited on the substrate 11 by sputtering, thermal evaporation or plasma enhanced chemical vapor deposition. In the second mask process, after coating the photoresist, a half-tone mask is used for exposure and development, and the source-drain electrode layer 15 is etched to obtain the pattern of the source-drain electrode layer 15 including the source electrode, the drain electrode and the data scanning line; after removing the photoresist on the pattern of the source-drain electrode layer 15, the active layer 14 is etched again, and then the photoresist is completely removed to obtain the pattern of the active layer 14. Among them, the metal material of the source-drain electrode layer 15 can be selected from metals such as Cr, W, Ti, Ta, Mo or their alloys, and the source-drain electrode layer 15 composed of multiple metal layers or alloy layers can also meet the needs. In addition, if the common four-mask process is used, two common mask processes are used respectively to obtain the pattern of the active layer 14 and the pattern of the source and drain layer 15 in sequence, which will not be described in detail here.

[0052] Subsequently, the passivation layer 400 and the photoresist layer 200 are sequentially coated on the substrate after the above treatment, and the passivation layer 400 is a transparent insulating layer, such as a protective film layer formed by silicon oxide, silicon nitride, silicon oxynitride, epoxy resin, etc.; during the third mask process, after coating the photoresist, a half-tone mask is used for exposure and development, and the passivation layer 400 and the photoresist layer 200 are etched to obtain the patterns of the passivation layer 400 and the photoresist layer 200. Furthermore, under certain process conditions, the passivation layer 400 is subjected to an over-etched bottom drilling process, so that the edge of the retained passivation layer 400 produces a bottom depression to form the undercut structure.

[0053] Finally, the transparent conductive layer 300 is coated on the surface of the patterned passivation layer 400 and the photoresist layer 200 by sputtering or thermal evaporation, and then the photoresist layer 200 and the transparent conductive layer 300 covering the photoresist layer 200 are peeled off to form a patterned pixel electrode 310. Preferably, the material of the pixel electrode 310 includes indium tin oxide or indium zinc oxide, and may also be other metals and metal oxides.

[0054] See also Figure 7 The present application also provides a display panel 1, the display panel 1 comprises a counter substrate 20, a liquid crystal layer 30 and the array substrate 10, the counter substrate 20 and the array substrate 10 are arranged relative to each other, and the liquid crystal layer 30 is sandwiched between the array substrate 10 and the counter substrate 20. Preferably, the counter substrate comprises a color film substrate. The display panel 1 can be applied to any product or component with a display function, such as a liquid crystal panel, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc.

[0055] In summary, the embodiments of the present application provide a method for preparing a pixel electrode, an array substrate, and a display panel. The pre-wetting treatment forms a plurality of holes 210 on the surface and / or inside of the photoresist layer 200. The holes 210 located on the surface of the photoresist layer 200 close to the transparent conductive layer 300 can break the transparent conductive layer 300 covering the photoresist layer 200, thereby solving the problem that the transparent conductive film cannot be completely broken at the edge of the photoresist in the current three-mask process. The holes 210 can reduce the quality of the photoresist layer 200. The holes 210 located on the surface of the photoresist layer 200 close to the base substrate 100 can reduce the adhesion between the photoresist layer 200 and the base substrate 100, thereby reducing the difficulty of peeling off the photoresist layer 200, making it easier to peel off the photoresist layer 200 from the base substrate 100, and further optimizing the breakage problem of the transparent conductive layer 300 on the photoresist layer 200, thereby forming the patterned pixel electrode 310.

[0056] Furthermore, the present application also uses a bottom drilling process to generate a bottom depression at the edge of the patterned passivation layer 400 to form the undercut structure, which can cause the transparent conductive layer 300 to break at the edge of the photoresist layer 200, and then the transparent conductive layer 300 is completely broken by stripping the photoresist layer 200 to form the patterned pixel electrode 310. The double guarantee of the complete breaking of the transparent conductive layer 300 on the photoresist layer 200 is achieved, and the stripping efficiency of the photoresist layer 200 and the uniformity of the pixel electrode 310 are improved.

[0057] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0058] The technical solutions provided by the embodiments of the present application are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for preparing a pixel electrode, characterized in that: The steps include: Providing a substrate; Depositing a photoresist layer on one side of the substrate, and patterning the photoresist layer; Performing a pre-wetting treatment on the photoresist layer to form a plurality of holes on the surface and / or inside of the photoresist layer, wherein the photoresist layer is pre-wetted with a copper etching solution, and the concentration of the copper etching solution is in a range of 20% to 30%, and the pre-wetting treatment time is in a range of 10s to 30s; Depositing a transparent conductive layer on the substrate, wherein the transparent conductive layer covers the photoresist layer; The photoresist layer and the transparent conductive layer covering the photoresist layer are stripped off to form a patterned pixel electrode.

2. The method for preparing a pixel electrode according to claim 1, characterized in that: Before the step of depositing a photoresist layer on one side of the substrate, the step further includes: A passivation layer is deposited on the substrate, and the passivation layer is patterned; wherein the passivation layer after the patterning is formed with an undercut structure.

3. The method for preparing a pixel electrode according to claim 2, characterized in that: A bottom drilling process is used to generate a bottom recess at the edge of the patterned passivation layer to form the undercut structure.

4. The method for preparing a pixel electrode according to claim 1, characterized in that: The depth of the hole is defined as H, and the width of the hole is defined as D, which should satisfy: 100nm≤H≤1500nm, 5nm≤H≤1800nm.

5. An array substrate, characterized in that: include: a substrate; A gate layer, disposed on one side of the substrate; A gate insulating layer, disposed on a side of the gate layer away from the substrate and exposing a portion of the gate layer; An active layer is disposed on a side of the gate insulating layer away from the gate layer and corresponding to the unexposed gate layer; A source-drain electrode layer, arranged on a side of the active layer away from the gate insulating layer and corresponding to the active layer; a passivation layer, disposed on a side of the source-drain electrode layer away from the active layer, and covering the source-drain electrode layer, the active layer and the gate insulating layer, exposing a portion of the gate layer; as well as The pixel electrode prepared by the method for preparing a pixel electrode according to claim 1, wherein the pixel electrode is arranged on a side of the passivation layer away from the source and drain electrode layer, and covers the exposed portion of the gate layer.

6. The array substrate according to claim 5, characterized in that: The material of the pixel electrode includes indium tin oxide or indium zinc oxide.

7. A display panel, characterized in that: The display panel comprises an opposing substrate, a liquid crystal layer and the array substrate as claimed in claim 5, wherein the opposing substrate and the array substrate are arranged relative to each other with an interval, and the liquid crystal layer is sandwiched between the array substrate and the opposing substrate.

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