A HBT device and a manufacturing method thereof

Abstract

The present invention provides a method for manufacturing an HBT device, comprising: providing a substrate on which a heavily doped layer and a plurality of field oxide layers are formed; forming a collector region; forming a first dielectric layer, wherein a first opening is formed in the first dielectric layer; forming a base region, and performing in-situ doping of P-type ions during the growth of the base region; forming a second dielectric layer; etching the second dielectric layer to the surface of the base region to form a second opening and an emitter region, wherein the emitter region has N-type doping; wherein before any step after forming the base region, the method may further include: performing a heat treatment process on the base region. The present invention also provides an HBT device. By performing a heat treatment process on the base region before any step after forming the base region, the present application can avoid the diffusion of P-type ions in the base region, increase the doping concentration of the base region, reduce the resistance of the base region, and increase the characteristic frequency.

Description

Technical Field

[0001] The present application relates to the technical field of HBT device manufacturing, and in particular to an HBT device and a manufacturing method thereof. Background Art

[0002] In radio frequency applications, higher and higher device characteristic frequencies are required. Although RFCMOS can achieve higher frequencies in advanced process technologies, it is still difficult to fully meet radio frequency requirements. For example, it is difficult to achieve characteristic frequencies above 40GHz, and the R&D cost of advanced processes is also very high. Compound semiconductors can achieve very high characteristic frequency devices, but due to the disadvantages of high material cost and small size, and the toxicity of most compound semiconductors, their application is limited. Silicon germanium (SiGe) heterojunction bipolar transistor (HBT) is a good choice for ultra-high frequency devices. First, it uses the energy band difference between SiGe and silicon (Si) to improve the carrier injection efficiency of the emission region and increase the current amplification factor of the device. In addition, the SiGe process is basically compatible with the silicon process, so SiGe HBT has become the main force of ultra-high frequency devices.

[0003] Taking NPN type devices as an example, the existing SiGe HBT uses a highly doped collector buried layer to reduce the collector resistance, uses high concentration and high energy N-type implantation to connect the collector buried layer to form a collector pick-up; epitaxially grows a low-doped collector on the collector buried layer, and forms a base region by epitaxially growing P-type doped SiGe in situ; forms an emitter window surrounded by an emitter window dielectric layer on the surface of the base region, and fills the emitter window with polysilicon and performs N-type ion implantation to form an emitter region composed of N-type heavily doped polysilicon, and finally completes the production of HBT. However, the inventors found that the doping of the base region of the existing HBT device is unstable, the base region resistance is high, and the characteristic frequency is seriously affected. Summary of the invention

[0004] The present application provides a HBT device and a manufacturing method thereof, which can solve the problem that the characteristic frequency of the HBT device is affected.

[0005] On the one hand, an embodiment of the present application provides a method for manufacturing a HBT device, comprising:

[0006] Providing a substrate, wherein a heavily doped layer and a plurality of spaced field oxide layers are formed in the substrate, wherein the heavily doped layer is close to a lower surface of the substrate, and an upper surface of the field oxide layer is flush with an upper surface of the substrate;

[0007] Implanting N-type conductive ions between adjacent field oxide layers in the substrate to form a collector region;

[0008] forming a first dielectric layer on the substrate, wherein a first opening is formed in the first dielectric layer;

[0009] forming a base region, and performing in-situ doping of P-type ions during the growth of the base region, wherein the base region covers the dielectric layer and fills the first opening;

[0010] forming a second dielectric layer on the base region;

[0011] Etching the second dielectric layer to the surface of the base region to form a second opening; and,

[0012] forming an emitter region, the emitter region covering the second dielectric layer and filling the second opening, wherein the emitter region has N-type doping;

[0013] Wherein, before any step after forming the base region, the method further includes: performing a heat treatment process on the base region.

[0014] Optionally, in the method for manufacturing the HBT device, a rapid thermal annealing heat treatment process is performed on the base region, and the process temperature is 950° C. to 1100° C.

[0015] Optionally, in the method for manufacturing the HBT device, a spike annealing heat treatment process is performed on the base region, and the process temperature is 950° C. to 1100° C.

[0016] Optionally, in the manufacturing method of the HBT device, boron ions are doped in situ during the growth of the base region, with a doping concentration of 1E19 atoms / cm 3 ~9E20atoms / cm 3 .

[0017] Optionally, in the manufacturing method of the HBT device, after forming the heavily doped layer in the substrate and before forming the collector region, the manufacturing method of the HBT device further includes: forming an N-type heavily doped buried structure in the substrate, wherein the N-type heavily doped buried structure covers a portion of the heavily doped layer, wherein the doping type of the heavily doped buried structure is the same as the doping type of the heavily doped layer, and the doping concentration of the heavily doped buried structure is higher than the doping concentration of the heavily doped layer.

[0018] Optionally, in the method for manufacturing the HBT device, after forming the base region and before forming the second dielectric layer, the method for manufacturing the HBT device further includes: forming a polysilicon layer on the base region.

[0019] Optionally, in the method for manufacturing the HBT device, the process of etching the second dielectric layer to the surface of the base region also includes etching the polysilicon layer between the second dielectric layer and the base region.

[0020] Optionally, in the manufacturing method of the HBT device, after etching the second dielectric layer to the surface of the base region to form the second opening and before forming the emitter region, the manufacturing method of the HBT device further includes: forming a sidewall structure on the sidewall of the second opening.

[0021] On the other hand, an embodiment of the present application further provides a HBT device, including:

[0022] A substrate, wherein a heavily doped layer and a plurality of spaced field oxide layers are formed in the substrate, wherein the heavily doped layer is close to a lower surface of the substrate, and an upper surface of the field oxide layer is flush with an upper surface of the substrate;

[0023] A collector region, the collector region being located between adjacent field oxide layers in the substrate;

[0024] a first dielectric layer located on the substrate, wherein a first opening is formed in the first dielectric layer;

[0025] A base region with P-type ion in-situ doping located on the first dielectric layer and filling the first opening;

[0026] a second dielectric layer located on the base region, wherein a second opening is formed in the second dielectric layer; and

[0027] an emitting region located on the second dielectric layer and filling the second opening;

[0028] Wherein, after forming the base region and before forming the emitter region, the base region is subjected to a heat treatment process.

[0029] The technical solution of this application has at least the following advantages:

[0030] The present application can avoid the diffusion of P-type ions in the base region by performing a heat treatment process on the base region before any step after forming the base region, thereby increasing the doping concentration of the base region, reducing the base region resistance, and increasing the characteristic frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 is a flow chart of a method for manufacturing an HBT device according to an embodiment of the present invention;

[0033] Figure 2-Figure 9 is a schematic diagram of a semiconductor structure in each process step of manufacturing an HBT device according to an embodiment of the present invention;

[0034] The reference numerals are described as follows:

[0035] 100-substrate, 110-heavily doped layer, 111-heavily doped buried structure, 120-collector region, 130-field oxide layer, 140-first dielectric layer, 150-base region, 160-polysilicon layer, 170-second dielectric layer, 180-sidewall structure, 190-emitter region;

[0036] 200 - first opening, 210 - second opening. DETAILED DESCRIPTION

[0037] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0038] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0039] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0040] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0041] On the one hand, the present application embodiment provides a method for manufacturing a HBT device, referring to Figure 1 , Figure 1 1 is a flow chart of a method for manufacturing an HBT device according to an embodiment of the present invention, wherein the method for manufacturing an HBT device comprises:

[0042] S10: providing a substrate, wherein a heavily doped layer and a plurality of spaced field oxide layers are formed in the substrate, wherein the heavily doped layer is close to a lower surface of the substrate, and an upper surface of the field oxide layer is flush with an upper surface of the substrate;

[0043] S20: implanting N-type conductive ions between adjacent field oxide layers in the substrate to form a collector region;

[0044] S30: forming a first dielectric layer on the substrate, wherein a first opening is formed in the first dielectric layer;

[0045] S40: forming a base region, and performing in-situ doping of P-type ions during the growth of the base region, wherein the base region covers the dielectric layer and fills the first opening;

[0046] S50: forming a second dielectric layer on the base region;

[0047] S60: etching the second dielectric layer to the surface of the base region to form a second opening;

[0048] S70: forming an emitter region, wherein the emitter region covers the second dielectric layer and fills the second opening, wherein the emitter region has N-type doping; wherein before any step after forming the base region, the method may further include: performing a heat treatment process on the base region.

[0049] Specifically, refer to Figure 2-Figure 9 , Figure 2-Figure 9 It is a schematic diagram of the semiconductor structure in each process step of manufacturing the HBT device according to an embodiment of the present invention.

[0050] First, if Figure 2 As shown, a substrate 100 is provided, in which a heavily doped layer 110 and a plurality of spaced field oxide layers 130 are formed, the heavily doped layer 110 is close to the lower surface of the substrate 100, and the upper surface of the field oxide layer 130 is flush with the upper surface of the substrate 100. Specifically, the substrate 100 can be one of single crystal silicon, polycrystalline silicon, and amorphous silicon, and the substrate 100 can also be gallium arsenide, silicon gallium compound, etc. The present application does not limit the material of the substrate 100, and only needs to form an epitaxial layer structure (base region) on silicon thereon later. The heavily doped layer 110 can be obtained by injecting a certain concentration of N-type conductive ions. Furthermore, after forming the heavily doped layer 110 and before forming the collector region 120, the manufacturing method of the HBT device also includes: forming an N-type heavily doped buried structure 111 in the substrate 100, wherein the N-type heavily doped buried structure 111 covers a portion of the heavily doped layer 110, wherein the doping type of the heavily doped buried structure 111 is the same as the doping type of the heavily doped layer 110, and the doping concentration of the heavily doped buried structure 111 is higher than the doping concentration of the heavily doped layer 110.

[0051] Then, if Figure 3 As shown, N-type conductive ions are injected between adjacent field oxide layers 130 in the substrate 100 to form a collector region 120. Specifically, the collector region 120 can be obtained by injecting a certain concentration of N-type conductive ions. The N-type heavily doped buried structure 111 is located directly below the collector region 120, and the N-type heavily doped buried structure 111 can make the collector region 120 better contact with the heavily doped layer 110. The field oxide layer 130 isolates a plurality of active regions, and the collector region 120 can be formed in each active region.

[0052] Then, if Figure 4 As shown, a first dielectric layer 140 is formed on the substrate 100, and a first opening 200 is formed in the first dielectric layer 140. Specifically, the dielectric layer 140 may be a silicon oxide material, and the first opening 200 obtained by etching the first dielectric layer 140 is equivalent to forming a base window on the substrate 100 (active area), and the size of the base window is larger than the size of the active area, that is, the base window exposes the entire surface of the active area.

[0053] Further, such as Figure 5As shown, a base region 150 is formed, and P-type ions are in-situ doped during the growth of the base region 150. The base region 150 covers the dielectric layer 140 and fills the first opening 200. Specifically, in this embodiment, the base region 150 can be a silicon germanium epitaxial on a silicon substrate. In this embodiment, boron ions can be in-situ doped during the growth of the base region 150, and the doping concentration is 1E19atoms / cm 3 ~9E20atoms / cm 3 .

[0054] Better, such as Figure 6 As shown, after forming the base region 150 and before forming the second dielectric layer 170 , the method for manufacturing the HBT device further includes: forming a polysilicon layer 160 on the base region 150 .

[0055] Then, if Figure 7 As shown, a second dielectric layer 170 is formed on the base region 150. Specifically, the material of the second dielectric layer 170 can be the same as the material of the first dielectric layer 140.

[0056] Further, such as Figure 7 As shown, the second dielectric layer 170 and the polysilicon layer 160 are etched to the surface of the base region 150 to form a second opening 210. Specifically, the second opening 210 is equivalent to an emitter region window of the emitter region 190 formed subsequently.

[0057] Then, if Figure 8 As shown, after etching the second dielectric layer 170 and the polysilicon layer 160 to the surface of the base region 150 to form the second opening 210, and before forming the emitter region 190, the method for manufacturing the HBT device further includes: forming a sidewall structure 180 on the sidewall of the second opening 210. Specifically, the sidewall structure 180 can achieve the isolation of the subsequent emitter region 190 and the polysilicon layer 160.

[0058] In this embodiment, before any step after forming the base region 150, the manufacturing method of the HBT device may further include: performing a heat treatment process on the base region 150. Specifically, the heat treatment process may be performed on the base region 150 after forming the base region 150 and before forming the polysilicon layer 160; or, the heat treatment process may be performed on the base region 150 after forming the polysilicon layer 160 and before forming the second dielectric layer 170; or, the heat treatment process may be performed on the base region 150 after forming the second dielectric layer 170 and before forming the second opening 210; or, the heat treatment process may be performed on the base region 150 after forming the second opening 210 and before forming the spacer structure 180.

[0059] Preferably, the present application may perform a rapid thermal annealing heat treatment process on the base region 150, with a process temperature of 950°C to 1100°C; or, the present application may perform a spike annealing heat treatment process on the base region 150, with a process temperature of 950°C to 1100°C. The present application may suppress the diffusion of P-type ions in the base region 150 and greatly increase the characteristic frequency of the device by performing a heat treatment process on the base region 150 before any step after forming the base region 150. At the same time, since the diffusion of P-type ions is suppressed, the doping concentration of the base region 150 is increased in disguise, the base region resistance is reduced, and the maximum frequency of the device is greatly increased.

[0060] Finally, if Fig. 9 As shown, an emitter region 190 is formed, and the emitter region 190 covers the second dielectric layer 170 and fills the second opening 210 , wherein the emitter region 190 has N-type doping.

[0061] In this embodiment, the collector region 120 and the base region 150 can be subsequently led out to the surface of the emitter region 190 through metal plugs.

[0062] On the other hand, the present application embodiment also provides a HBT device, please refer to Fig. 9 , the HBT device comprises:

[0063] A substrate 100, wherein a heavily doped layer 110 and a plurality of spaced field oxide layers 130 are formed in the substrate 100, wherein the heavily doped layer 110 is close to a lower surface of the substrate 100, and an upper surface of the field oxide layer 130 is flush with an upper surface of the substrate 100;

[0064] A collector region 120 , wherein the collector region 120 is located between adjacent field oxide layers 130 in the substrate 100 ;

[0065] A first dielectric layer 140 located on the substrate 100 , wherein a first opening 200 is formed in the first dielectric layer 140 ;

[0066] A base region 150 with P-type ion in-situ doping located on the first dielectric layer 140 and filling the first opening 200;

[0067] a second dielectric layer 170 located on the base region 150 , wherein a second opening 210 is formed in the second dielectric layer 170 ; and,

[0068] an emission region 190 located on the second dielectric layer 170 and filling the second opening 210;

[0069] After forming the base region 150 and before forming the emitter region 190 , the base region 150 is subjected to a heat treatment process.

[0070] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A method for manufacturing a HBT device, characterized in that: include: Providing a substrate, wherein a heavily doped layer and a plurality of spaced field oxide layers are formed in the substrate, wherein the heavily doped layer is close to a lower surface of the substrate, and an upper surface of the field oxide layer is flush with an upper surface of the substrate; Implanting N-type conductive ions between adjacent field oxide layers in the substrate to form a collector region; forming a first dielectric layer on the substrate, wherein a first opening is formed in the first dielectric layer; forming a base region, and performing in-situ doping of P-type ions during the growth of the base region, wherein the base region covers the dielectric layer and fills the first opening; forming a second dielectric layer on the base region; Etching the second dielectric layer to the surface of the base region to form a second opening; as well as, forming an emitter region, the emitter region covering the second dielectric layer and filling the second opening, wherein the emitter region has N-type doping; Wherein, before any step after forming the base region, the method further includes: performing a heat treatment process on the base region.

2. The method for manufacturing a HBT device according to claim 1, characterized in that: A rapid thermal annealing heat treatment process is performed on the base region, and the process temperature is 950° C. to 1100° C.

3. The method for manufacturing a HBT device according to claim 1, characterized in that: A spike annealing heat treatment process is performed on the base region, and the process temperature is 950° C. to 1100° C.

4. The method for manufacturing a HBT device according to claim 1, characterized in that: During the growth of the base region, boron ions are doped in situ at a doping concentration of 1E19 atoms / cm 3 ~9E20atoms / cm 3 .

5. The method for manufacturing a HBT device according to claim 1, characterized in that: In the substrate, after forming the heavily doped layer and before forming the collector region, the manufacturing method of the HBT device further includes: forming an N-type heavily doped buried structure in the substrate, wherein the N-type heavily doped buried structure covers a portion of the heavily doped layer, wherein the doping type of the heavily doped buried structure is the same as the doping type of the heavily doped layer, and the doping concentration of the heavily doped buried structure is higher than the doping concentration of the heavily doped layer.

6. The method for manufacturing a HBT device according to claim 1, characterized in that: After forming the base region and before forming the second dielectric layer, the method for manufacturing the HBT device further includes: forming a polysilicon layer on the base region.

7. The method for manufacturing a HBT device according to claim 6, characterized in that: The process of etching the second dielectric layer to the surface of the base region also includes etching the polysilicon layer between the second dielectric layer and the base region.

8. The method for manufacturing a HBT device according to claim 1, characterized in that: After etching the second dielectric layer to the surface of the base region to form the second opening and before forming the emitter region, the method for manufacturing the HBT device further includes: forming a sidewall structure on the sidewall of the second opening.

9. A HBT device, characterized in that: include: A substrate, wherein a heavily doped layer and a plurality of spaced field oxide layers are formed in the substrate, wherein the heavily doped layer is close to a lower surface of the substrate, and an upper surface of the field oxide layer is flush with an upper surface of the substrate; A collector region, the collector region being located between adjacent field oxide layers in the substrate; a first dielectric layer located on the substrate, wherein a first opening is formed in the first dielectric layer; A base region with P-type ion in-situ doping located on the first dielectric layer and filling the first opening; a second dielectric layer located on the base region, wherein a second opening is formed in the second dielectric layer; and an emitting region located on the second dielectric layer and filling the second opening; Wherein, after forming the base region and before forming the emitter region, the base region is subjected to a heat treatment process.

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