Display Panel

Abstract

The present application provides a display panel, including a display light-emitting area, a driving circuit area and a fan-out area arranged below the display light-emitting area, wherein the area of ​​the driving circuit area is smaller than the area of ​​the display light-emitting area, and the display light-emitting area completely covers the driving circuit area and exceeds the driving circuit area. The display panel of the present application saves a certain amount of space by reducing the area of ​​the edge area of ​​the driving circuit area to reduce the width of the display panel frame.

Description

Technical Field

[0001] The present application relates to a display technology, and in particular to a display panel. Background Art

[0002] With the development of display industry technology, customers have higher and higher requirements for display panels. For example, for some high-end display panels, customers will require a narrow bezel design.

[0003] With the development of flexible display panels, a new pad bending technology has been proposed to address the problem of large bottom bezels of rigid panels. The bonding pad (binding area) for placing COF or IC bonding pad area of ​​COP under the existing display panel, the fanout traces connected to the Data signal in the pixel circuit of the AA area, and some test circuit areas are bent to the bottom of the panel, so that the bottom bezel of the original rigid display panel can be reduced. Figure 1 shown.

[0004] However, as attached Figure 1 As shown in the schematic diagram of the existing flexible display panel architecture, in the existing design, in order to ensure the width of the E value (the width required for the edge curve design of the panel), the distance D value from the AA edge to the edge of the Bending area (bending area C2) of the flexible display panel is still relatively large, mainly because the wiring space of the fan-out area C3 (the Data line of the AA area C1 is fanned into the Bending area, and the larger the E value, the larger the required D value) needs to be considered. In addition, with the space required for the bending area (bending accuracy and bending radius), the bottom frame of the entire panel is still relatively large.

[0005] Among them Figure 2 As shown, the flexible display panel includes a driving unit 11 ′ and a display unit 12 ′. The driving unit 11 ′ corresponds to the display unit 12 ′ one by one. The driving unit 11 ′ and the display unit 12 ′ are designed to have the same size and the same designed area, and the two are connected through vias.

[0006] Therefore, it is necessary to provide a display panel with a narrow frame to solve the above technical problems. Summary of the invention

[0007] The embodiment of the present application provides a display panel with a narrow frame, so as to solve the technical problem that the frame of the existing display panel is relatively large.

[0008] The present application embodiment provides

[0009] A display panel comprises a driving circuit area, a fan-out area for setting a fan-out wiring, and a display light-emitting area arranged on the driving circuit area, wherein:

[0010] The area of ​​the driving circuit area is smaller than the area of ​​the display light emitting area, and the display light emitting area completely covers the driving circuit area and exceeds the driving circuit area;

[0011] The driving circuit area includes a plurality of driving units, the display light-emitting area includes a plurality of display units, each of the driving units is electrically connected to a corresponding display unit, and the area of ​​the driving unit is smaller than the area of ​​the display unit;

[0012] The driving circuit area includes a middle area and an edge area arranged on at least one side of the middle area, and a distance between the driving units located in the middle area is greater than a distance between the driving units located in the edge area.

[0013] In some embodiments of the present application, each of the driving units includes a driving thin film transistor, and the driving thin film transistor includes a source / drain electrode and a planar layer disposed on the source / drain electrode;

[0014] Each of the display units comprises an anode disposed on the planar layer and a pixel definition layer disposed on the anode and having an opening, wherein the anode is connected to the source / drain via a source / drain wiring;

[0015] There is a boundary line between the edge area and the middle area;

[0016] In the edge region and the display light-emitting area corresponding to the edge region, the length of the source / drain wiring is longer from a side close to the boundary line to a side far from the boundary line.

[0017] In some embodiments of the present application, the display light-emitting area covers at least a portion of the fan-out area; the edge area includes a lower edge area located below the middle area; and the distance between the driving units located in the middle area is greater than the distance between the driving units located in the lower edge area.

[0018] In some embodiments of the present application, the display light-emitting area includes a first display light-emitting area corresponding to the lower edge area, a second display area corresponding to the middle area, and a third display light-emitting area corresponding to the fan-out area, and at least part of the driving units in the lower edge area are electrically connected to the display units of the third light-emitting display area;

[0019] In the lower edge region, the lower edge region has a first edge, the first edge coincides with the boundary line, and the first edge is located at a side of the lower edge region close to the middle region;

[0020] In the driving unit in the lower edge region and the display unit electrically connected to the driving unit in the lower edge region, the source / drain of the driving unit is staggered toward a side close to the first edge relative to the anode.

[0021] In some embodiments of the present application, in the lower edge region, from the side close to the first edge to the side away from the first edge, the greater the offset distance of the source / drain of the driving unit relative to the anode toward the side close to the first edge.

[0022] In some embodiments of the present application, the source / drain wiring is arranged in the same layer as the source / drain and is connected to it.

[0023] In some embodiments of the present application, the source / drain wiring is arranged in a different layer from the source / drain, one end of the source / drain wiring is electrically connected to the source / drain, and the other end of the source / drain wiring is electrically connected to the anode.

[0024] In some embodiments of the present application, each of the driving thin film transistors includes a substrate, an active layer disposed on the substrate, a first gate disposed on the active layer, a second gate disposed on the first gate, the source / drain disposed on the second gate, and the planar layer disposed on the source / drain;

[0025] The source / drain wiring is arranged in the same layer as the source / drain and is connected to the source / drain, and the planar layer covers the source / drain wiring and the source / drain;

[0026] The source / drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through a via hole.

[0027] In some embodiments of the present application, each of the driving thin film transistors includes a substrate, an active layer disposed on the substrate, a first gate disposed on the active layer, a second gate disposed on the first gate, a source / drain disposed on the second gate, and the planar layer disposed on the source / drain, wherein the source / drain wiring is disposed on the planar layer;

[0028] The source / drain of the driving thin film transistor is electrically connected to the anode of the corresponding display unit through the source / drain wiring.

[0029] In some embodiments of the present application, the fan-out area is located on one side of the lower edge area, wherein the fan-out area includes a first portion covered by the display light-emitting area and a second portion arranged outside the display light-emitting area.

[0030] In some embodiments of the present application, the edge region further includes two side edge regions arranged on both sides of the middle region, and the distance between the driving units located in the middle region is greater than the distance between the driving units located in the two side edge regions.

[0031] In some embodiments of the present application, the edge region includes an upper edge region disposed above the middle region, and a distance between the driving units located in the middle region is greater than a distance between the driving units located in the upper edge region.

[0032] In this application, it should be noted that, in terms of the current technological level, when the pixel PPI is less than 530, the area of ​​the driving unit can be smaller than the area of ​​the display unit electrically connected thereto. Of course, with the development of technological level, when the pixel PPI is greater than or equal to 530, the above structure should also be possible. Therefore, this application does not limit the pixel PPI.

[0033] Compared with the display panel of the prior art, the display panel of the present application reduces the occupied area of ​​the lower edge area of ​​the driving circuit area while keeping the area of ​​the display light-emitting area unchanged, thereby saving a certain amount of space for setting the wiring of the fan-out area, thereby reducing the width of the lower edge of the display panel;

[0034] Furthermore, the occupied area of ​​the upper edge area of ​​the driving circuit area is reduced, and space is saved for setting the source driving circuit or VSS wiring, thereby reducing the width of the upper frame of the display panel; the occupied area of ​​the edge areas on both sides of the driving circuit area is reduced, and space is saved for setting the gate driving circuit or VSS wiring, thereby reducing the width of the frame on both sides of the display panel; the technical problem that the lower side of the existing display panel is too wide is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. The drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0036] Figure 1 A schematic diagram of the structure of an AMOLED display panel in the prior art;

[0037] Figure 2 It is a structural schematic diagram of a driving unit and a display unit in the prior art;

[0038] Figure 3 is a schematic structural diagram of a first embodiment of a display panel of the present application;

[0039] Figure 4 for Figure 3 A magnified view of middle;

[0040] Figure 5 for Figure 3 Enlarged view of middle B;

[0041] Figure 6 A schematic cross-sectional view of a driving unit and a corresponding display unit in a middle area and a lower edge area of ​​a display panel of the first embodiment of the present application;

[0042] Figure 7 A schematic cross-sectional view of a driving unit and a corresponding display unit in a middle area and a lower edge area of ​​a second embodiment of a display panel of the present application;

[0043] Figure 8 A schematic diagram of the arrangement structure of the driving unit and the display unit of the third embodiment of the display panel of the present application;

[0044] Fig. 9 It is a schematic cross-sectional view of a driving unit and a corresponding display unit in a middle area and a lower edge area of ​​a third embodiment of a display panel of the present application. DETAILED DESCRIPTION

[0045] Please refer to the drawings in the accompanying drawings, wherein the same component symbols represent the same components. The following description is based on the illustrated specific embodiments of the present application, which should not be considered as limiting other specific embodiments of the present application that are not described in detail herein.

[0046] Please refer to Figure 3 , Figure 3 FIG. 1 is a schematic structural diagram of a first embodiment of a display panel of the present application.

[0047] The display panel of the first embodiment includes a driving circuit area D2 for driving the display light-emitting area D1 to emit light, a fan-out area D3 for setting fan-out wiring, and a display light-emitting area D1 and a bending area D4 arranged above the driving circuit area D2 and the fan-out area D3.

[0048] The area of ​​the driving circuit area D2 is smaller than the area of ​​the display light emitting area D1 , and the display light emitting area D1 completely covers the driving circuit area D2 and covers at least a portion of the fan-out area D3 .

[0049] In the first embodiment, the area of ​​the lower edge of the driving circuit area D2 is reduced while the area of ​​the display light-emitting area D1 remains unchanged, thereby saving a certain amount of space for setting the wiring of the fan-out area D3, thereby reducing the width of the lower edge of the display panel.

[0050] For details, please refer to Figure 4The driving circuit area D2 includes a plurality of driving units 11, and the display light-emitting area D1 includes a plurality of display units 12. Each driving unit 11 is electrically connected to a corresponding display unit 12, and the area of ​​the driving unit 11 is smaller than the area of ​​the display unit 12, so as to compress the area of ​​the driving circuit area D2 to the greatest extent.

[0051] The driving circuit area D2 includes a middle area D21 and an edge area disposed on at least one side of the middle area D21. The edge area includes a lower edge area D22 disposed below the middle area D21, and the distance between the driving units 11 located in the middle area D21 is greater than the distance between the driving units 11 located in the lower edge area D22, so as to reduce the area of ​​the lower edge area D22.

[0052] In the first embodiment, the area of ​​the display light-emitting region D1 is the sum of the areas of the orthographic projections of the plurality of display units 12 on the substrate 111. The area of ​​a single display unit 12 is the opening of a pixel definition layer and a portion of the pixel definition layer on one side of the opening (e.g., Figure 6 ) is the area of ​​the orthographic projection on the substrate 111. The area of ​​the driving circuit area D2 is the sum of the areas of the orthographic projections of multiple driving units 11 on the substrate 111, and the area of ​​a single driving unit 11 is the area occupied by the layout of the sub-pixel circuit, such as the sum of the orthographic projection areas of 7T1C and 6T1C on the substrate. That is, the area of ​​a single driving unit 11 is the sum of the areas of the orthographic projections of circuits such as 7T1C or 6T1C on the substrate, and only one driving thin film transistor is drawn in this embodiment, and the area of ​​a single driving unit includes a driving thin film transistor and at least one switching thin film transistor, which is a technology well known to those skilled in the art and will not be repeated. Each driving unit 11 includes a driving thin film transistor for driving the display unit 12 to emit light and at least one switching thin film transistor (not shown in the figure) that acts as a switch.

[0053] The sizes of the driving unit 11 and the display unit 12 are designed differently, wherein the display unit 12 is designed according to the size and area calculated based on the original panel size and resolution, while the area of ​​the driving unit 11 is reduced, that is, the area of ​​the driving unit 11 is smaller than that of the display unit 12.

[0054] In addition, by shortening the arrangement distance of the driving units 11 in the lower edge area D22, the occupied area of ​​the lower edge area D22 is reduced, thereby saving space for arranging the wiring of the fan-out area D3, thereby reducing the width of the lower frame of the panel.

[0055] Each driving unit 11 includes a driving thin film transistor. The driving thin film transistor includes a source / drain 115 and a planar layer 116 disposed on the source / drain 115. Each display unit 12 includes an anode 121 disposed on the planar layer 116 and a pixel definition layer 122 disposed on the anode 121 and having an opening. The source / drain 115 is electrically connected to the anode 121 through a source / drain wiring (not numbered in the figure).

[0056] The source / drain 115 is arranged on the same layer and connected via source / drain wiring.

[0057] The display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a third display light-emitting area D13 corresponding to the fan-out area D3. At least part of the driving unit 11 of the lower edge area D22 is electrically connected to the display unit 12 of the third light-emitting display area D13.

[0058] The lower edge region D22 has a first edge M. The first edge M is located at a side of the lower edge region D22 close to the middle region D21 .

[0059] In the driving unit 11 of the lower edge region D22 and the display unit 12 electrically connected to the driving unit 11 of the lower edge region D22, the source / drain 115 of the driving unit 11 is staggered relative to the anode 121 toward the side close to the first edge M. This makes it possible that no driving unit is disposed directly below the third display light-emitting region D13, so that it is used to set the fan-out wiring of the fan-out region D3.

[0060] Such a configuration reduces the occupied area of ​​the lower edge region D22 and uses the remaining space for arranging the wiring of the fan-out region D3, thereby reducing the width of the lower frame of the panel.

[0061] In addition, in the lower edge region D22, from the side close to the first edge M to the side far from the first edge M, the greater the offset distance of the source / drain 115 of the driving unit 11 relative to the anode 121 toward the side close to the first edge M. Such an arrangement maximizes the area of ​​the third display light-emitting area D13, making it easier to arrange the most fan-out wiring directly below it.

[0062] The fan-out area D3 is located on one side of the lower edge area D22, wherein the fan-out area D3 includes a first portion D31 covered by the display light-emitting area D1 and a second portion D32 arranged outside the display light-emitting area D1, that is, the third display light-emitting area D13 is correspondingly arranged above the first portion D31 of the fan-out area D3.

[0063] For further information, please refer to Figure 5The driving circuit area D2 further includes an upper edge area D23 disposed above the middle area D21. The distance between the driving units 11 located in the middle area D21 is greater than the distance between the driving units 11 located in the upper edge area D23 to reduce the occupied area of ​​the upper edge area D23.

[0064] The arrangement distance of the driving unit 11 in the upper edge area D23 is shortened, that is, in the vertical space, the driving unit 11 located in the upper edge area D23 and the corresponding display unit 12 are staggered, and the driving unit 11 located in the upper edge area D23 is arranged close to the middle area D21, so as to reduce the occupied area of ​​the upper edge area D23, thereby saving space for arranging the source driving circuit or VSS wiring, thereby reducing the width of the upper frame of the panel.

[0065] For further information, please refer to Figure 4 and Figure 5 The driving circuit area D2 includes two side edge areas D24 arranged on both sides of the middle area D21. The distance between the driving units 11 located in the middle area D21 is greater than the distance between the driving units 11 located in the two side edge areas D24, so as to reduce the occupied area of ​​the two side edge areas D24.

[0066] The arrangement distance of the driving units 11 in the edge areas on both sides of the driving circuit area D2 is shortened, that is, in the vertical space, the driving units 11 located in the edge areas D24 on both sides and the corresponding display units 12 are staggered, and the driving units 11 located in the edge areas D24 on both sides are arranged close to the middle area D21, so as to reduce the occupied area of ​​the edge areas D24 on both sides, thereby saving space for arranging the gate driving circuit or VSS wiring, thereby reducing the width of the frame on both sides of the panel.

[0067] In addition, in the present application, the distances between the driving units in the middle area D21 are not necessarily equal. For example, the distances between the driving units in the middle area D21 may be gradually reduced from the center to the edges to further reduce the occupied area of ​​the driving circuit area D2.

[0068] In this first embodiment, please refer to Figure 6 Each driving thin film transistor includes a substrate 111, an active layer 112 disposed on the substrate 111, a first gate electrode 113 disposed on the active layer 112, a second gate electrode 114 disposed on the first gate electrode 113, a source / drain electrode 115 disposed on the second gate electrode 114, and a planar layer 116 disposed on the source / drain electrode 115. A first insulating layer is disposed between the active layer 112 and the first gate electrode 113, a second insulating layer is disposed between the first gate electrode 113 and the second gate electrode 114, and an interlayer dielectric layer is disposed between the second gate electrode 114 and the source / drain electrode 115.

[0069] The display unit 12 includes an anode 121 disposed on the planar layer 116 , a pixel definition layer 122 disposed on the anode 121 , and an organic light emitting layer (not shown).

[0070] The wiring of the fan-out area D3 is arranged in the same layer as the first gate 113, the second gate 114 or the source / drain 115. The wiring of the fan-out area D3 is formed by extending outward from the lower edge area of ​​the driving circuit area D2.

[0071] In the first embodiment, the drive unit 11 in the peripheral edge area of ​​the drive circuit area D2 and the display unit 12 electrically connected thereto are staggered, for example, the source / drain 115 of the drive unit 11 is staggered relative to the anode 121 toward the side close to the first edge M, resulting in the drive unit 11 not being completely directly below the corresponding display unit 12. When there is enough space between the source / drain 115, the length of the source / drain 115 can be appropriately extended to directly below the anode 121, wherein the portion extended from the source / drain 115 is the source / drain wiring. The drive unit 11 located in the peripheral edge area (upper, lower and both side edge areas) of the drive circuit area D2 and the display unit 12 electrically connected thereto are electrically connected through vias.

[0072] In the lower edge area D22, from the side close to the first edge M to the side away from the first edge M, the length of the source / drain 115 of the driving unit 11 electrically connected to the anode 121 of the display unit 12 is longer; that is, the length of the source / drain wiring of the driving unit 11 electrically connected to the anode 121 of the display unit 12 is longer.

[0073] In this second embodiment, please refer to Figure 7 The display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a third display light-emitting area D13 corresponding to the fan-out area D3. The driving unit 21 includes a driving thin film transistor. The difference between this embodiment and the first embodiment is that the driving thin film transistor also includes a substrate 211, an active layer 212 disposed on the substrate 211, a first gate 213 disposed on the active layer 212, a second gate 214 disposed on the first gate 213, a source / drain 215 disposed on the second gate 214, and a planar layer 217 disposed on the source / drain 215. A source / drain wiring 216 is disposed on the planar layer 217. Among them, a first insulating layer is arranged between the active layer 212 and the first gate 213, a second insulating layer is arranged between the first gate 213 and the second gate 214, an interlayer dielectric layer is arranged between the second gate 214 and the source / drain 215, and another flat layer 218 is arranged between the source / drain 215 and the source / drain wiring 216.

[0074] The display unit 22 includes an anode 221 disposed on another planar layer 218 , a pixel definition layer 222 disposed on the anode 221 and having an opening, and an organic light emitting layer (not shown).

[0075] The source / drain 215 of the driving thin film transistor is electrically connected to the anode 221 of the corresponding display unit 22 through the source / drain wiring 216 .

[0076] In the second embodiment, since the driving units 21 and the corresponding display units 22 in the peripheral edge regions of the driving circuit area are staggered, that is, the source / drain 215 of the driving unit 21 is staggered toward the side close to the first edge M relative to the anode 221, resulting in the driving unit 21 not being completely directly below the corresponding display unit 22. Therefore, when there is insufficient space for the source / drain 215, the driving units 21 located in the peripheral edge regions (upper, lower and both side edge regions) of the driving circuit area and the display units 22 electrically connected thereto are electrically connected via the source / drain wiring 216.

[0077] In the lower edge region D22 , from the side close to the first edge M to the side far from the first edge M, the length of the source / drain wiring 216 of the driving unit 21 electrically connected to the anode 221 of the display unit 22 is longer.

[0078] In the third embodiment, please refer to Figure 8 and Fig. 9 The difference between this embodiment and the first embodiment and the second embodiment is that the driving circuit area includes a plurality of driving units 31, the display light-emitting area includes a plurality of display units 32, and each driving unit 31 is electrically connected to a corresponding display unit 32.

[0079] The driving circuit area includes a middle area D21 and a lower edge area D22 disposed below the middle area D21. In the middle area D21, the area of ​​the driving unit 31 is equal to the area of ​​the display unit 32. In the lower edge area D22, the area of ​​the driving unit 31 is smaller than the area of ​​the display unit 32.

[0080] The display light-emitting area D1 includes a first display light-emitting area D11 corresponding to the lower edge area D22, a second display light-emitting area D12 corresponding to the middle area D21, and a third display light-emitting area D13 corresponding to the fan-out area D3. At least part of the driving unit 31 of the lower edge area D22 is electrically connected to the display unit 32 of the third light-emitting display area D13.

[0081] The lower edge region D22 has a first edge M. The first edge M is located at a side of the lower edge region D22 close to the middle region D21 .

[0082] In the driving unit 31 of the lower edge region D22 and the display unit 32 electrically connected to the driving unit 31 of the lower edge region D22, the source / drain 315 of the driving unit 31 is staggered relative to the anode 321 toward the side close to the first edge M. This allows the fan-out wiring of the fan-out region D3 to be set directly below the third display light-emitting region D13.

[0083] Such an arrangement reduces the occupied area of ​​the lower edge region D22 to leave space for arranging the wiring of the fan-out region D3.

[0084] The fan-out area is located at one side of the lower edge area D22, wherein the fan-out area D3 includes a first portion covered by the display light-emitting area and a second portion disposed outside the display light-emitting area.

[0085] Compared with the display panel of the prior art, the display panel of the present application reduces the occupied area of ​​the lower edge area of ​​the driving circuit area while keeping the area of ​​the display light-emitting area unchanged, thereby saving a certain amount of space for setting the wiring of the fan-out area, thereby reducing the width of the lower edge of the display panel;

[0086] Furthermore, the occupied area of ​​the upper edge area of ​​the driving circuit area is reduced, and space is saved for setting the source driving circuit or VSS wiring, thereby reducing the width of the upper frame of the display panel; the occupied area of ​​the edge areas on both sides of the driving circuit area is reduced, and space is saved for setting the gate driving circuit or VSS wiring, thereby reducing the width of the frame on both sides of the display panel; the technical problem that the lower side of the existing display panel is too wide is solved.

[0087] In summary, although the present application has been disclosed as above by way of embodiments, the serial numbers before the embodiments, such as "first", "second", etc., are only used for convenience of description and do not limit the order of the embodiments of the present application. Moreover, the above embodiments are not intended to limit the present application, and a person of ordinary skill in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be subject to the scope defined by the claims.

Claims

1. A display panel, comprising a driving circuit area, a fan-out area for setting fan-out wiring, and a display light-emitting area set on the driving circuit area, characterized in that: The area of ​​the driving circuit area is smaller than the area of ​​the display light emitting area, and the display light emitting area completely covers the driving circuit area and exceeds the driving circuit area; The driving circuit area includes a plurality of driving units, the display light-emitting area includes a plurality of display units, each of the driving units is electrically connected to a corresponding display unit, and the area of ​​the driving unit is smaller than the area of ​​the display unit; The driving circuit area includes a middle area and an edge area arranged on at least one side of the middle area, and the distance between the driving units located in the middle area is greater than the distance between the driving units located in the edge area; Each of the driving units includes a driving thin film transistor, and the driving thin film transistor includes a source / drain electrode and a planar layer arranged on the source / drain electrode; Each of the display units comprises an anode disposed on the planar layer and a pixel definition layer disposed on the anode and having an opening, wherein the anode is connected to the source / drain via a source / drain wiring; There is a boundary line between the edge area and the middle area; In the edge region and the display light-emitting area corresponding to the edge region, the length of the source / drain wiring is longer from a side close to the boundary line to a side far from the boundary line.

2. The display panel according to claim 1, characterized in that: The display light-emitting area covers at least a portion of the fan-out area; the edge area includes a lower edge area located below the middle area; and the distance between the driving units located in the middle area is greater than the distance between the driving units located in the lower edge area.

3. The display panel according to claim 2, characterized in that: The display light-emitting area includes a first display light-emitting area corresponding to the lower edge area, a second display area corresponding to the middle area, and a third display light-emitting area corresponding to the fan-out area. At least part of the driving units in the lower edge area are electrically connected to the display units of the third display light-emitting area.

4. The display panel according to claim 3, characterized in that: In the lower edge region, the lower edge region has a first edge, the first edge coincides with the boundary line, and the first edge is located at a side of the lower edge region close to the middle region; In the driving unit in the lower edge region and the display unit electrically connected to the driving unit in the lower edge region, the source / drain of the driving unit is staggered toward a side close to the first edge relative to the anode.

5. The display panel according to claim 4, characterized in that: In the lower edge region, from a side close to the first edge to a side far from the first edge, a greater distance that the source / drain of the driving unit is offset relative to the anode toward a side close to the first edge.

6. The display panel according to claim 1, characterized in that: The source / drain wiring is arranged in the same layer as the source / drain and is connected to the source / drain.

7. The display panel according to claim 1, characterized in that: The source / drain wiring is arranged in a different layer from the source / drain, one end of the source / drain wiring is electrically connected to the source / drain, and the other end of the source / drain wiring is electrically connected to the anode.

8. The display panel according to claim 2, characterized in that: The fan-out area is located at one side of the lower edge area, wherein the fan-out area includes a first portion covered by the display light-emitting area and a second portion arranged outside the display light-emitting area.

9. The display panel according to any one of claims 1 to 8, characterized in that: The edge region further includes two side edge regions arranged on two sides of the middle region, and the distance between the driving units located in the middle region is greater than the distance between the driving units located in the two side edge regions.

10. The display panel according to any one of claims 1 to 8, characterized in that: The edge region includes an upper edge region disposed above the middle region, and a distance between the driving units located in the middle region is greater than a distance between the driving units located in the upper edge region.

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