Differentially Flat System Design Method for Buck Converter Based on Extended State Observer

Abstract

The present invention discloses a differential flat system design method for staggered parallel Buck converter based on extended state observer, converts the DC system into a differential flat system with a double closed-loop structure through coordinate transformation, performs error feedback control on the differential term in the flat system, and observes and compensates the load current in the outer loop through the extended state observer ESO, thereby suppressing the impact of load side fluctuation on the system, wherein the differential flat system with double closed-loop structure includes a current inner loop differential flat system and a voltage outer loop differential flat system. The present invention improves the system stability and dynamic characteristics, and significantly improves the system stability and ability to resist internal and external disturbances while ensuring current sharing of each phase.

Description

Technical Field

[0001] The invention belongs to the technical field of converters, and in particular relates to a differential flat system design method of an interleaved parallel Buck converter based on an extended state observer. Background Art

[0002] With the development of new energy technology and power electronics technology, DC microgrids that integrate distributed energy, energy storage equipment, loads and converter modules have received widespread attention. [1-2] Compared with AC microgrids, DC microgrids do not require conversion when supplying power to power electronic loads, and there are no reactive power and phase issues, which fundamentally improves power supply reliability. Figure 1 The figure shows the structure of a DC microgrid, in which distributed energy is connected to the DC bus through corresponding converters, energy storage equipment is connected to the bus through a bidirectional converter, and the load includes a resistive load directly connected to the bus and a constant power load (CPL) indirectly connected to the bus through a converter. As CPL is connected to the DC microgrid in large numbers, the negative impedance characteristics of CPL will cause the bus voltage to oscillate, and the stable operation of the bus voltage will be affected.

[0003] The steady-state control of CPL connected to DC microgrid mainly includes passive damping and active damping. Among them, adding passive damping devices in the converter improves the system damping, but this method brings additional system losses. The active damping method adds virtual damping to the controller instead of passive devices. Although it improves the stability of the constant power system, this method of controlling the output impedance through active damping will reduce the dynamic characteristics of the system.

[0004] At present, domestic and foreign scholars' research on CPL systems mainly focuses on steady-state performance and the stable range of closed-loop control parameters, and there is little research on the dynamic performance of CPL systems. Compared with linear control, nonlinear control has more advantages in the transient performance of DC microgrids after external shocks. Among them, differential flatness based control (DFBC) has gradually been widely used in converters due to its advantages such as simple control implementation, fast flat output, and accurate following of reference trajectory. In the literature Li Gang, Li Shuwei, Qiu Wei. Research on the control method of Boost PFC with constant power load [J]. Electric Drive, 2021, 51(15): 31-38, a differential flatness system was established for the boost circuit with constant power output, and it was proved that the system under DFBC has good stability, but the single-loop control limits the dynamic performance of the system.Literature Mungporn P, Sikkabut S, Yodwong B, et al. Photovoltaic power control based on differential flatness approach of multiphase interleaved boost converter for grid connected applications [C] / / International Conference on Clean Electrical Power. IEEE, 2015 The dual-loop structure of DFBC combined with maximum power point tracking control is adopted to improve the stability of the system while enhancing its robustness; Literature Xu Liangcai, Huangfu Yigeng, Li Qian, et al. Research on robust control of high gain DC-DC converter for fuel cell based on differential flatness theory [J]. Proceedings of the CSEE, 2020, 40(21): 6828-6839 (in Chinese) The nonlinear disturbance observer was introduced into the differential flat control to suppress the external disturbances of input voltage and output current. However, the above two documents only considered the case of resistive load and did not consider the control effect when the system was equipped with CPL. Summary of the invention

[0005] The purpose of the present invention is to provide a differential flat system design method for an interleaved parallel Buck converter based on an extended state observer. The designed differential flat system significantly improves the stability of the differential flat control system and the ability to resist internal and external disturbances while ensuring current sharing in each phase.

[0006] The technical solution adopted by the present invention is that the staggered parallel Buck converter adopts a differential flat system design method based on an extended state observer, converts the DC system into a differential flat system with a double closed-loop structure through coordinate transformation, and performs error feedback control on the differential term in the flat system, and observes and compensates the load current in the outer loop through an extended state observer ESO, thereby suppressing the impact of load side fluctuations on the system, wherein the differential flat system with a double closed-loop structure includes a current inner loop differential flat system and a voltage outer loop differential flat system, and specifically includes the following steps:

[0007] Step 1: Model the DC microgrid control system and obtain the system state equation;

[0008] Step 2: The current inner loop differential flat system ensures that the inductor current of each branch follows the current reference value and calculates the error feedback term in the inner loop control law;

[0009] Step 3: The voltage outer loop differential flat system keeps the bus voltage output constant and calculates the error feedback term in the outer loop control law;

[0010] Step 4: According to the error feedback term in the inner loop control law and the error feedback term in the outer loop control law, the control parameters of the current inner loop differential flat system and the voltage outer loop differential flat system are selected;

[0011] Step 5: Design the extended state observer, analyze the error of the extended state observer, calculate the gains of the extended state observer, and the design is completed.

[0012] The present invention is also characterized in that:

[0013] Step 1 is as follows:

[0014] Distributed energy is used as the power source, and the DC bus is controlled by a DC-DC converter. The CPL and the resistive load are simultaneously connected to the DC microgrid. The DC-DC converter is an interleaved parallel Buck converter. The interleaved parallel Buck converter adopts an interleaved control technology. The two branch switches S1 and S2 in the interleaved parallel Buck converter are turned on 180° alternately. A DC microgrid control system model is constructed. The state equation of the DC microgrid control system is:

[0015]

[0016] In formula (1), E and v o are input voltage and bus voltage respectively; i L1 、i L2 are the currents flowing through the energy storage inductors L1 and L2 in the interleaved parallel Buck converter; R L , P CPL are resistance load and constant power load respectively; i o is the load current,

[0017] Step 2 is as follows:

[0018] In order to realize the current sharing control of the interleaved parallel Buck converter, the inductor current reference value is determined as

[0019] i Lref =I L1 =I L2 (2)

[0020] In formula (2), IL1 ,I L2 i L1 、i L2 The steady-state quantity of

[0021] The control goal of the current inner loop is to ensure that the inductor current of each branch follows the current reference value, so the inductor current is assumed to be the flat output of the current loop y c To further simplify the calculation, the inductor current is selected as the state variable x c , the control object of the current loop is the switch duty cycle d1, d2, so the duty cycle is selected as the input quantity u c ,but

[0022]

[0023] In formula (3), γ1 is x c About y c Smooth mapping function of ;

[0024] Substituting equation (3) into equation (1), we get the current control law:

[0025]

[0026] According to equations (3) and (4), the selected variable x c ,y c and u c The flatness requirement is met, so the current inner loop system is a differentially flat system;

[0027] when y c accurately follows the reference trajectory y cd When , the relationship between the error of the flat output and its reference trajectory is

[0028]

[0029] In formula (5), k1 and k2 are the inner loop controller parameters;

[0030] Define the current loop error as e c =y c -y cd , then formula (5) is simplified to

[0031]

[0032] After Laplace transformation of equation (6), the following expected characteristic equation p(s) is used for error feedback control. p(s) is expressed as

[0033]

[0034] Combining equation (6) and equation (7), we get

[0035]

[0036] In formula (8), ξ c is the damping ratio of the inner loop system, ω nc is the inner ring oscillation frequency;

[0037] Therefore, the error feedback term in the inner loop control law is expressed as

[0038]

[0039] Step 3 is as follows:

[0040] The control goal of the voltage outer loop is to keep the bus voltage output constant, so the bus voltage is selected as the flat output of the voltage loop. v To simplify the calculation, the output voltage is also selected as the input quantity x v , the control object of the voltage loop is the given value of the inner loop, so the inductor current reference value is selected as the control quantity u v ,but

[0041]

[0042] In formula (10), γ2 is x v About y v Smooth mapping function of ;

[0043] Substituting equation (10) into equation (1), we can get the voltage loop control law u v for

[0044]

[0045] From equations (10) and (11), we can see that the selected variable x v ,y v and u v The flatness requirement is met, so the voltage outer loop system is a differentially flat system;

[0046] In order to make y in formula (11) v Accurately follow the reference trajectory y vd , error feedback design is performed on its differential term, when y v Asymptotically tending to y vd When the error between the outer loop output and the expected value is as follows

[0047]

[0048] In formula (12), k3 and k4 are the parameters of the outer loop controller;

[0049] Assume the voltage outer loop error is e v =y v -yvd , k3 and k4 are configured by the expected characteristic equation, that is,

[0050]

[0051] From formula (13), we get

[0052]

[0053] In formula (14), ξ v and ω nv are the damping ratio and oscillation frequency of the outer loop system respectively, then the error feedback term in the outer loop control law is

[0054]

[0055] In step 4, to ensure the fastest response speed, select the current inner loop ξ c =0.707; To ensure the stability of the output voltage, select the voltage outer loop ξ v =1, and ω nc ,ω nv With the switching frequency f s , the working bandwidth of the switch tube ω s The following relationship is satisfied between

[0056] ω nv <<ω nc <<ω s =2πf s (16).

[0057] Step 5 is as follows:

[0058] Step 5.1: From equation (11), we can see that the i in flat control o It is easily affected by the load side, that is, the load side disturbance, so the extended state observer model is designed to compensate for the load disturbance and the obtained observation value is used for flat control;

[0059] Let x1 = i L1 , x2=i L2 , x3=v o , Substituting into formula (1) we get

[0060]

[0061] The designed ESO expression is

[0062]

[0063] In formula (18), the extended state observer gain matrix is ​​L = diag[l1 l2 l3 l4];

[0064] When the system is stable, there is The extended state observer model for the interleaved parallel Buck converter is expressed as

[0065]

[0066] In formula (19), z1, z2, z3, and z4 are the observed values ​​of x1, x2, x3, and x4, respectively;

[0067] And from formula (19), we can know the observed value of load current for

[0068]

[0069] Step 5.2: Subtract equation (19) from equation (20) to obtain the ESO error equation:

[0070]

[0071] Expressing equation (21) in matrix form, we get

[0072]

[0073] Based on formula (27), the closed-loop characteristic equation of the matrix A-LC is

[0074] D(s)=a4s 4 +a3s 3 +a2s 2 +a1s+a0=0 (23)

[0075] In the formula,

[0076]

[0077]

[0078] a3=l1+l2+l3+l4,a4=1;

[0079] From Lyapunov stability, we know that when the eigenvalues ​​of the matrix A-LC are all less than zero, the observer error converges and eventually tends to zero, and the size of its characteristic root determines the observer gain. As the characteristic root of the ESO error increases, the observer tracks the actual value faster. However, when the characteristic root is too large, the system will have saturation or noise side effects. Therefore, the pole configuration is used to control the observer response speed, that is,

[0080] det[λI-(A-LC)]=(s+ω0) 4 (twenty four)

[0081] Selecting the observer configuration bandwidth ω0 as 188495.6 rad / s and substituting ω0 into equations (23) and (24), we can obtain the gains of the extended state observer as l1=l2=132981, l3=104457, and l4=131982.

[0082] The beneficial effects of the present invention are:

[0083] The staggered parallel Buck converter of the present invention adopts a differential flat system design method based on an extended state observer, and aims to solve the problem that excessive CPL in a DC microgrid will reduce system stability. A dual-loop control strategy based on differential flat theory is adopted, and ESO is designed to observe the disturbance of the output current in the outer loop. Theoretical analysis and simulation results show that the dual-loop differential flat controller enables the system to have good current sharing characteristics in steady state and when subjected to transient shocks, thereby improving the system stability. The ESO is used to compensate for load-side fluctuations, thereby improving the dynamic characteristics of the system. Compared with traditional dual-loop PI control and single-loop differential flat control, the dual-loop DFBC strategy based on ESO significantly improves the system's anti-interference ability and transient response speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0084] Figure 1 It is a dual-loop control block diagram of the interleaved parallel Buck converter of the present invention;

[0085] Figure 2 It is a simplified structural diagram of a DC microgrid;

[0086] FIG3 is a bus voltage waveform diagram of different control strategies, wherein FIG3(a) is an overall bus voltage diagram, FIG3(b) is a local enlarged diagram during startup, and FIG3(c) is a local enlarged diagram during disturbance;

[0087] FIG4 is a bus voltage waveform diagram when the input voltage suddenly changes, wherein FIG4(a) is a bus voltage waveform diagram when the input voltage suddenly changes for the ESO-based dual-loop DFBC, and FIG4(b) is a bus voltage waveform diagram when the input voltage suddenly changes for the single-loop DFBC;

[0088] FIG5 is a bus voltage waveform diagram of a constant power load mutation, wherein FIG5(a) is a bus voltage waveform diagram of a constant power load mutation of a double-loop DFBC based on ESO, and FIG5(b) is a bus voltage waveform diagram of a constant power load mutation of a single-loop DFBC;

[0089] FIG6 is a bus voltage waveform diagram of a resistive load mutation, wherein FIG6(a) is a bus voltage waveform diagram of a resistive load mutation of a dual-loop DFBC based on ESO, and FIG6(b) is a bus voltage waveform diagram of a resistive load mutation of a single-loop DFBC;

[0090] Figure 7 This is the current sharing effect diagram when the system is running in steady state;

[0091] FIG8 is a current waveform diagram when the system is disturbed, wherein FIG8(a) is a current waveform diagram when the input voltage suddenly changes, and FIG8(b) is a current waveform diagram when the load suddenly changes. DETAILED DESCRIPTION

[0092] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0093] Differential flat control essentially converts a nonlinear system into a linear system. Assume that there is a nonlinear system whose mathematical model can be expressed as

[0094]

[0095] And we can find a set of flat quantities y and their finite differentials, which can linearly represent x and u, that is,

[0096]

[0097] Then the system is called a differentially flat system. In formula (26), x∈R m , u∈R n , y∈R n , m, n are positive integers, m≥n.

[0098] Differential flat control mainly includes two parts: error feedback design and feedforward design. The feedforward part is to obtain the inverse dynamic equation of the system based on the mathematical model to obtain the reference trajectory; the error feedback is to determine the derivative term of the flat output by the linear feedback method to ensure that it quickly follows the reference trajectory.

[0099] The invention discloses a differential flat system design method for an interleaved parallel Buck converter based on an extended state observer. Figure 1 As shown, the DC system is transformed into a differential flat system with a double closed-loop structure through coordinate transformation, and the differential term in the flat system is subjected to error feedback control, and the load current in the outer loop is observed and compensated by the extended state observer ESO, thereby suppressing the impact of load side fluctuations on the system, wherein the differential flat system with a double closed-loop structure includes a current inner loop differential flat system and a voltage outer loop differential flat system, and specifically includes the following steps:

[0100] Step 1: Model the DC microgrid control system and obtain the system state equation;

[0101] like Figure 2As shown in the figure, distributed energy is used as the power source, and the DC bus is controlled by the DC-DC converter. The CPL and the resistive load are simultaneously connected to the DC microgrid. The DC-DC converter is an interleaved parallel Buck converter. The interleaved parallel Buck converter adopts the interleaved control technology. The two branch switches S1 and S2 in the interleaved parallel Buck converter are turned on 180° alternately. The DC microgrid control system model is constructed. The state equation of the DC microgrid control system is:

[0102]

[0103] In formula (1), E and v o are input voltage and bus voltage respectively; i L1 、i L2 are the currents flowing through the energy storage inductors L1 and L2 in the interleaved parallel Buck converter; R L , P CPL are resistance load and constant power load respectively; i o is the load current,

[0104] Step 2: The current inner loop differential flat system ensures that the inductor current of each branch follows the current reference value and calculates the error feedback term in the inner loop control law;

[0105] In order to realize the current sharing control of the interleaved parallel Buck converter, the inductor current reference value is determined as

[0106] i Lref =I L1 =I L2 (2)

[0107] In formula (2), I L1 ,I L2 i L1 、i L2 The steady-state quantity of

[0108] The control goal of the current inner loop is to ensure that the inductor current of each branch follows the current reference value, so the inductor current is assumed to be the flat output of the current loop y c To further simplify the calculation, the inductor current is selected as the state variable x c , the control object of the current loop is the switch duty cycle d1, d2, so the duty cycle is selected as the input quantity u c ,but

[0109]

[0110] In formula (3), γ1 is x c About y c Smooth mapping function of ;

[0111] Substituting equation (3) into equation (1), we get the current control law:

[0112]

[0113] According to equations (3) and (4), the selected variable x c ,y c and u c The flatness requirement of equation (26) is satisfied, so the current inner loop system is a differentially flat system;

[0114] When the system is disturbed by internal and external interference, the inductor current will inevitably be disturbed. Therefore, the inner loop steady-state error must be reduced as much as possible. c Accurately follow the reference trajectory y cd When , the relationship between the error of the flat output and its reference trajectory is

[0115]

[0116] In formula (5), k1 and k2 are the inner loop controller parameters;

[0117] Define the current loop error as e c =y c -y cd , then formula (5) is simplified to

[0118]

[0119] After Laplace transformation of equation (6), the following expected characteristic equation p(s) is used for error feedback control. p(s) is expressed as

[0120]

[0121] Combining equation (6) and equation (7), we get

[0122]

[0123] In formula (8), ξ c is the damping ratio of the inner loop system, ω nc is the inner ring oscillation frequency;

[0124] Therefore, the error feedback term in the inner loop control law is expressed as

[0125]

[0126] Step 3: The voltage outer loop differential flat system keeps the bus voltage output constant and calculates the error feedback term in the outer loop control law;

[0127] The control goal of the voltage outer loop is to keep the bus voltage output constant, so the bus voltage is selected as the flat output of the voltage loop.v To simplify the calculation, the output voltage is also selected as the input quantity x v , the control object of the voltage loop is the given value of the inner loop, so the inductor current reference value is selected as the control quantity u v ,but

[0128]

[0129] In formula (10), γ2 is x v About y v Smooth mapping function of ;

[0130] Substituting equation (10) into equation (1), we can get the voltage loop control law u v for

[0131]

[0132] From equations (10) and (11), we can see that the selected variable x v ,y v and u v The flatness requirement of equation (26) is satisfied, so the voltage outer loop system is a differentially flat system;

[0133] In order to make y in formula (11) v Accurately follow the reference trajectory y vd , error feedback design is performed on its differential term, when y v Asymptotically tending to y vd When the error between the outer loop output and the expected value is as follows

[0134]

[0135] In formula (12), k3 and k4 are the parameters of the outer loop controller;

[0136] Assume the voltage outer loop error is e v =y v -y vd , k3 and k4 are configured by the expected characteristic equation, that is,

[0137]

[0138] From formula (13), we get

[0139]

[0140] In formula (14), ξ v and ω nv are the damping ratio and oscillation frequency of the outer loop system respectively, then the error feedback term in the outer loop control law is

[0141]

[0142] Step 4: According to the error feedback term in the inner loop control law and the error feedback term in the outer loop control law, the control parameters of the current inner loop differential flat system and the voltage outer loop differential flat system are selected;

[0143] In step 4, the selection of control parameters damping ratio and oscillation frequency determines the dynamic characteristics of the controller system. Taking into account factors such as overshoot and adjustment time, the damping ratio of the second-order control system is generally selected between 0.4 and 0.8. To ensure the fastest response speed, the current inner loop ξ is selected. c =0.707; To ensure the stability of the output voltage, select the voltage outer loop ξ v =1, and ω nc ,ω nv With the switching frequency f s , the working bandwidth of the switch tube ω s The following relationship is satisfied between

[0144] ω nv <<ω nc <<ω s =2πf s (16).

[0145] Step 5: Design the extended state observer, analyze the error of the extended state observer, calculate the gains of the extended state observer, and the design is completed.

[0146] Step 5.1: From equation (11), we can see that the i in flat control o It is easily affected by the load side, that is, the load side disturbance, so the extended state observer model is designed to compensate for the load disturbance and the obtained observation value is used for flat control;

[0147] Let x1 = i L1 , x2=i L2 , x3=v o , Substituting into formula (1) we get

[0148]

[0149] The designed ESO expression is

[0150]

[0151] In formula (18), the extended state observer gain matrix is ​​L = diag[l1 l2 l3 l4];

[0152] When the system is stable, there is The extended state observer model for the interleaved parallel Buck converter is expressed as

[0153]

[0154] In formula (19), z1, z2, z3, and z4 are the observed values ​​of x1, x2, x3, and x4, respectively;

[0155] And from formula (19), we can know the observed value of load current for

[0156]

[0157] Step 5.2: Subtract equation (19) from equation (20) to obtain the ESO error equation:

[0158]

[0159] Expressing equation (21) in matrix form, we get

[0160]

[0161] Based on formula (27), the closed-loop characteristic equation of the matrix A-LC is

[0162] D(s)=a4s 4 +a3s 3 +a2s 2 +a1s+a0=0 (23)

[0163] In the formula,

[0164]

[0165]

[0166] a3=l1+l2+l3+l4,a4=1;

[0167] From Lyapunov stability, we know that when the eigenvalues ​​of the matrix A-LC are all less than zero, the observer error converges and eventually tends to zero, and the size of its characteristic root determines the observer gain. As the characteristic root of the ESO error increases, the observer tracks the actual value faster. However, when the characteristic root is too large, the system will have saturation or noise side effects. Therefore, the pole configuration is used to control the observer response speed, that is,

[0168] det[λI-(A-LC)]=(s+ω0) 4 (twenty four)

[0169] Taking into account the stability and rapidity requirements of the observer tracking the real-time value, the observer configuration bandwidth ω0 is selected as 188495.6 rad / s. Substituting ω0 into equations (23) and (24), the gains of the extended state observer are obtained as l1=l2=132981, l3=104457, and l4=131982.

[0170] Simulation Verification

[0171] (I) Simulation of different control strategies

[0172] The ESO-based dual-loop DFBC parallel Buck converter system structure model designed by the present invention was built in the PSIM simulation software, and the simulation results were compared with the traditional single-loop differential flat control results. The circuit parameters are: E = 50V, P CPL =12.5W, R L =1Ω,V ref =24V, f s =100kHz, L1=L2=150μH, C=100μF, the controller parameters are shown in Table 1. The traditional single-loop differential flat control parameters are consistent with the voltage outer loop parameters.

[0173] Table 1 Controller parameters

[0174]

[0175] Under the condition of the same converter bandwidth, the dual-loop DFBC strategy based on ESO is simulated and compared with the traditional dual-loop PI control and single-loop DFBC strategy. Figure 3(a) shows the output voltage waveforms under the three control strategies, and Figure 3(b) and Figure 3(c) are the local enlarged views at startup and disturbance respectively. At 0.005s, the bus voltage reference value V ref From 24V to 30V, Table 2 shows the performance parameters under the three control strategies. Among them, σ1 and σ2 are V ref Overshoot before and after the mutation; t1 and t2 are V ref Adjustment time before and after mutation; ΔV o V ref Steady-state output voltage ripple before mutation.

[0176] Table 2 Performance parameters under three control strategies

[0177]

[0178]

[0179] From the analysis of Figures 3(a)-(b) and Table 2, it can be seen that compared with the other two control strategies, the ESO-based dual-loop DFBC strategy of the present invention has significantly reduced overshoot, shortened the adjustment transition process time, and effectively suppressed the output voltage ripple.

[0180] (II) Simulation of different disturbances

[0181] When the input voltage of the converter changes suddenly, it will affect the bus voltage stability of the system, so the role of the controller in suppressing external disturbances is very important. The following is a simulation analysis of different disturbances.

[0182] The output voltage steady-state value of the staggered parallel Buck converter is set to 24V. At 0.01s, the input voltage suddenly increases from 50V to 70V, and at 0.02s, it suddenly drops from 70V to 50V. When the input voltage suddenly changes, the output voltage waveform based on the dual-loop DFBC strategy of ESO is shown in Figure 4(a), and the single-loop DFBC effect is shown in Figure 4(b). Analysis of Figure 4 shows that compared with the single-loop DFBC strategy, the overshoot of the bus voltage under the dual-loop DFBC strategy based on ESO is reduced to 0.008%, and the ability to suppress input voltage disturbances is stronger.

[0183] When the CPL on the load side increases to a certain value, the resistive load can be ignored. When the CPL in the system increases suddenly, it is easy to cause the output voltage to oscillate and lead to instability. Therefore, the controller's ability to adjust the CPL mutation is simulated and verified below.

[0184] The output voltage steady-state value of the staggered parallel Buck converter is set to 24V. At 0.04s, CPL increases from 12.5W to 112.5W, and at 0.05s, it increases from 112.5W to 212.5W. When CPL suddenly changes, the output voltage waveform based on the dual-loop DFBC effect of ESO is shown in Figure 5(a), and the single-loop DFBC effect is shown in Figure 5(b). Analysis of Figure 5 shows that the output voltage under the single-loop DFBC is at P L After the sudden increase, the bus voltage of the dual-loop DFBC strategy based on ESO is oscillating. L After the sudden increase, it always remains at 24 V. Therefore, the control strategy proposed in this paper has a wider CPL stable range, smaller overshoot, and shorter recovery time.

[0185] Changes in resistive load will also cause fluctuations in the output voltage. Therefore, the controller's ability to regulate sudden changes in resistive load is simulated and verified below.

[0186] The output voltage steady-state value of the staggered parallel Buck converter is set to 24V, CPL is constant to 12.5W, and the resistance is 1Ω during stable operation. At 0.07s, the resistive load suddenly decreases from 1Ω to 0.8Ω, and at 0.08s, it suddenly increases from 0.8Ω to 1Ω; the average value of the output current suddenly increases from 24.44A to 30.46A at 0.07s, and suddenly decreases from 30.46A to 24.44A at 0.08s. When the resistive load suddenly changes, the output voltage waveform based on the dual-loop DFBC strategy of ESO is shown in Figure 6(a), and the single-loop DFBC effect is shown in Figure 6(b).

[0187] From the analysis of Figure 6, we can see that the traditional single-loop DFBC has an overshoot of 8.33% at 0.07s after being disturbed, and an overshoot of 8.15% at 0.08s; while the ESO-based dual-loop DFBC quickly returns to the expected value after an overshoot of 2.50% at 0.07s and 3.14% at 0.08s, effectively suppressing the impact of load-side disturbances on system response.

[0188] (III) System current sharing characteristics simulation

[0189] The circulation problem of the inductor current of each phase affects the stable operation of the interleaved parallel Buck converter. Therefore, the steady-state and dynamic current sharing characteristics of the system under the ESO-based dual-loop DFBC are simulated and verified below. Figure 7 This is the current sharing effect when the system is running in steady state. Figure 7 It can be seen that this control strategy can achieve steady-state current sharing, and the ripple of the inductor current is significantly reduced.

[0190] Figure 8 shows the dynamic current sharing effect when the system is disturbed, where Figure 8(a) shows the current waveform when the input voltage suddenly increases from 50V to 70V at 0.005s, and Figure 8(b) shows the current waveform when the resistive load suddenly decreases from 1Ω to 0.8Ω at 0.01s. Analysis of Figure 8 shows that when the system is disturbed internally and externally, the inductor current of each phase can quickly follow the new steady-state value, and has good dynamic current sharing characteristics.

[0191] From the above content, it can be seen that at present, the traditional differential flat control design idea of ​​the interleaved parallel Buck converter is to approximate the control variable at the equilibrium point, so that the multi-phase interleaved parallel Buck circuit can be equivalent to a single-phase Buck converter to solve its control law, that is, single closed-loop DFBC control. Since this control method ignores the high-frequency component, it can only suppress small-amplitude disturbances such as power supply and load, so its ability to suppress large-scale load disturbances is limited; the current of each phase is passively balanced, so it is difficult to ensure the current sharing effect of the interleaved parallel converter.

[0192] The ESO-based dual-loop DFBC designed by the staggered parallel Buck converter of the present invention based on the differential flat system design method of the extended state observer overcomes the defects of the above-mentioned single closed-loop DFBC control, and significantly improves the system's anti-interference ability and transient response speed while ensuring current equalization of each phase.

Claims

1. A differentially flat system design method for interleaved parallel Buck converter based on extended state observer, characterized in that: The DC system is transformed into a differential flat system with a double closed-loop structure through coordinate transformation, and the differential term in the flat system is subjected to error feedback control. The load current in the outer loop is observed and compensated by the extended state observer ESO, thereby suppressing the impact of load side fluctuations on the system. The differential flat system with a double closed-loop structure includes a current inner loop differential flat system and a voltage outer loop differential flat system, and specifically includes the following steps: Step 1: Model the DC microgrid control system and obtain the system state equation; Distributed energy is used as the power source, and the DC bus is controlled by a DC-DC converter. The CPL and the resistive load are simultaneously connected to the DC microgrid. The DC-DC converter is an interleaved parallel Buck converter. The interleaved parallel Buck converter adopts an interleaved control technology. The two branch switch tubes in the interleaved parallel Buck converter are connected to the DC microgrid. , The DC microgrid control system model is constructed by staggering 180° conduction. The state equation of the DC microgrid control system is: （1） In formula (1), E and are input voltage and bus voltage respectively; , They are respectively the current flowing through the energy storage inductor in the interleaved parallel Buck converter , The current; , They are resistive load and constant power load respectively; is the load current, ; Step 2: The current inner loop differential flat system ensures that the inductor current of each branch follows the current reference value and calculates the error feedback term in the inner loop control law; In order to realize the current sharing control of the interleaved parallel Buck converter, the inductor current reference value is determined as （2） In formula (2), , They are , The steady-state quantity of The control goal of the current inner loop is to ensure that the inductor current of each branch follows the current reference value, so the inductor current is assumed to be the flat output of the current loop. To further simplify the calculation, the inductor current is selected as the state variable , the control object of the current loop is the switch duty cycle , , so the duty cycle is selected as the input ,but （3） In formula (3), for about Smooth mapping function of ; Substituting equation (3) into equation (1), we get the current control law: （4） According to formulas (3) and (4), the selected variables , and The flatness requirement is met, so the current inner loop system is a differentially flat system; when Precisely follow the reference trajectory When , the relationship between the error of the flat output and its reference trajectory is （5） In formula (5), , are the inner loop controller parameters; The current loop error is defined as , then formula (5) is simplified to （6） After Laplace transformation of equation (6), the following expected characteristic equation is adopted: Perform error feedback control. Expressed as （7） Combining equation (6) and equation (7), we get （8） In formula (8), is the damping ratio of the inner loop system, is the inner ring oscillation frequency; Therefore, the error feedback term in the inner loop control law is expressed as （9）； Step 3: The voltage outer loop differential flat system keeps the bus voltage output constant and calculates the error feedback term in the outer loop control law; The control goal of the voltage outer loop is to keep the bus voltage output constant, so the bus voltage is selected as the flat output of the voltage loop. , select the output voltage as the input , the control object of the voltage loop is the given value of the inner loop, so the inductor current reference value is selected as the control quantity ,but （10） In formula (10), for about Smooth mapping function of ; Substituting equation (10) into equation (1), we can get the voltage loop control law: for （11） From formula (10) and formula (11), we can see that the selected variables , and The flatness requirement is met, so the voltage outer loop system is a differentially flat system; In order to make the Precisely follow the reference trajectory , the error feedback design is performed on its differential term. Gradual trend When the error between the outer loop output and the expected value is as follows （12） In formula (12), , is the outer loop controller parameter; Assume the voltage outer loop error is , , The configuration is done through the expected characteristic equation, namely （13） From formula (13), we get ， （14） In formula (14), and are the damping ratio and oscillation frequency of the outer loop system respectively, then the error feedback term in the outer loop control law is （15）； Step 4: According to the error feedback term in the inner loop control law and the error feedback term in the outer loop control law, the control parameters of the current inner loop differential flat system and the voltage outer loop differential flat system are selected; Step 5: Design the extended state observer, analyze the error of the extended state observer, calculate the gains of the extended state observer, and the design is completed.

2. The differential flat system design method of the interleaved parallel Buck converter based on the extended state observer according to claim 1 is characterized in that: In step 4, in order to ensure the fastest response speed, the current inner loop is selected ; To ensure the stability of the output voltage, select the voltage outer loop ,and, , With switching frequency , the working bandwidth of the switch tube The following relationship is satisfied between << << = （16）。 3. The differential flat system design method of the interleaved parallel Buck converter based on an extended state observer according to claim 1 is characterized in that: The step 5 is specifically as follows: Step 5.1: From equation (11), we can see that in flat control It is easily affected by the load side, that is, the load side disturbance, so the extended state observer model is designed to compensate for the load disturbance and the obtained observation value is used for flat control; make , , , , substituting into formula (1) we get （17） The designed ESO expression is （18） In formula (18), the gain matrix of the extended state observer is ; When the system is stable, there is , then the extended state observer model for the interleaved parallel Buck converter is expressed as （19） In formula (19), They are Observed value of And from formula (19), we can know the observed value of load current for （20）； Step 5.2: Subtract equation (19) from equation (20) to obtain the ESO error equation: （21） Expressing equation (21) in matrix form, we get （22） Based on formula (27), we know that the matrix A - LC The closed-loop characteristic equation is (23) In the formula, , , ， ， ； From Lyapunov stability, we know that when the matrix When the eigenvalues ​​of are all less than zero, the observer error converges and eventually tends to zero, and the size of its characteristic root determines the observer gain. As the characteristic root of the ESO error increases, the observer tracks the actual value faster. However, when the characteristic root is too large, the system will have saturation or noise side effects. Therefore, the pole configuration is used to control the observer response speed, that is, (24) Select observer configuration bandwidth is 188495.6rad / s, Substituting into equations (23) and (24), the gains of the extended state observer are obtained as 132981, 104457, 131982.

Images