An eVTOL aircraft simulation verification method, device, electronic equipment and storage medium

Abstract

The present application discloses an eVTOL aircraft simulation verification method, device, electronic device and storage medium; the method includes: if the model to be verified does not meet the pre-set exit conditions, then detecting the verification stage of the model to be verified in the current time period; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual flight test verification stage; according to the verification stage of the model to be verified in the current time period, obtaining the simulation verification model corresponding to the verification stage; based on the simulation verification model corresponding to the verification stage, performing simulation verification on the model to be verified; repeating the above operations until the model to be verified meets the exit conditions. The embodiment of the present application needs to adopt multiple rounds of simulation verification, and through multiple rounds of iterations, continuously improve the design to achieve verification and function confirmation at each stage.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of industrial control technology, and in particular to an eVTOL aircraft simulation verification method, device, electronic device, and storage medium. Background Art

[0002] Generally, various compliance methods are required to prove compliance with requirements in the process of developing new aircraft and obtaining airworthiness certificates. At the same time, it is also necessary to continuously iterate and verify the design during the design and development process. Due to the new aircraft characteristics and high-level safety requirements of eVTOL, its design verification iteration must be more comprehensive to achieve the prescribed safety assurance level throughout the aircraft development process. Engineering simulation verification is unanimously recognized as one of the effective means to prove compliance, which can reduce both flight test risks and verification costs.

[0003] Aircraft engineering simulation verification and testing will play an increasingly important role in the development of modern aircraft. The simulation test content will cover all possible flight subjects and the entire flight envelope, fully verify the flight control law, the flight quality within the entire envelope, and enable the flight control software to fully operate, so that problems can be discovered and solved early on the ground, and the pilot can fully experience a major feature of aircraft system design and use. Based on this, the Engineering Flight Simulator (EFS) was born. It is unanimously recognized as one of the effective means of proving compliance, which can reduce both flight test risks and verification costs. In the traditional aircraft development process, the integration verification and confirmation of the simulator is usually on the right side of the traditional system engineering V model. The result is that the system is integrated in the physical test stage, the iteration cycle is long, and the optimization and improvement cost is high after problems are found in the later stage. For example, if the control law or human-machine layout needs to be changed during the simulator flight verification process, in addition to redesign, the hardware reprocessing and modification and repeated verification will cost a lot of manpower, material resources and financial resources, which seriously hinders the progress of aircraft development. Summary of the invention

[0004] The present application provides an eVTOL aircraft simulation verification method, device, electronic device and storage medium, which require multiple rounds of simulation verification, and through multiple rounds of iterations, continuously improve the design to achieve verification and function confirmation at each stage.

[0005] In a first aspect, an embodiment of the present application provides an eVTOL aircraft simulation verification method, the method comprising:

[0006] If the model to be verified does not meet the preset exit condition, then the verification stage of the model to be verified in the current period is detected; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage;

[0007] According to the verification stage of the model to be verified in the current period, obtaining a simulation verification model corresponding to the verification stage;

[0008] Based on the simulation verification model corresponding to the verification stage, the model to be verified is simulated and verified; and the above operations are repeatedly performed until the model to be verified meets the exit condition.

[0009] In a second aspect, the embodiment of the present application further provides an eVTOL aircraft simulation verification device, the device comprising: a detection module, an acquisition module and a verification module; wherein:

[0010] The detection module is used to detect the verification stage of the model to be verified in the current period if the model to be verified does not meet the preset exit condition; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage;

[0011] The acquisition module is used to acquire the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period;

[0012] The verification module is used to perform simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage; and repeatedly perform the above operations until the model to be verified meets the exit condition.

[0013] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0014] one or more processors;

[0015] a memory for storing one or more programs,

[0016] When the one or more programs are executed by the one or more processors, the one or more processors implement the eVTOL aircraft simulation verification method described in any embodiment of the present application.

[0017] In a fourth aspect, an embodiment of the present application provides a storage medium on which a computer program is stored. When the program is executed by a processor, the eVTOL aircraft simulation verification method described in any embodiment of the present application is implemented.

[0018] The embodiment of the present application proposes an eVTOL aircraft simulation verification method, device, electronic device and storage medium. If the model to be verified does not meet the pre-set exit conditions, first detect the verification stage of the model to be verified in the current period; then obtain the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period; then simulate and verify the model to be verified based on the simulation verification model corresponding to the verification stage; repeat the above operations until the model to be verified meets the exit conditions. That is to say, in the technical solution of the present application, the verification stage can be divided into: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual flight test verification stage; different models are used to simulate and verify the aircraft in different verification stages, so that problems in any link can be discovered and solved in time. In the traditional aircraft R&D process, the system is integrated in the physical test stage, the iteration cycle is long, and the optimization and improvement costs are high after problems are discovered in the later stage. Therefore, compared with the prior art, the eVTOL aircraft simulation verification method, device, electronic device and storage medium proposed in the embodiments of the present application require multiple rounds of simulation verification, and through multiple rounds of iterations, the design is continuously improved to achieve verification and function confirmation at each stage; and the technical solution of the embodiments of the present application is simple and convenient to implement, easy to popularize, and has a wider scope of application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A first flow chart of the eVTOL aircraft simulation verification method provided in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the stages of a simulator for an eVTOL aircraft provided in an embodiment of the present application;

[0021] Figure 3 A schematic diagram of the structure of the desktop simulator integrated verification V model provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structure of a multi-round verification V model of an eVTOL aircraft provided in an embodiment of the present application;

[0023] Figure 5 A second flow chart of the eVTOL aircraft simulation verification method provided in an embodiment of the present application;

[0024] Figure 6 A schematic diagram of the structure of an eVTOL aircraft simulation verification device provided in an embodiment of the present application;

[0025] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0026] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only the parts related to the present application, rather than all structures, are shown in the accompanying drawings.

[0027] Embodiment 1

[0028] Figure 1 This is a first flow chart of the eVTOL aircraft simulation verification method provided by the embodiment of the present application. The method can be executed by an eVTOL aircraft simulation verification device or electronic device. The device or electronic device can be implemented by software and / or hardware. The device or electronic device can be integrated in any smart device with network communication function. Figure 1 As shown, the eVTOL aircraft simulation verification method may include the following steps:

[0029] S101. If the model to be verified does not meet the preset exit conditions, the verification stage of the model to be verified in the current period is detected; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage.

[0030] In this step, if the model to be verified does not meet the pre-set exit conditions, the electronic equipment can detect the verification stage of the model to be verified in the current period; wherein, the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage. As a new aircraft, the design of eVTOL aircraft will introduce many new concepts and technologies, including an aircraft appearance with an unconventional aerodynamic layout, a cockpit design concept that reduces professional knowledge and training requirements, an urban operation scenario different from traditional aviation, a novel flight control system and other new systems with varying degrees of automation and autonomy. At the same time, because the operating environment of the eVTOL aircraft includes densely populated downtown areas and lower airspace environments, its safety redundancy requirements are very high (consistent with traditional civil aviation transport aircraft, with a safety index of 10 -9 ), while the safety index of traditional commercial aircraft is only 10 -7, the extensive use of advanced technologies (such as distributed electric propulsion, fly-by-wire flight control, and simplified cockpit design) and high-safety airworthiness index requirements have put forward higher requirements for the research and development and design of eVTOL aircraft. Since eVTOL aircraft adopts a new design concept, neither the domestic nor the international mainstream civil aviation authorities have issued appropriate airworthiness regulations for this type of aircraft. Therefore, the certification of domestic manned eVTOL aircraft is based on the "Normal Aircraft Airworthiness Regulations" or defines the certification basis of eVTOL aircraft by formulating different proprietary conditions based on the principle of equivalent safety. Generally, various compliance methods are required to prove its compliance with requirements in the process of developing and obtaining airworthiness certificates for new models, and it is also necessary to continuously iterate and verify the design during the design and development process. Due to the new aircraft characteristics of eVTOL (such as highly integrated and intelligent flight control systems and cockpit display designs) and high-level safety requirements, its design verification iteration must be more comprehensive to achieve the specified safety margin throughout the aircraft development process. Engineering simulation verification is unanimously recognized as one of the effective means to prove compliance, which can reduce both flight test risks and verification costs.

[0031] Figure 2 A schematic diagram of the stages of the simulator of the eVTOL aircraft provided in the embodiment of the present application. Figure 2 As shown, Figure 2 The realization forms of simulators at different stages in the development of eVTOL aircraft are given, from the initial desktop simulator (DTS) to the continuously iterative full engineering simulator (EFS-2) and the final training equipment. The following is a detailed description of the process of each stage.

[0032] 1. Desktop Simulator (DTS) Verification Phase: The main function of the desktop simulator of the eVTOL aircraft is to conduct preliminary research on aircraft flight dynamics characteristics, display system performance, etc. through rapid prototyping in the early stages of aircraft design, and to assist designers in discovering and improving design defects as early as possible. This corresponds to the first two V processes of the "5V" model. Figure 3 This is a schematic diagram of the structure of the desktop simulator integrated verification V model provided in the embodiment of the present application. Figure 3As shown, this stage can also be divided into two sub-stages: sub-model development and verification stage and sub-model integration and verification stage. a) Sub-model development and verification stage: After the initial aircraft requirements are basically determined, the system definition stage is entered. The main work of this stage is to learn from the relevant experience of previous models, and combine the specifications and protocols of other related aspects (for example, the specifications and protocols of the appearance layout, propulsion device, aerodynamics, aircraft structure, electronic system, etc.), as well as various specifications of the system's own sub-systems (for example, safety requirements, computers, sensors, display systems, etc.), and develop each sub-model separately according to the requirements of these protocols and verify the single system. b) Sub-model integration and verification stage: When the model is repeatedly verified to a certain stage, the aircraft configuration design can be temporarily frozen, and the integration of different sub-models can be carried out, that is, the development of the desktop simulator (DTS). The simulation verification models of various sub-systems involved in the development of eVTOL aircraft may involve different development tools. At this time, co-simulation is required. Since the Modelica language supports the FMI standard protocol, the simulation models of different tools can be imported into the Modelica or Simulink main platform for comprehensive integration verification by exporting FMU. The desktop simulator in the embodiment of the present application may include: flight control system model, aircraft dynamics model, atmosphere model, electric propulsion model, etc., and a set of human-in-the-loop simulation verification platform can be formed with a simple hardware joystick handle, which meets the model acceptance from demand to simulation, and realizes the preliminary verification of the eVTOL aircraft based on the SVO concept and simple instrument display human-machine function analysis verification through rapid prototyping technology. Its technical highlight lies in the integration of multi-source heterogeneous models, that is, co-simulation forms a full closed-loop verification from demand-architecture-flight system simulation verification-result feedback to demand.

[0033] 2. Verification model library stage: After completing the basic desktop simulator verification, the verified model library (DemoKit) not only has all the functions of DTS, but also adds a scenario control unit, namely Scenario Generator, which is used to set up scenarios and trigger faults, making it convenient for verification personnel to conduct comprehensive testing; at the same time, it replaces the previous simple visual system, upgrades all necessary elements of flight scene demonstration, and provides a more realistic simulation environment. After the new aircraft project is launched, the eVTOL verification model library Demo Kit described in this application focuses on system design, full-loop simulation of aircraft, and other programs for verifying and testing aircraft logic and equipment specifications. This process stage is in the upper part of the third V model, mainly composed of a simulation host, a visual host, and a desktop display. If VR is added, a VR flight experience can be performed.

[0034] 3. Virtual Iron Bird (VIB) Verification Phase: In the traditional aircraft development process, various physical tests such as "iron bird tests" are generally used to conduct system integration and whole-machine control performance verification during the design verification phase. Similar to traditional engineering simulators, they are costly, and once design iterations occur, the entire aircraft development process will be slowed down. The preset development cycle requirements for eVTOL aircraft are generally shorter than those for traditional aircraft, so the concept of virtual iron bird (VIB) was born. Unlike desktop simulators that focus on flight dynamics and initial verification of the display and control interface based on SVO, it mainly focuses on virtual testing of mechatronics (electronic control and mechanical simulation). Since it inherits the previously verified model library, the integrated testing requirements at this stage are higher than those of desktop simulators, corresponding to the third and fourth Vs of the "5V" model. The right side of the middle part. It should be noted that the virtual iron bird (VIB) phase of the verification process described in this application cannot completely replace the role of the traditional iron bird. The biggest help should be to reduce the design iterations of the real iron bird. In addition, since the model granularity of the virtual iron bird electronic control system is higher than that of the desktop simulator, its model set supports control system reverification as a whole-machine-level controlled object. The maturity of the model-in-the-loop (Model in the Loop), software-in-the-loop (Software in the Loop) and hardware-in-the-loop (Hardware in the Loop) simulations used for controller development is also better, laying the foundation for the next stage of semi-physical real cockpit testing.

[0035] 4. Semi-physical cockpit verification phase (EFS-1 phase): This phase is equivalent to some traditional engineering simulators, corresponding to the upper right section of the fourth V process of the "5V" model. The previous whole machine model will generally generate the corresponding code, compile it into an EXE file and connect the corresponding hardware equipment to run. Of course, the hardware equipment of the cockpit can be replaced at will (depending on the degree of perfection of the airworthy aircraft configuration), with great compatibility. The cockpit is generally called "Aircraft-1". In the middle of aircraft development, the semi-physical cockpit plays a huge role. Through it, the SVO concept is truly verified in the loop, and the cockpit layout and instrument display and other human engineering are confirmed; at the same time, the dynamic matching relationship between the systems is tested. Due to the flexibility of the simulator configuration, in order to achieve satisfactory test results, the verification time on it often exceeds hundreds of hours or even thousands of hours. This phase basically solves all possible problems before the iron bird test. Of course, there will still be situations where the aircraft configuration is not fully confirmed at this stage. As long as the manufacturer's aircraft configuration or future configuration plan is followed, the configuration / configuration management of EFS is completed iteratively.

[0036] Since there are many uncertainties in the initial development stage of eVTOL aircraft, the functional iteration process of EFS must be much faster than that of training simulators. Maximizing the rapid configuration conversion of EFS (such as the increase and decrease of I / O channels) in aircraft development is also an important part of improving the efficiency of EFS use. Reusable structures and simple software configuration change solutions are the prerequisites for the efficient use of EFS. In the second half of this stage, with the continuous deepening and rapid iteration of tests, the training data package of this type of aircraft has taken shape. Through continuous engineering simulation verification and human-machine interface optimization, the simulation hardware is constantly replaced by aviation materials (such as virtual simulation models are replaced by real airborne flight control computers, etc.), and then a quasi-data package for training is formed. At this time, a nearly realistic environment is available for system integration and testing, which can truly verify the correctness and compatibility of the interfaces between system or subsystem components (such as avionics systems); verify whether the functions and technical performance of the entire system meet the detailed specification requirements; and expose the final potential hardware or software failure mode mechanism. Considering the constraints of MOC8's extreme maneuverability on engineers and all engineering equipment / cable harnesses, the EFS described in the present invention will not have a motion system.

[0037] 5. EFS-2 and virtual flight test stage: This stage corresponds to the upper section on the right side of the fifth V process of the "5V" model. Before this process, the essence of each system component is truly reflected through physical tests on the iron bird table (since the present invention focuses on describing the 5V model in the development process of eVTOL, the traditional real iron bird is not involved separately, and its verification stage is between the semi-physical cockpit and the virtual flight test). Then, the system is simply corrected and improved, and a semi-physical cockpit (EFS-2) is added to achieve overall integration from cockpit control to rotor and even rudder surface (end-to-end control). Then, the first virtual flight test can be carried out. This flight test is a rehearsal before the test pilot's real flight test, and the problems that the pilot may encounter in the real first flight can be presented as much as possible. That is to say, in the later stage of aircraft development, EFS-2+iron bird can be used to carry out conventional, safe and faulty tests without having to face the risks of real flight conditions, providing a theoretical reference for complex aircraft flight tests. Finally, through multiple virtual test flights in the engineering simulator, the test pilot has a complete understanding of the various performances of the aircraft. The data from the virtual test flight process is also stored to provide flight data support for the data improvement of the engineering simulator. After the first flight of the real aircraft, an initial comparison is performed. After that, continuous flight tests are necessary. It is also the final stage of verifying the performance of the system. The test flight results are also the most authoritative, and the data of the engineering simulator is constantly improved. As the aircraft flies in various subjects within the flight envelope, all the real data of the system is gradually obtained. Through these data, the various systems of the flight simulation equipment are repeatedly improved and corrected (multiple iterations), and the corresponding high-level data packets are sorted out, which can be applied to secondary development. At this time, the engineering simulator can be used as a prototype of the training simulator to play a greater role in training pilots.

[0038] The engineering simulation equipment and training equipment involved in the embodiments of the present application do not contain a motion system. For training equipment, due to the flight environment conditions of the eVTOL aircraft (low altitude and low speed) and the adoption of the SVO-based design concept (safe and easy to operate), there are fewer sudden changes in aircraft overload during actual flight, and the flight state is stable in most flight phases. The requirements for the motion system are very low, and a flight training device (FTD) can be used to meet future training needs.

[0039] S102. According to the verification stage of the model to be verified in the current period, obtain a simulation verification model corresponding to the verification stage.

[0040] In this step, the electronic device can obtain the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current time period. Specifically, when the model to be verified is in the desktop simulator verification stage in the current time period, the electronic device can obtain the simulation verification model corresponding to the desktop simulator verification stage; when the model to be verified is in the verification model library stage in the current time period, the electronic device can obtain the simulation verification model corresponding to the verification model library stage; when the model to be verified is in the virtual iron bird verification stage in the current time period, the electronic device can obtain the simulation verification model corresponding to the virtual iron bird verification stage; when the model to be verified is in the semi-physical cockpit verification stage in the current time period, the electronic device can obtain the simulation verification model corresponding to the semi-physical cockpit verification stage; when the model to be verified is in the virtual flight test verification stage in the current time period, the electronic device can obtain the simulation verification model corresponding to the virtual flight test verification stage.

[0041] S103, based on the simulation verification model corresponding to the verification stage, perform simulation verification on the model to be verified; repeat the above operation until the model to be verified meets the exit condition.

[0042] In this step, the electronic device can simulate and verify the model to be verified based on the simulation verification model corresponding to the verification stage; repeat the above operation until the model to be verified meets the exit condition. Specifically, when the electronic device simulates and verifies the model to be verified based on the simulation verification model corresponding to the current sub-stage, the following operation steps can be adopted: if the verification stage includes N sub-stages, the electronic device can first take one of the N sub-stages as the current sub-stage in chronological order; wherein N is a natural number greater than 1; then extract the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage; then simulate and verify the model to be verified based on the simulation verification model corresponding to the current sub-stage; repeat the above operation until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage.

[0043] Further, when the electronic device extracts the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage, the following operation steps may be adopted: when the verification stage includes two sub-stages, if the current sub-stage is the first sub-stage, the electronic device may extract the system-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, the electronic device may extract the aircraft-level simulation verification model from the simulation verification model corresponding to the verification stage. Optionally, when the verification stage includes three sub-stages, if the current sub-stage is the first sub-stage, the electronic device may extract the component-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, the electronic device may extract the system-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the third sub-stage, the electronic device may extract the aircraft-level simulation verification model from the simulation verification model corresponding to the verification stage.

[0044] Figure 4 This is a schematic diagram of the structure of the V model for multi-round verification of an eVTOL aircraft provided in an embodiment of the present application. Figure 4As shown, considering the new features of eVTOL aircraft: 1. Iteration acceleration and design for confirmation, the verifiability and confirmability of the design should be considered at the beginning of the design; 2. Development and confirmation of the same system, model and tool: focus on the development of verification equipment, and advanced verification equipment and development tools will be able to realize the visualization of system growth. 3. Same state, full environment verification to ensure the correctness and effectiveness of verification. Subsystem-level verification must have complete experimental test instruments and means. Parameters of all links must be fully collected in place. 4. Active application of simulation prototype technology, increase the intensity of mathematical simulation, and ensure that problems found in the mathematical simulation (model) stage are not left in the ground comprehensive experiment, and problems that can be solved in the ground comprehensive experiment are not left in the air test. 5. Establish a standardized knowledge base and a standard verification environment to improve the rapid modification of system design to meet customer needs. 6. Adopt new development and verification methods to solve the contradiction between complex systems and costs. Taking the above factors into consideration, and in order to improve the problems existing in the verification and confirmation process of traditional simulators, after summarizing the development experience of the world's advanced civil aircraft manufacturers, combined with the characteristics of eVTOL aircraft and based on the latest model-based system engineering theory, this application proposes a new development verification process, which intends to adopt multiple rounds of simulation verification, that is, multiple V model verifications are carried out at different stages of aircraft development, to achieve verification while developing, and strive to expose design defects at the front end. Through multiple rounds of iterations, the design is continuously improved, and simulators of different types and functionalities are derived to achieve verification and confirmation functions at each stage. It can greatly reduce the various risks of the previous traditional V model (right end) verification. In addition to proposing the 5V verification process in the development process of eVTOL aircraft, this application also puts forward some new suggestions for the accuracy requirements and training outlines of eVTOL aircraft training equipment. For example, the training equipment does not require motion systems and control loads, and the training subjects should increase low-altitude flight and vertical take-off and landing training.

[0045] According to the definition in the standard, the training equipment subsystem uses four fidelity levels: None, Generic, Representative and Specific, and determines the minimum fidelity level required for each simulation feature for each training task. In addition to defining the simulation accuracy, the entire simulation system is divided into three dimensions according to the following simulation features: Aircraft Simulation: flight cockpit layout and structure, flight model (aerodynamic characteristics and engine), ground operation, aircraft system, flight control device and control force; Cueing Simulation: sound prompts, visual prompts and motion prompts; Environment Simulation: Environment-Air Traffic Control, Environment-Navigation, Environment-Atmosphere and Weather, Environment-Airport and Terrain. Due to the different flight characteristics of eVTOL aircraft and existing fixed-wing helicopters, the content of their simulation characteristic dimensions will be different. For example, as mentioned earlier, for eVTOL aircraft training equipment, the motion system does not need to be installed, so there will be no motion cues; for example, from the perspective of aircraft simulation, since most eVTOL aircraft models adopt vertical take-off and landing and SVO-based control design concepts, ground operations and flight control forces are almost unnecessary, but more complex flight dynamics simulations of the transition state from vertical take-off and landing to forward flight are required; from the perspective of environmental simulation, since eVTOL aircraft fly closer to the ground (flight altitude is lower), the terrain simulation accuracy requirements will be higher, and the airport simulation requirements will also become vertical take-off and landing airports suitable for vertical take-off and landing. This application gives the simulation accuracy requirements for each element in the simulation training equipment (FTD) based on the operating characteristics of the eVTOL aircraft and combined with its own years of experience in the field of training simulation:

[0046]

[0047]

[0048]

[0049] Table 1

[0050] The eVTOL aircraft simulation verification method proposed in the embodiment of the present application, if the model to be verified does not meet the pre-set exit conditions, first detect the verification stage of the model to be verified in the current period; then obtain the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period; then perform simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage; repeat the above operations until the model to be verified meets the exit conditions. That is to say, in the technical solution of the present application, the verification stage can be divided into: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual flight test verification stage; different models are used to simulate and verify the aircraft in different verification stages, so that problems in any link can be discovered and solved in time. In the traditional aircraft R&D process, the system is integrated in the physical test stage, the iteration cycle is long, and after problems are discovered in the later stage, the optimization and improvement costs are high. Therefore, compared with the prior art, the eVTOL aircraft simulation verification method proposed in the embodiment of the present application requires multiple rounds of simulation verification, and through multiple rounds of iterations, the design is continuously improved to achieve verification and function confirmation at each stage; and the technical solution of the embodiment of the present application is simple and convenient to implement, easy to popularize, and has a wider scope of application.

[0051] Embodiment 2

[0052] Figure 5 1 is a second flow chart of the eVTOL aircraft simulation verification method provided in the embodiment of the present application. Based on the above technical solution, it is further optimized and expanded, and can be combined with the above optional implementation methods. Figure 5 As shown, the eVTOL aircraft simulation verification method may include the following steps:

[0053] S501. If the model to be verified does not meet the preset exit conditions, the verification stage of the model to be verified in the current period is detected; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage.

[0054] S502. According to the verification stage of the model to be verified in the current period, obtain a simulation verification model corresponding to the verification stage.

[0055] S503: If the verification phase includes N sub-phases, one of the N sub-phases is used as the current sub-phase in chronological order; wherein N is a natural number greater than 1.

[0056] S504 , extracting the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage.

[0057] In a specific embodiment of the present application, when the verification stage includes two sub-stages, if the current sub-stage is the first sub-stage, the electronic device can extract the system-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, the electronic device can extract the aircraft-level simulation verification model from the simulation verification model corresponding to the verification stage. Optionally, when the verification stage includes three sub-stages, if the current sub-stage is the first sub-stage, the electronic device can extract the component-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, the electronic device can extract the system-level simulation verification model from the simulation verification model corresponding to the verification stage; if the current sub-stage is the third sub-stage, the electronic device can extract the aircraft-level simulation verification model from the simulation verification model corresponding to the verification stage. In addition, the desktop simulator verification stage in the embodiment of the present application includes: a development verification stage and an integration verification stage; wherein, the simulation verification model corresponding to the development verification stage is a system-level simulation verification model; the system-level simulation verification model includes at least one of the following protocol specifications: appearance layout, propulsion device, aerodynamics, aircraft structure, electronic system; the simulation verification model corresponding to the integration verification stage is an aircraft-level simulation verification model; the aircraft-level simulation verification model includes at least one of the following sub-models: flight control system model, aircraft dynamics model, atmosphere model, electric propulsion model.

[0058] S505. Based on the simulation verification model corresponding to the current sub-stage, perform simulation verification on the model to be verified; repeat the above operations until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage; repeat the above operations until the model to be verified meets the exit conditions.

[0059] In this step, the electronic device can simulate and verify the model to be verified based on the simulation verification model corresponding to the verification stage; repeat the above operation until the model to be verified meets the exit condition. Specifically, when the electronic device simulates and verifies the model to be verified based on the simulation verification model corresponding to the current sub-stage, the following operation steps can be adopted: if the verification stage includes N sub-stages, the electronic device can first take one of the N sub-stages as the current sub-stage in chronological order; wherein N is a natural number greater than 1; then extract the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage; then simulate and verify the model to be verified based on the simulation verification model corresponding to the current sub-stage; repeat the above operation until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage.

[0060] The eVTOL aircraft simulation verification method proposed in the embodiment of the present application, if the model to be verified does not meet the pre-set exit conditions, first detect the verification stage of the model to be verified in the current period; then obtain the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period; then perform simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage; repeat the above operations until the model to be verified meets the exit conditions. That is to say, in the technical solution of the present application, the verification stage can be divided into: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual flight test verification stage; different models are used to simulate and verify the aircraft in different verification stages, so that problems in any link can be discovered and solved in time. In the traditional aircraft R&D process, the system is integrated in the physical test stage, the iteration cycle is long, and after problems are discovered in the later stage, the optimization and improvement costs are high. Therefore, compared with the prior art, the eVTOL aircraft simulation verification method proposed in the embodiment of the present application requires multiple rounds of simulation verification, and through multiple rounds of iterations, the design is continuously improved to achieve verification and function confirmation at each stage; and the technical solution of the embodiment of the present application is simple and convenient to implement, easy to popularize, and has a wider scope of application.

[0061] Embodiment 3

[0062] Figure 6 This is a schematic diagram of the structure of the eVTOL aircraft simulation verification device provided in the embodiment of the present application. Figure 6 As shown, the eVTOL aircraft simulation verification device includes: a detection module 601, an acquisition module 602 and a verification module 603; wherein,

[0063] The detection module 601 is used to detect the verification stage of the model to be verified in the current period if the model to be verified does not meet the preset exit condition; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage;

[0064] The acquisition module 602 is used to acquire a simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period;

[0065] The verification module 603 is used to perform simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage; and repeatedly perform the above operations until the model to be verified meets the exit condition.

[0066] Furthermore, the verification module 603 is specifically used to, if the verification stage includes N sub-stages, take one of the N sub-stages as the current sub-stage in chronological order; wherein N is a natural number greater than 1; extract the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage; perform simulation verification on the model to be verified based on the simulation verification model corresponding to the current sub-stage; and repeat the above operations until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage.

[0067] Furthermore, the desktop simulator verification stage includes: a development verification stage and an integration verification stage; wherein, the simulation verification model corresponding to the development verification stage is a system-level simulation verification model; the system-level simulation verification model includes at least one of the following protocol specifications: appearance layout, propulsion device, aerodynamics, aircraft structure, electronic system; the simulation verification model corresponding to the integration verification stage is an aircraft-level simulation verification model; the aircraft-level simulation verification model includes at least one of the following sub-models: flight control system model, aircraft dynamics model, atmosphere model, electric propulsion model.

[0068] The above-mentioned eVTOL aircraft simulation verification device can execute the method provided in any embodiment of the present application, and has the corresponding functional modules and beneficial effects of the execution method. For technical details not fully described in this embodiment, please refer to the eVTOL aircraft simulation verification method provided in any embodiment of the present application.

[0069] Embodiment 4

[0070] Figure 7 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 7 A block diagram of an exemplary electronic device suitable for implementing the embodiments of the present application is shown. Figure 7 The electronic device 12 shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0071] like Figure 7 As shown, the electronic device 12 is in the form of a general purpose computing device. The components of the electronic device 12 may include, but are not limited to: one or more processors or processing units 16, a system memory 28, and a bus 18 that connects various system components (including the system memory 28 and the processing unit 16).

[0072] Bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or a local bus using any of a variety of bus architectures. By way of example, these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.

[0073] The electronic device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the electronic device 12, including volatile and non-volatile media, removable and non-removable media.

[0074] The system memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. The electronic device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 34 may be used to read and write non-removable, non-volatile magnetic media ( Figure 7 not shown, usually called a "hard drive"). Although Figure 7 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk"), and an optical drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, a DVD-ROM, or other optical medium) may be provided. In these cases, each drive may be connected to the bus 18 via one or more data medium interfaces. The memory 28 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of the various embodiments of the present application.

[0075] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in the memory 28, such program modules 42 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules 42 generally perform the functions and / or methods of the embodiments described herein.

[0076] The electronic device 12 may also communicate with one or more external devices 14 (e.g., keyboards, pointing devices, displays 24, etc.), may communicate with one or more devices that enable a user to interact with the electronic device 12, and / or may communicate with any device that enables the electronic device 12 to communicate with one or more other computing devices (e.g., a network card, a modem, etc.). Such communication may be performed via an input / output (I / O) interface 22. Furthermore, the electronic device 12 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 20. As shown, the network adapter 20 communicates with other modules of the electronic device 12 via the bus 18. It should be understood that although Figure 7 Not shown, other hardware and / or software modules may be used in conjunction with the electronic device 12, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0077] The processing unit 16 executes various functional applications and data processing by running the programs stored in the system memory 28, such as implementing the eVTOL aircraft simulation verification method provided in the embodiment of the present application.

[0078] Embodiment 5

[0079] The embodiment of the present application also provides a computer storage medium.

[0080] The computer-readable storage medium of the embodiment of the present application can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, - but not limited to - a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive lists) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, a device or a device or used in combination with it.

[0081] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0082] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0083] Computer program code for performing the operation of the present application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., using an Internet service provider to connect through the Internet).

[0084] Note that the above are only preferred embodiments of the present application and the technical principles used. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present application. Therefore, although the present application is described in more detail through the above embodiments, the present application is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.

Claims

1. An eVTOL aircraft simulation verification method, characterized in that: The method comprises: If the model to be verified does not meet the preset exit conditions, the verification stage of the model to be verified in the current period is detected; wherein, the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage; wherein, the desktop simulator verification stage includes: development verification stage and integration verification stage; wherein, the simulation verification model corresponding to the development verification stage is a system-level simulation verification model; the system-level simulation verification model includes at least one of the following protocol specifications: shape layout, propulsion device, aerodynamics, aircraft structure, electronic system; the simulation verification model corresponding to the integration verification stage is an aircraft-level simulation verification model; the aircraft-level simulation verification model includes at least one of the following sub-models: flight control system model, aircraft dynamics model, atmosphere model, electric propulsion model; verification model library stage: after completing the basic desktop simulator verification, the verified model library Demo Kit not only has all the functions of DTS, but also adds a scenario control unit, i.e. Scenario Generator, which is used to set up scenarios and trigger faults; the eVTOL verification model library Demo Kit includes system design, aircraft full-loop simulation and other programs for verifying and testing aircraft logic and equipment specifications. This process stage consists of a simulation host, a visual host and a desktop display; According to the verification stage of the model to be verified in the current period, obtaining a simulation verification model corresponding to the verification stage; Based on the simulation verification model corresponding to the verification stage, the model to be verified is simulated and verified; and the above operations are repeatedly performed until the model to be verified meets the exit condition.

2. The method according to claim 1, characterized in that The step of performing simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage includes: If the verification phase includes N sub-phases, one of the N sub-phases is used as the current sub-phase in chronological order; wherein N is a natural number greater than 1; Extracting the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage; Based on the simulation verification model corresponding to the current sub-stage, the model to be verified is simulated and verified; and the above operation is repeated until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage.

3. The method according to claim 2, characterized in that Extracting the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage includes: When the verification stage includes two sub-stages, if the current sub-stage is the first sub-stage, a system-level simulation verification model is extracted from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, an aircraft-level simulation verification model is extracted from the simulation verification model corresponding to the verification stage.

4. The method according to claim 2, characterized in that: Extracting the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage includes: When the verification stage includes three sub-stages, if the current sub-stage is the first sub-stage, the component-level simulation verification model is extracted from the simulation verification model corresponding to the verification stage; if the current sub-stage is the second sub-stage, the system-level simulation verification model is extracted from the simulation verification model corresponding to the verification stage; if the current sub-stage is the third sub-stage, the aircraft-level simulation verification model is extracted from the simulation verification model corresponding to the verification stage.

5. An eVTOL aircraft simulation verification device, characterized in that: The device comprises: a detection module, an acquisition module and a verification module; wherein, The detection module is used to detect the verification stage of the model to be verified in the current period if the model to be verified does not meet the preset exit conditions; wherein the verification stage includes one of the following: desktop simulator verification stage, verification model library stage, virtual iron bird verification stage, semi-physical cockpit verification stage, virtual test flight verification stage; wherein the desktop simulator verification stage includes: development verification stage and integration verification stage; wherein the simulation verification model corresponding to the development verification stage is a system-level simulation verification model; the system-level simulation verification model includes at least one of the following protocol specifications: shape layout, propulsion device, aerodynamics, aircraft structure, electronic system; the simulation verification model corresponding to the integration verification stage is an aircraft-level simulation verification model; the aircraft-level simulation verification model includes at least one of the following sub-models: flight control system model, aircraft dynamics model, atmosphere model, electric propulsion model; verification model library stage: after completing the basic desktop simulator verification, the verified model library Demo Kit not only has all the functions of DTS, but also adds a scenario control unit, i.e. Scenario Generator, which is used to set up scenarios and trigger faults; the eVTOL verification model library Demo Kit includes system design, aircraft full-loop simulation and other programs for verifying and testing aircraft logic and equipment specifications. This process stage consists of a simulation host, a visual host and a desktop display; The acquisition module is used to acquire the simulation verification model corresponding to the verification stage according to the verification stage of the model to be verified in the current period; The verification module is used to perform simulation verification on the model to be verified based on the simulation verification model corresponding to the verification stage; and repeatedly perform the above operations until the model to be verified meets the exit condition.

6. The device according to claim 5, characterized in that The verification module is specifically used for, if the verification stage includes N sub-stages, taking one of the N sub-stages as the current sub-stage in chronological order; wherein N is a natural number greater than 1; extracting the simulation verification model corresponding to the current sub-stage from the simulation verification model corresponding to the verification stage; simulating and verifying the model to be verified based on the simulation verification model corresponding to the current sub-stage; and repeating the above operations until the simulation verification of the model to be verified is completed based on the simulation verification models corresponding to each sub-stage.

7. An electronic device, characterized in that: include: one or more processors; a memory for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the eVTOL aircraft simulation verification method according to any one of claims 1 to 4.

8. A storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the eVTOL aircraft simulation verification method according to any one of claims 1 to 4 is implemented.

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