A circuit global routing method based on fast maze routing

Abstract

The present invention discloses a circuit global routing method based on fast maze routing, comprising the following steps: routing network construction: first, the routing network constructs a congestion-driven, through-hole-aware Steiner topology structure tree according to the result of routing area congestion estimation and executes segment movement technology. After the tree topology structure is decomposed into a two-pin network, L-type and Z-type mode routing are applied to generate an initial solution; a network-level bidirectional maze routing search is used to route multiple networks simultaneously. When the overflow exceeds 80% of the result of the previous iteration after this iteration, the number of parallel routing is reduced by half. When the number of routing is less than four, dynamic bidirectional maze routing scheduling is performed until the routing result cannot converge and then the layer allocation operation is performed to generate a global routing solution. The present invention can improve the overall routing efficiency, thereby realizing the entire physical design cycle; improve the concurrency upper limit on easy-to-route circuits, and increase the parallelism on difficult-to-route circuits.

Description

Technical Field

[0001] The invention belongs to the technical field of circuit wiring, and in particular relates to a circuit global wiring method based on fast maze routing. Background Art

[0002] Physical design is the most time-consuming stage in the integrated circuit design process, and it is also one of the most critical and most concerned research areas in computer-aided design technology. In the physical design process, one of the most critical steps is routing. Due to the increase in communication requirements, the concentration of routing requirements, and the limited routing resources, modern VLSI design is prone to congestion problems. In addition, the rapid growth of circuit size has put forward strict requirements on the performance of routing algorithms. In order to solve such a complex problem, the routing problem is usually divided into two stages: global routing stage and detailed routing stage. Global routing works on abstract slices. It globally allocates routing requirements in the circuit area and guides subsequent detailed routing to complete track allocation and via creation. With the improvement of the integration of integrated circuit design, the complexity of global routing is getting higher and higher, resulting in routing taking up a lot of running time, and maze routing is the running bottleneck in the entire routing process.

[0003] Existing routing acceleration algorithms mainly focus on parallel heuristic routing algorithms, which have unsatisfactory routing speed performance. For example, the bounded-length maze routing algorithm is integrated into the multi-threaded collision-aware global router. Due to the failure to update the routing cost in time during the routing process and the limitation of the routing area, the algorithm significantly reduces the routing quality; for example, the algorithm that combines fine-grained and network-level parallelism will lead to reduced convergence effect as the concurrency increases, and the acceleration effect will be worse on the more complex circuit benchmarks. There are currently two main problems in global routing acceleration: one is the false concurrency caused by high concurrency on easy-to-route circuits, and the other is the low concurrency on difficult-to-route circuits. Summary of the invention

[0004] In order to solve the above problems, the present invention proposes a circuit global routing method based on fast maze routing to improve the overall routing efficiency, thereby realizing the entire physical design cycle; improve the concurrency upper limit on easy-to-route circuits and increase the parallelism on difficult-to-route circuits.

[0005] To achieve the above object, the technical solution adopted by the present invention is: a circuit global wiring method based on fast maze routing, comprising the steps of:

[0006] Obtaining an initial wiring solution based on the wiring network;

[0007] A network-level bidirectional maze routing search is used to route multiple networks simultaneously to determine whether the overflow has decreased. If it has decreased, the search is returned to continue. If it has not decreased, dynamic bidirectional maze routing scheduling is performed. After dynamic bidirectional maze routing scheduling, it is determined whether the overflow has decreased. If it has decreased, the scheduling is returned to continue. If it has not decreased, layer allocation operations are performed to generate a global routing solution.

[0008] Furthermore, the routing network constructs a congestion-driven, via-aware Steiner topology structure tree based on the results of routing area congestion estimation and performs segment movement technology. After the tree topology is decomposed into two-pin networks, L-type and Z-type pattern routing are applied to generate the initial solution.

[0009] Furthermore, a network-level bidirectional maze routing search is used to route multiple networks simultaneously to determine overflow. When the overflow exceeds eighty percent of the result of the previous iteration after this iteration, the number of parallel routings is reduced by half. When the number of routings is less than four, dynamic bidirectional maze routing scheduling is performed until the routing results cannot converge, and then layer allocation operations are performed to generate a global routing solution.

[0010] Furthermore, the dynamic bidirectional maze wiring scheduling comprises the steps of:

[0011] In each iteration, an ordered set of networks is generated according to the order of the inputs;

[0012] When the number of iterations is a multiple of 3, the networks will be sorted from most to least congested;

[0013] Multiple threads continuously take out networks from the network pool and execute the wiring process of tearing the network and rerouting; when a thread searches for the path of the corresponding network, it obtains the modification permission for the global wiring resources, and then modifies the global wiring resources, and then notifies other threads of the modified global resources and releases the lock, updates the new path of the corresponding network, and then continues to take out the network from the network pool for wiring; when a thread is notified that the global resources are modified, it queries the modified wiring area for conflicts with the path it has already routed. If there is no conflict, it continues to wire. If there is a conflict, it resolves the conflict before continuing to wire.

[0014] Furthermore, the thread conflict resolution method includes:

[0015] Each routed network sets a priority queue Q pq To store unfilled elements, and a pop queue Q pop To store the order of popped elements;

[0016] When the auxiliary thread receives the affected element set S passed by the main thread aff When it does, it will look up the set of affected elements Q from the pop queue pop ∩Saff ; If the collection is empty, it is not affected by the main thread network; otherwise, find the pop The element in the set that is popped out first; if the pop-up order of the elements is k, this means that Q pop The first k elements of are not affected; in this case, Q is retained. pop The first k elements of , clear Q pq , traverse the surrounding elements of k elements and add the elements that do not belong to Q pop Elements to Q pq In the process, the update is completed after the traversal is completed.

[0017] The beneficial effects of adopting this technical solution are:

[0018] The present invention combines dynamic bidirectional scheduling with bidirectional search; bidirectional search is multi-source and multi-target maze wiring that searches from the starting point and the end point at the same time; parallel wiring is performed using a dynamic bidirectional scheduling algorithm; dynamic scheduling includes thread scheduling, global wiring resource update, and resolution of conflicts between different networks. Thread scheduling and updating of global wiring resources are competitive, and a thread that completes wiring of a network will lock and update the wiring resources, and notify other threads of the global resource location modified by itself. During thread wiring, the wiring resources are notified to be modified, and the conflict with the searched path is checked, the affected path is deleted, and the wiring is continued according to the intermediate information queue retained in the wiring back to the unaffected state. The present invention can significantly improve the speed of global wiring, and the wiring quality loss is almost zero, improve the concurrency upper limit on easy-to-wire circuits, and increase the parallelism on difficult-to-wire circuits; global wiring is an important component of the entire computer chip-aided design software (EDA), thereby reducing the chip design cycle in physical design. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic flow chart of a circuit global wiring method based on fast maze routing of the present invention;

[0020] Figure 2 A schematic diagram of dynamic bidirectional wiring scheduling in an embodiment of the present invention;

[0021] Figure 3 A schematic diagram of a path for unidirectional search in dynamic bidirectional routing scheduling in an embodiment of the present invention;

[0022] Figure 4 A schematic diagram of a bidirectional search path in dynamic bidirectional routing scheduling in an embodiment of the present invention;

[0023] Figure 5 A schematic diagram of a path retained under a unidirectional search in dynamic bidirectional routing scheduling in an embodiment of the present invention;

[0024] Figure 6The diagram is a schematic diagram of paths reserved in a bidirectional search in dynamic bidirectional routing scheduling in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described below with reference to the accompanying drawings.

[0026] In this embodiment, see Figure 1 As shown, the present invention proposes a circuit global wiring method based on fast maze routing, comprising the steps of:

[0027] Obtaining an initial routing solution based on a routing network; constructing a congestion-driven, via-aware Steiner topology structure tree based on the routing area congestion estimation result and performing segment movement technology, and applying L-type and Z-type pattern routing to generate an initial solution after the tree topology structure is decomposed into a two-pin network;

[0028] A network-level bidirectional maze routing search is used to route multiple networks simultaneously, and overflow is determined. When the overflow exceeds 80% of the result of the previous iteration after this iteration, the number of parallel routings is reduced by half. When the number of routings is less than four, dynamic bidirectional maze routing scheduling is performed until the routing results cannot converge, and layer allocation operations are performed to generate a global routing solution. The dynamic bidirectional maze routing scheduling includes the steps of:

[0029] In each iteration, an ordered set of networks is generated according to the order of the inputs;

[0030] When the number of iterations is a multiple of 3, the networks will be sorted from most to least congested;

[0031] Multiple threads continuously take out networks from the network pool and execute the wiring process of tearing the network and rerouting; when a thread searches for the path of the corresponding network, it obtains the modification permission for the global wiring resources, and then modifies the global wiring resources, and then notifies other threads of the modified global resources and releases the lock, updates the new path of the corresponding network, and then continues to take out the network from the network pool for wiring; when a thread is notified that the global resources are modified, it queries the modified wiring area for conflicts with the path it has already routed. If there is no conflict, it continues to wire. If there is a conflict, it resolves the conflict before continuing to wire.

[0032] The thread conflict resolution method includes:

[0033] Each routed network sets a priority queue Q pq To store unfilled elements, and a pop queue Q pop To store the order of popped elements;

[0034] When the auxiliary thread receives the affected element set S passed by the main threadaff When it does, it will look up the set of affected elements Q from the pop queue pop ∩S aff ; If the collection is empty, it is not affected by the main thread network; otherwise, find the pop The element in the set that is popped out first; if the pop-up order of the elements is k, this means that Q pop The first k elements of are not affected; in this case, Q is retained. pop The first k elements of , clear Q pq , traverse the surrounding elements of k elements and add the elements that do not belong to Q pop Elements to Q pq In the process, the update is completed after the traversal is completed.

[0035] When searching for bidirectional maze routing at the network level, at the initial stage of routing, there are many network paths with few conflicts between a large number of routing networks. By routing multiple networks simultaneously, when convergence deteriorates, the routing parallelism is reduced to reduce the amount of conflicts in the networks being routed simultaneously and continue routing until the parallelism is very low. At the same time, this paper combines bidirectional search with network-level parallelism, so that fewer networks are routed simultaneously under the same number of processors, thereby obtaining better convergence effects.

[0036] Dynamic bidirectional routing scheduling stage, this stage mainly uses dynamic scheduling algorithms to perform parallel routing, such as Figure 2 As shown in the figure, the black grid represents the congested area. The gray line in the left figure is the path from the start point to the end point. In the right figure, when the congested area changes, the black line is the newly generated path that is affected. When the previous path is congested, the router does not have to restart the entire search, but only improves the affected part; combining this algorithm with bidirectional search reduces the amount of conflict between routing networks, and reduces the routing search space by reusing existing valid paths during the routing process, such as Figure 3 and Figure 4 The paths in the two networks are generated by unidirectional search and bidirectional search respectively. Figure 5 and Figure 6 These are the paths that can be retained after the gray path is affected by the black path in one-way search and two-way search. It is obvious that the path retained in two-way search is longer.

[0037] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments. The above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A circuit global routing method based on fast maze routing, characterized in that: Includes steps: Obtaining an initial wiring solution based on the wiring network; Adopt network-level bidirectional maze routing search to route multiple networks simultaneously, and judge whether the overflow is reduced. If it is reduced, return to continue searching, otherwise perform dynamic bidirectional maze routing scheduling; after dynamic bidirectional maze routing scheduling, judge whether the overflow is reduced. If it is reduced, return to continue scheduling, otherwise perform layer allocation operation to generate a global routing solution; Adopt network-level bidirectional maze routing search to route multiple networks simultaneously and determine overflow. When overflow exceeds 80% of the result of the previous iteration after this iteration, reduce the number of parallel routing by half. When the number of routing is less than four, perform dynamic bidirectional maze routing scheduling until the routing result cannot converge, perform layer allocation operation, and generate a global routing solution. The dynamic bidirectional maze wiring scheduling comprises the steps of: In each iteration, an ordered set of networks is generated according to the order of the inputs; When the number of iterations is a multiple of 3, the networks will be sorted from most to least congested. Multiple threads continuously take out networks from the network pool and perform the wiring process of tearing the network and rerouting it; When a thread searches for the path of the corresponding network, it modifies the global routing resources by obtaining the modification permission for the global routing resources, then notifies other threads of the modified global resources and releases the lock, updates the new path of the corresponding network, and then continues to take out the network from the network pool for routing; when a thread is notified that the global resource has been modified, it checks whether the modified routing area conflicts with the path it has already routed. If there is no conflict, it continues routing. If there is a conflict, it resolves the conflict before continuing routing; The conflict resolution methods of the threads include: Each routed network sets a priority queue Q pq To store unfilled elements, and a pop queue Q pop To store the order of popped elements; When the auxiliary thread receives the affected element set S passed by the main thread aff When it does, it will look up the set of affected elements Q from the pop queue pop ∩S aff ; If the collection is empty, it is not affected by the main thread network; otherwise, find the pop The element in the set that is popped out first; if the pop-up order of the elements is k, this means that Q pop The first k elements of are not affected; in this case, Q is retained. pop The first k elements of , clear Q pq , traverse the surrounding elements of k elements and add the elements that do not belong to Q pop Elements to Q pq In the process, the update is completed after the traversal is completed.

2. A circuit global routing method based on fast maze routing according to claim 1, characterized in that: The routing network constructs a congestion-driven, via-aware Steiner topology structure tree based on the results of routing area congestion estimation and performs segment movement technology. After the tree topology structure is decomposed into two-pin networks, L-type and Z-type pattern routing are applied to generate the initial solution.

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