A method and device for simulating communication timing based on missile
Through missile -based communication timing simulation methods and devices, simulation missile faults and timing of equipment failure, solving the problem of timing of the missile internal hardware and hair control system software, which improves the reliability of the software and hardware of the hair control system.
Patent Information
- Application Number
- CN202211222291.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-10-08
- Publication Date
- 2025-01-24
- Estimated Expiration
- 2042-10-08
AI Technical Summary
The problem of disordered timing coordination between the internal hardware and the launch control system software of the missile has led to insufficient reliability of the software and hardware of the launch control system, making it difficult to discover and solve problems at the factory stage.
Adopt a missile -based communication timing simulation method and device. Through the initialization of simulators, constructing analog packets, sending analog packets and obtaining results, simulation fault timing, etc., the timing of the simulation missile and the fault on the equipment on the bomb equipment to ensure the hair loss Control the timing stability of the system.
By simulation methods, the execution timing of each hardware is simulated, and the reliability of the software and hardware of the hair control system can be improved. It can find and solve the problem of timing in the factory stage to ensure the normal operation of the missile.
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Figure CN115629559B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of ground-to-air missile weapon system and DSP, and in particular relates to a communication timing simulation method and device based on a missile. Background Art
[0002] The missile test system and launch control system are important components of the missile weapon system, and they work together with the command and control system to complete the missile's combat mission. The execution timing of the missile test system and the launch control system is particularly important. There are timing problems when the electronic devices in the missile execute software instructions. In order to ensure the stable and reliable execution timing of the launch control software and hardware, it is necessary to simulate the execution timing of each hardware through simulation methods and devices to ensure the reliability of the launch control system's software and hardware, so that problems can be discovered and solved at the factory stage. Summary of the invention
[0003] The purpose of this embodiment is to provide a method and device for simulating communication timing based on a missile, so as to solve the problem of timing coordination disorder between the internal hardware of the missile and the launch and control system software.
[0004] A missile-based communication timing simulation method, comprising:
[0005] Simulator initialization, including 422 interface chip initial value setting, missile carrier power-on self-test, DSP pin definition;
[0006] The DSP pin definitions include: switch S1: simulate missile working status failure, switch S2: simulate missile equipment failure, switch S3: simulate battery activation failure, switch S4: simulate engine ignition failure;
[0007] Constructing a simulated message, wherein the simulated message consists of a message header and a message body, and the message header includes a message type and a message body length;
[0008] After sending the simulation message to the missile carrier through the 422 interface, obtaining the completion result;
[0009] DSP reads the switch S3: simulates the battery activation fault state, and if the battery activation fault switch state is valid, performs battery fault simulation;
[0010] DSP reads the switch S4: simulates the engine ignition fault state, and if the engine ignition fault switch state is valid, executes the engine ignition fault simulation.
[0011] Furthermore, the simulated messages include simulated missile failure messages and simulated missile equipment failure messages.
[0012] Furthermore, DSP supports the 51 single-chip microcomputer series.
[0013] Furthermore, after the missile carrier performs the missile timing operation according to the simulation message, the corresponding state setting is completed according to the result of the timing interaction with the launch control system and sent to the DSP;
[0014] The missile timing includes a simulated missile failure timing and a simulated missile equipment failure timing.
[0015] Furthermore, the missile failure sequence was simulated, which were: servo normal, communication control equipment normal, inertial group normal, fuze normal, missile carrier normal, data recorder normal, and data recorder empty.
[0016] Furthermore, the failure sequence of the equipment on the missile was simulated, which were: the servo was normal, the communication control equipment was normal, the inertial group was normal, the fuze was normal, the missile-borne aircraft was normal, the data recorder was normal, and the data recorder was empty.
[0017] Further, complete the corresponding status settings, including,
[0018] If the S1: simulated missile working state fault switch is valid, the launch control combination and the guidance control combination communication are set to be normal and valid, the seeker self-check is set to be valid, and the zero position calculation is completed and set to be invalid;
[0019] If the S2: simulated missile equipment failure switch is valid, the launch control combination and the guidance control combination communication are set to be normal and valid, and the seeker self-check is set to be invalid.
[0020] The present invention also provides a missile-based communication timing simulation device, comprising:
[0021] The data recorder module is used to record the sequential interaction steps between the missile carrier and the launch control system to facilitate later fault finding;
[0022] The missile carrier module is used to execute the timing process of the launch control system and feed back the execution results to the DSP timing simulation module;
[0023] 422 interface module, used to establish a communication link between the missile carrier module and the DSP timing simulation module;
[0024] DSP timing simulation module is used to simulate fault timing messages, including missile fault simulation, onboard equipment fault simulation, battery activation fault simulation, and engine ignition fault simulation.
[0025] Furthermore, the DSP timing simulation module includes a missile fault simulation unit, an onboard equipment fault simulation unit, a battery activation fault simulation unit, and an engine ignition fault simulation unit.
[0026] Furthermore, the missile fault simulation unit, the missile equipment fault simulation unit, the battery activation fault simulation unit, and the engine ignition fault simulation unit are determined by the switch states of the switches S1-S4 corresponding to the DSP pins.
[0027] The present invention provides a missile-based communication timing simulation method and device, which simulates the execution timing of each hardware through a simulation method to ensure the software reliability of the launch and control system, and can discover and solve problems in the factory stage.
[0028] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0030] Figure 1 : A step diagram of the first embodiment of the missile-based communication timing simulation method provided in the embodiment of the present application.
[0031] Figure 2 : A step diagram of the second embodiment of the missile-based communication timing simulation method provided in the embodiment of the present application.
[0032] Figure 3 : A circuit schematic diagram of a missile-based communication timing simulation method provided in an embodiment of the present application.
[0033] Figure 4 : A device structure diagram of a missile-based communication timing simulation device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0034] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.
[0035] It should be noted here that in this implementation, Figure 3This is the circuit schematic diagram of the present invention. The main control uses a DSP chip. The main control can use a single-chip microcomputer to achieve the same function as the present invention. Here, DSP is used as an example but is not limited to using a single-chip microcomputer such as the 51 series. The main control programming language is implemented in C language. In order to improve the hardware response speed, the interrupt processing function is implemented in assembly language. The drive module in the figure is a TTL level drive, the isolation module is a photoelectric coupling chip series, the missile carrier consists of a missile flight control module composed of DSP and FPGA, and has a complete flight control system built in. The data recorder is used to record the missile carrier timing execution log.
[0036] The first embodiment steps are as follows: Figure 1 :
[0037] S1100: Simulator initialization, including setting the initial value of the 422 interface chip, power-on self-test of the missile carrier, and DSP pin definition, where pins DI1-DI4 are defined as inputs and DO1-DO4 are defined as outputs. In this implementation, the switch status of the peripheral S1-S4 is read according to the DI1-DI4 pins defined as inputs. The DO1-DO4 pin level is initialized to a high level, and DI1-DI4 is also initialized to a high level. The switch is a toggle switch, and the on-off state of the switch changes the level value of the DI1-DI4 pin. The DSP completes data reading by reading the value of the register corresponding to the DI1-DI4 pin. The above initialization operations are implemented in C language, and step S1200 is performed.
[0038] S1200: Read the external switch input value according to the status of DSP pins DI1-DI4, see Figure 3 , DSP pin input DI1-DI4 is read by DSP to obtain the switch input data from the register value corresponding to the pin. The read data is 8-bit byte data. The low bits 1-4 correspond to the level status of switches S1-S4. The read data is obtained through logical operation. The logical operation uses bitwise AND operation to obtain data 1, 2, 4, 8, which correspond to the switch status of switches S1, S2, S3, and S4 respectively. Simulate S1: simulate missile working state failure, S2: simulate missile equipment failure, S3: simulate battery activation failure, S4: simulate engine ignition failure. The switch value data is 1, which is determined to be a simulated missile failure sequence, and step S1300 is performed.
[0039] S1300: DSP constructs a missile fault simulation message, which consists of a message header and a message body. The message header includes a message type and a message body length. Here, the missile fault message type is coded as 0xef and is identified by one byte. Enter step S1400.
[0040] S1400: DSP sends the missile fault simulation message to the missile carrier through the 422 interface. The missile carrier receives the simulated missile fault message and performs missile fault sequence operation, including data bit operations such as the servo is normal, the communication control device is normal, the inertial group is normal, the fuze is normal, the missile carrier is normal, the data recorder is normal, and the data recorder is empty. The above-mentioned status data is marked by a byte of bit status, 1: marked as valid, 0: marked as invalid. The status bit operated in the current step includes the servo is set to 1 when it is normal, the communication control device is set to 1 when it is normal, the fuze is set to 1 when it is normal, the missile carrier is set to 1 when it is normal, the data recorder is set to 0 when it is normal, and the data recorder is 0 when it is empty. According to the above status bit operation and execution of the launch control system interaction, further, the launch control system return result is obtained. The return result includes received and failed. If the received instruction is returned, the S1500 step is performed.
[0041] S1500: The missile carrier sets the corresponding status according to the result of the timing interaction with the launch control system and sends it to the DSP. The status setting here includes setting the launch control combination and the guidance control combination communication to 1 normally, setting the guidance head self-check to 1, and setting the zero position calculation to 0. Further, the timing execution result is sent to the DSP to perform step S1600.
[0042] S1600: DSP obtains the execution result of the missile carrier. If the return is successful, DSP reads the switch S3: simulates the battery activation fault state. If the switch state is invalid, the timing simulation ends. If the switch state is valid, DSP reads the battery power supply state through the power supply detection pin, see Figure 3 DSP power supply detection pin part. Figure 3 The voltage difference between the DSP power supply detection pins in the DSP detects the battery status. If there is voltage, the DSP delays for 500ms and drives the relay K1 to work, and the contact K1-1 of the linkage relay K1 is closed to supply power to the missile carrier. The missile carrier responds to the battery power-on event and activates the timing operation between the missile carrier and the launch control system. The DSP receives the missile carrier battery activation completion message through the 422 interface and performs step S1700.
[0043] S1700: DSP reads S4: simulates the switch status of the engine ignition fault. If the switch status is invalid, the timing simulation ends. If the switch status is valid, DSP constructs an engine ignition fault message and sends it to the missile carrier. The missile carrier starts the engine ignition fault sequence and completes the timing interaction of the launch control system. Return to DSP to complete the timing simulation. After a delay of 100ms, DSP drives relay K2 to work, and the contact K2-1 of the linkage relay K2 is closed, completing the missile fault simulation.
[0044] The second embodiment steps are shown in Figure 2 :
[0045] S2100: Simulator initialization, including setting the initial value of the 422 interface chip, power-on self-test of the missile carrier, and DSP pin definition, where pins DI1-DI4 are defined as inputs and DO1-DO4 are defined as outputs. In this implementation, the switch status of the peripheral S1-S4 is read according to the DI1-DI4 pins defined as inputs. The DO1-DO4 pin level is initialized to a high level, and DI1-DI4 is also initialized to a high level. The switch is a toggle switch, and the on-off state of the switch changes the level value of the DI1-DI4 pin. The DSP completes data reading by reading the value of the register corresponding to the DI1-DI4 pin. The above initialization operations are implemented in C language, and the S2200 step is performed.
[0046] S2200: Read the external switch input value according to the status of DSP pins DI1-DI4, see Figure 3 , DSP pin input DI1-DI4 is read by DSP to obtain the switch input data from the register value corresponding to the pin. The read data is 8-bit byte data. The low bits 1-4 correspond to the level status of switches S1-S4. The read data is obtained through logical operation. The logical operation uses bitwise AND operation to obtain data 1, 2, 4, 8, which correspond to the switch status of switches S1, S2, S3, and S4 respectively. Simulate S1: simulate missile working state failure, S2: simulate missile equipment failure, S3: simulate battery activation failure, S4: simulate engine ignition failure. The switch value data is 2, which is determined to be a simulated missile equipment failure sequence, and step S2300 is performed.
[0047] S2300: DSP constructs a missile equipment fault simulation message, which consists of a message header and a message body. The message header includes a message type and a message body length. Here, the missile fault message type is coded as 0xed and is identified by one byte. Enter step S2400.
[0048] S2400: DSP sends the missile-borne aircraft the simulated message of the missile-borne equipment failure through the 422 interface. The missile-borne aircraft receives the simulated message of the missile-borne equipment failure and performs the missile-borne equipment failure sequence operation, including data bit operations such as the servo is normal, the communication control device is normal, the inertial group is normal, the fuze is normal, the missile-borne aircraft is normal, the data recorder is normal, and the data recorder is empty. The above-mentioned status data is marked by a byte of bit status, 1: marked as valid, 0: marked as invalid. The status bit operated in the current step includes the servo is set to 1 when it is normal, the communication control device is set to 1 when it is normal, the fuze is set to 1 when it is normal, the missile-borne aircraft is set to 1 when it is normal, the data recorder is set to 0 when it is normal, and the data recorder is set to 0 when it is empty. According to the above status bit operation and the launch control system interaction is performed, further, the launch control system return result is obtained. The return result includes received and failed. If the received instruction is returned, the S2500 step is performed.
[0049] S2500: The missile carrier sets the corresponding state according to the result of the timing interaction with the launch control system and sends it to the DSP. The state setting here includes setting the launch control combination and the guidance control combination communication to 1 normally and the guidance head self-check to 0. Further, the timing execution result is sent to the DSP to perform step S2600.
[0050] S2600: DSP obtains the result of the missile carrier. If the result is returned successfully, DSP reads the switch S3: simulates the battery activation fault status. If the switch status is invalid, the timing simulation ends. If the switch status is valid, DSP reads the battery power supply status through the power supply detection pin, see Figure 3 DSP power supply detection pin part. Figure 3 The voltage difference between the DSP power supply detection pins in the DSP detects the battery status. If there is voltage, the DSP delays for 500ms and drives the relay K1 to work, and the contact K1-1 of the linkage relay K1 is closed to supply power to the missile carrier. The missile carrier responds to the battery power-on event and activates the timing operation between the missile carrier and the launch control system. The DSP receives the missile carrier battery activation completion message through the 422 interface and performs step S2700.
[0051] S2700: DSP reads S4: simulates the switch status of the engine ignition fault. If the switch status is invalid, the timing simulation ends. If the switch status is valid, DSP constructs an engine ignition fault message and sends it to the missile carrier. The missile carrier starts the engine ignition fault sequence and completes the timing interaction of the launch control system. Return to DSP to complete the timing simulation. After a delay of 100ms, DSP drives relay K2 to work, and the contact K2-1 of the linkage relay K2 is closed, completing the simulation of the missile equipment failure.
[0052] The present invention also provides a communication timing simulation device based on a missile, see Figure 4 ,include:
[0053] P1200: Data recorder module, used to record the timing interaction steps between the missile carrier and the launch control system to facilitate later fault finding.
[0054] P1300: missile carrier module, used to execute the timing process of the launch control system, and feedback to the DSP timing simulation module based on the execution results.
[0055] P1400: 422 interface module, used to establish a communication link between the missile carrier module and the DSP timing simulation module.
[0056] P1500: DSP timing simulation module, used to simulate fault timing messages, including missile fault simulation unit, missile equipment fault simulation unit, battery activation fault simulation unit, engine ignition fault simulation unit. The four simulation units are respectively determined by S1: simulated missile working state fault, S2: simulated missile equipment fault, S3: simulated battery activation fault, S4: simulated engine ignition fault switch state, see Figure 3 S1-S4.
[0057] The present invention simulates the execution timing of each hardware through a simulation method to ensure the software and hardware reliability of the control system, and can discover and solve problems in the factory stage.
[0058] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A missile-based communication timing simulation method, characterized in that: include: Simulator initialization, including 422 interface chip initial value setting, missile carrier power-on self-test, DSP pin definition; The DSP pin definition Including, switch S1: simulate missile working state failure, switch S2: simulate missile equipment failure, switch S3: simulate battery activation failure, switch S4: simulate engine ignition failure; wherein the DSP includes 51 single chip microcomputer series; Constructing a simulation message, wherein the simulation message is composed of a message header and a message body, the message header includes a message type and a message body length; after sending the simulation message to the missile-borne aircraft through the 422 interface, obtaining a completion result; the message includes a simulated missile failure message and a simulated missile equipment failure message; DSP reads the state of the switch S1. If the state is valid, the communication between the launch control combination and the guidance control combination is set to be valid, the self-check of the guidance head is set to be valid, and the zero position calculation is set to be invalid; DSP reads the state of the switch S2. If the state is valid, the simulated missile equipment failure switch is valid, the launch control combination and the guidance control combination communication are set to be normal and valid, and the seeker self-check is set to be invalid; The DSP reads the state of the switch S3, and if the state is valid, performs a battery fault simulation; DSP reads the state of the switch S4, and if the state is valid, performs engine ignition fault simulation; After the missile carrier performs the missile timing operation according to the simulation message, the corresponding state setting is completed according to the result of the timing interaction with the launch control system and sent to the DSP; The missile timing sequence includes a simulated missile fault timing sequence and a simulated missile equipment fault timing sequence; wherein the simulated missile fault timing sequence is respectively: the servo is normal, the communication control equipment is normal, the inertial group is normal, the fuze is normal, the missile-borne aircraft is normal, the data recorder is normal, and the data recorder is empty; The simulated onboard equipment failure timing sequence is: the servo is normal, the communication control equipment is normal, the inertial group is normal, the fuze is normal, the missile-borne aircraft is normal, the data recorder is normal, and the data recorder is empty.
2. A missile-based communication timing simulation device, used to execute the missile-based communication timing simulation method according to claim 1, comprising: The data recorder module is used to record the sequential interaction steps between the missile carrier and the launch control system to facilitate later fault finding; The missile carrier module is used to execute the missile timing of the launch control system and feed back the execution results to the DSP timing simulation module; The missile timing sequence includes a simulated missile fault timing sequence and a simulated missile equipment fault timing sequence; wherein the simulated missile fault timing sequence is respectively: the servo is normal, the communication control equipment is normal, the inertial group is normal, the fuze is normal, the missile-borne aircraft is normal, the data recorder is normal, and the data recorder is empty; The simulated missile equipment failure sequence is as follows: the servo is normal, the communication control equipment is normal, the inertial group is normal, the fuze is normal, the missile-borne aircraft is normal, the data recorder is normal, and the data recorder is empty; 422 interface module, used to establish a communication link between the missile carrier module and the DSP timing simulation module; The DSP timing simulation module is used to simulate fault timing messages, including missile fault simulation, missile equipment fault simulation, battery activation fault simulation, and engine ignition fault simulation, wherein the message consists of a message header and a message body, and the message header includes a message type and a message body length.
3. The missile-based communication timing simulation device according to claim 2, characterized in that: The DSP timing simulation module includes a missile fault simulation unit, a missile equipment fault simulation unit, a battery activation fault simulation unit, and an engine ignition fault simulation unit.
4. The missile-based communication timing simulation device according to claim 3, characterized in that: The missile fault simulation unit, the missile equipment fault simulation unit, the battery activation fault simulation unit, and the engine ignition fault simulation unit are determined by the switch states of the switches S1 to S4 corresponding to the DSP pins.
Citation Information
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