A load sampling circuit and electronic product applied to a switch type charging chip

Abstract

The embodiment of the present application provides a load sampling circuit and an electronic product applied to a switch-type charging chip. The present application samples the current of the charging terminal by setting a current acquisition circuit inside the sampling circuit. All sampling circuits are implemented inside the chip, do not rely on peripheral circuits, and do not require additional chip pins. The area required for the solution is reasonable. The embodiment of the present application can improve the accuracy of the sampling circuit. Under different charging current configurations, different operating voltages and temperatures, it does not rely on preset parameters and directly extracts current information, thereby improving the sampling accuracy of the entire range by several times.

Description

Technical Field

[0001] The embodiments of the present application belong to the field of circuit technology, and in particular, relate to a load sampling circuit and an electronic product applied to a switch-type charging chip. Background Art

[0002] The charging chip will change the charging current in real time according to the different states of the lithium battery, which can effectively protect the lithium battery and extend its service life. On the other hand, it also increases the application flexibility of the chip, allowing a chip to be used in different fields and different types of lithium battery electronic products. In order for the chip to modulate the size of the charging current, it is necessary to sample the current charging current, compare the information obtained with a stable benchmark, and stabilize the final charging current within the preset range through the control of the loop in the chip.

[0003] In the prior art, the current of the charging terminal is sampled by adding an external series sampling resistor. This method places requirements on the external application conditions of the chip and requires an additional series resistor. With the trend of miniaturization of electronic products, the space on the motherboard is further compressed. The series resistor occupies additional area, which increases the cost and limits the application scenarios of the chip. At the same time, it is also necessary to add additional chip ports, which increases the packaging cost. Summary of the invention

[0004] The embodiments of the present application provide a load sampling circuit and an electronic product applied to a switch-type charging chip, so as to solve the technical problem caused by sampling the current of a charging terminal by adding a series sampling resistor in the prior art.

[0005] The embodiment of the present application provides a load sampling circuit applied to a switch-type charging chip, wherein the charging chip includes a first power tube, a second power tube and a sampling circuit;

[0006] The sampling circuit includes a current collection circuit, a discharge circuit and a voltage-to-current conversion circuit;

[0007] The current collection circuit comprises a first current collection circuit and a second current collection circuit, and the first end of the first power tube is connected to the first end of the first current collection circuit and the first end of the second current collection circuit respectively;

[0008] The common end between the second end of the first power tube and the first end of the second power tube is connected to the second end of the first current acquisition circuit and the second end of the second current acquisition circuit respectively, and the voltage drop generated by the current on the first power tube is processed into a constant voltage through the first current acquisition circuit and the second current acquisition circuit;

[0009] The second end of the second power tube is connected to a fixed voltage node;

[0010] The first current acquisition circuit and the second current acquisition circuit are arranged in parallel, and a switch circuit is arranged between the first current acquisition circuit and the second current acquisition circuit, and the voltage stored in the second current acquisition circuit is transferred to the first current acquisition circuit through the switch circuit to stabilize the voltage of the first power tube;

[0011] The first end of the discharge circuit is connected to the first current acquisition circuit, the second end of the discharge circuit is connected to the input end of the voltage-to-current circuit, and the output end of the voltage-to-current circuit is connected to the current sampling end of the charging chip.

[0012] As a preferred embodiment of the present application, the sampling circuit further includes a first amplification circuit;

[0013] The second end of the discharge circuit is connected to the input end of the first amplifier circuit, and the output end of the first amplifier circuit is connected to the input end of the voltage-to-current circuit.

[0014] As a preferred embodiment of the present application, the first current acquisition circuit includes a first switch, a first resistor and a first capacitor, the first switch is connected to the second end of the first power tube, and the first resistor is arranged between the first switch and the first capacitor;

[0015] The second current acquisition circuit includes a second switch, a second resistor and a second capacitor, the second switch is connected to the second end of the second power tube, and the second resistor is arranged between the second switch and the second capacitor;

[0016] One end of the first capacitor away from the first resistor and one end of the second capacitor away from the second resistor are both connected to the first end of the first power tube;

[0017] When the first switch and the second switch are turned on and the switch circuit and the discharge circuit are turned off, the first current acquisition circuit and the second current acquisition circuit acquire and process the current on the first power tube and supply the acquired current to the voltage-to-current circuit.

[0018] As a preferred embodiment of the present application, the switch circuit includes a third switch and a third resistor;

[0019] The first end of the third switch is connected to the common end between the second resistor and the second capacitor, the first end of the third resistor is connected to the second end of the third switch, and the second end of the third resistor is connected to the common end between the first resistor and the first capacitor;

[0020] When the first power tube is disconnected, the first switch, the second switch and the discharge circuit are disconnected, and the switch circuit is turned on to transfer the voltage stored in the second capacitor to the first capacitor to stabilize the first power tube.

[0021] As a preferred embodiment of the present application, the discharge circuit includes a fourth switch and a fourth resistor;

[0022] The first end of the fourth switch is connected to the common end between the first switch and the first resistor, the second end of the fourth switch is connected to the first end of the fourth resistor, and the second end of the fourth resistor is connected to the first end of the first power tube;

[0023] When the first switch, the second switch and the third switch are disconnected and the fourth switch is turned on, the voltage stored in the first capacitor is supplied to the voltage-to-current circuit through the discharge circuit.

[0024] As a preferred embodiment of the present application, the voltage-to-current module includes a sampling tube, an amplifier and a feedback modulation tube;

[0025] The first input end of the amplifier is connected to the output end of the first amplifier circuit, the second input end of the amplifier is connected to the third end of the feedback modulation tube, the second end of the feedback modulation tube is connected to the first end of the sampling tube, the first end of the feedback modulation tube is connected to the current sampling end of the charging chip, and the second end of the sampling tube is connected to a fixed voltage node.

[0026] As a preferred embodiment of the present application, the first power tube, the second power tube, the sampling tube and the feedback modulation tube are all PMOS tubes or the first power tube, the second power tube, the sampling tube and the feedback modulation tube are all NMOS tubes;

[0027] The first end of the first power tube, the first end of the second power tube, the first end of the sampling tube and the first end of the feedback modulation tube are all drains;

[0028] The second end of the first power tube, the second end of the second power tube, the second end of the sampling tube and the second end of the feedback modulation tube are source electrodes;

[0029] The third end of the first power tube, the third end of the second power tube, the third end of the sampling tube and the third end of the feedback modulation tube are gates.

[0030] Compared with the prior art, the load sampling circuit for a switch-type charging chip provided in the embodiment of the present application samples the current of the charging terminal by setting a current acquisition circuit inside the sampling circuit. All sampling circuits are implemented inside the chip, do not rely on peripheral circuits, and do not require additional chip pins. The area required for the solution is reasonable. The embodiment of the present application can improve the accuracy of the sampling circuit. Under different charging current configurations, different operating voltages and temperatures, it does not rely on preset parameters and directly extracts current information, thereby improving the sampling accuracy of the entire range by several times.

[0031] In a second aspect, an embodiment of the present application further provides an electronic product, comprising a load sampling circuit applied to a switch-type charging chip as described in the first aspect.

[0032] Compared with the prior art, the beneficial effects of an electronic product provided by an embodiment of the present application are the same as those of the first aspect and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. Some specific embodiments of the present application will be described in detail in an illustrative and non-restrictive manner with reference to the drawings. The same reference numerals in the drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the drawings:

[0034] Figure 1 A schematic diagram of the structure of a sampling circuit in the prior art provided in an embodiment of the present application;

[0035] Figure 2 A schematic diagram of the structure of a sampling circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only embodiments of a part of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present application.

[0037] like Figure 1 As shown, the current at the charging terminal is sampled by adding an external series sampling resistor.

[0038] Depend on Figure 1It can be seen that the sampling resistor R sns is connected in series between SW and VBAT (lithium battery end). The charging current flows through R sns to generate a voltage drop. Since R sns is an external resistor of the chip, its resistance value is relatively constant. Therefore, the voltage difference across R sns can more accurately reflect the size of the charging current flowing through the resistor. The voltage difference is fed back to the internal through the chip interface for processing, and the current charging current information can be obtained for subsequent control, achieving the purpose of sampling. The solution of adding an external series sampling resistor puts forward requirements for the external application conditions of the chip, and requires additional series resistors. Under the trend of miniaturization of electronic products, the space on the motherboard of electronic products is further compressed. The series resistor occupies additional area, increases the cost, and limits the application scenarios of the chip. At the same time, it is necessary to add additional chip ports, which increases the packaging cost. Usually, obtaining the voltage of the sampled battery is a normal function of the charging chip, but since both ends of the sampling resistor need to be fed back to the inside of the chip, in addition to the VBAT end, a VBATS sampling point needs to be added.

[0039] In order to solve the technical problem caused by adding an external series sampling resistor to sample the current of the charging terminal in the prior art, the present application proposes a new solution.

[0040] First, as Figure 2 As shown, the embodiment of the present application provides a load sampling circuit applied to a switch-type charging chip, the charging chip includes a first power tube 01, a second power tube 02 and a sampling circuit; the current acquisition circuit includes a first current acquisition circuit, a second current acquisition circuit and a voltage-to-current circuit, the first end of the first power tube 01 is respectively connected to the first end of the first current acquisition circuit and the first end of the second current acquisition circuit; the common end between the second end of the first power tube 01 and the first end of the second power tube 02 is respectively connected to the second end of the first current acquisition circuit and the second end of the second current acquisition circuit, and the voltage drop generated by the current on the first power tube 01 is processed into a constant voltage through the first current acquisition circuit and the second current acquisition circuit;

[0041] The second end of the second power tube 02 is connected to a fixed voltage node. In the embodiment of the present application, the fixed voltage node is a ground terminal.

[0042] The first current acquisition circuit and the second current acquisition circuit are arranged in parallel, and a switch circuit is arranged between the first current acquisition circuit and the second current acquisition circuit, and the voltage stored in the second current acquisition circuit is transferred to the first current acquisition circuit through the switch circuit to stabilize the voltage of the first power tube 01;

[0043] The first end of the discharge circuit is connected to the first current acquisition circuit, the second end of the discharge circuit is connected to the input end of the voltage-to-current circuit, and the output end of the voltage-to-current circuit is connected to the current sampling end of the charging chip.

[0044] In the embodiment of the present application, two current acquisition circuits are set to sample the current of the first power tube 01, and the voltage difference generated by the non-constant and non-continuous current on the first power tube 01 is averaged into a constant and continuous voltage difference. Since the current in the first power tube 01 in the switch-type charging chip changes with time, the voltage drop of the changing current on the first power tube 01 can be filtered (averaged) into a relatively constant voltage through the first current acquisition circuit and the second current acquisition circuit. In the embodiment of the present application, when the first power tube 01 is in the disconnected state, the switch circuit is closed to transfer the voltage stored in the second current acquisition circuit to the first current acquisition circuit, so that the first power tube 01 can be stabilized. In the embodiment of the present application, the voltage stored in the first current acquisition circuit is supplied to the voltage-to-current circuit through the discharge circuit.

[0045] The embodiment of the present application directly samples the discontinuous and nonlinear current in the first power tube 01 of the switch-type charging chip, averages the discontinuous and nonlinear current as the sampling current of the output current, and uses the voltage drop on the first power tube 01 as an indirect response to the current.

[0046] The present application samples the current of the charging terminal by setting a current acquisition circuit inside the sampling circuit. All sampling circuits are implemented inside the chip, do not rely on peripheral circuits, and do not require additional chip pins. The area required for the solution is reasonable. The embodiment of the present application can improve the accuracy of the sampling circuit. Under different charging current configurations, different operating voltages and temperatures, it does not rely on preset parameters and directly extracts current information, thereby improving the sampling accuracy of the entire range by several times.

[0047] In an embodiment of the present application, the sampling circuit further includes a first amplifier circuit 03, the second end of the discharge circuit is connected to the input end of the first amplifier circuit 03, and the output end of the first amplifier circuit 03 is connected to the input end of the voltage-to-current circuit.

[0048] Specifically, the voltage-to-current module includes a sampling tube 06, an amplifier 04 and a feedback modulation tube 05;

[0049] The first input end of the amplifier 04 is connected to the output end of the first amplifier circuit 04, the second input end of the amplifier 04 is connected to the third end of the feedback modulation tube 05, the second end of the feedback modulation tube 05 is connected to the first end of the sampling tube 06, the first end of the feedback modulation tube 05 is connected to the current sampling end of the charging chip, and the second end of the sampling tube 06 is connected to a fixed voltage node.

[0050] In a specific embodiment of the present application, the first power tube, the second power tube, the sampling tube and the feedback modulation tube are all PMOS tubes or the first power tube, the second power tube, the sampling tube and the feedback modulation tube are all NMOS tubes;

[0051] The first end of the first power tube 01, the first end of the second power tube 02, the first end of the sampling tube 06 and the first end of the feedback modulation tube 05 are all drains;

[0052] The second end of the first power tube 01, the second end of the second power tube 02, the second end of the sampling tube 06 and the second end of the feedback modulation tube 05 are source electrodes;

[0053] The third end of the first power tube 01 , the third end of the second power tube 02 , the third end of the sampling tube 06 and the third end of the feedback modulation tube 05 are gates.

[0054] Since the size of the first power tube 01 and the second power tube 02 is generally large, and the on-resistance is usually at the milliohm level, when the output current is small, the obtained sampling voltage is very small, which is not conducive to the processing of the subsequent circuit, so the voltage difference is amplified by a certain ratio. There are many ways to implement this part, and there are no special requirements. The first amplifier circuit 03 of the present invention is a proportional amplifier, that is, the voltage is first converted into current, and then it flows to a resistor with a fixed resistance value to generate the final output voltage. In the embodiment of the present application, for the first amplifier circuit 03 and the voltage-to-current circuit, the current amplification method can also be selected or directly converted into current through the sampling tube 06, which can effectively save area and save the subsequent voltage-to-current circuit, and can be flexibly processed according to the actual application scenario. The embodiment of the present application is not limited to this.

[0055] In a specific embodiment of the present application, the first current acquisition circuit includes a first switch S1, a first resistor R1 and a first capacitor C1, the first switch S1 is connected to the second end of the first power tube O1, and the first resistor R1 is arranged between the first switch S1 and the first capacitor C1;

[0056] The second current acquisition circuit includes a second switch S2, a second resistor R2 and a second capacitor C2, the second switch S2 is connected to the second end of the second power tube O2, and the second resistor R2 is arranged between the second switch S2 and the second capacitor C2;

[0057] One end of the first capacitor C1 away from the first resistor R1 and one end of the second capacitor C2 away from the second resistor R2 are both connected to the first end of the first power tube O1;

[0058] When the first switch S1 and the second switch S2 are turned on and the switch circuit and the discharge circuit are turned off, the first current acquisition circuit and the second current acquisition circuit acquire and process the current on the first power tube O1 and supply the acquired current to the voltage-to-current circuit.

[0059] In a specific embodiment of the present application, the switch circuit includes a third switch S3 and a third resistor R3;

[0060] The first end of the third switch S3 is connected to the common end between the second resistor R2 and the second capacitor C2, the first end of the third resistor R3 is connected to the second end of the third switch S3, and the second end of the third resistor R3 is connected to the common end between the first resistor R1 and the first capacitor C1;

[0061] When the first power tube 01 is disconnected, the first switch S1, the second switch S2 and the discharge circuit are disconnected, and the switch circuit is turned on to transfer the voltage stored in the second capacitor C2 to the first capacitor C1 to stabilize the first power tube 01.

[0062] The discharge circuit includes a fourth switch S4 and a fourth resistor R4;

[0063] The first end of the fourth switch S4 is connected to the common end between the first switch S1 and the first resistor R1, the second end of the fourth switch S4 is connected to the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is connected to the first end of the first power tube O1;

[0064] When the first switch S1 , the second switch S2 , and the third switch S3 are turned off and the fourth switch S4 is turned on, the voltage stored in the first capacitor C1 is supplied to the voltage-to-current circuit through the discharge circuit.

[0065] According to the working principle of the switch-type charging chip, the first power tube O1 has current flowing only in the Ton time period (the first power tube is turned on). Therefore, in the Ton time period, the voltage difference (VDD-Vo) across the first capacitor C1 satisfies:

[0066] I L *Ron_power=I load *Ron_power

[0067] Among them, I L is the current flowing through the first power tube 01 in the Ton time period, Ron_power is the resistance of the first power tube, I loadis the current flowing through the load. Because the above formula is valid only in the Ton (first power tube is turned on) and Toff (second power tube is turned on) time periods, a complete switching cycle is Ts=Ton+Toff+Ttri. The Ttri time period is the time period when both the first power tube 01 and the second power tube 02 are turned off. Therefore, the periodic steady-state expression of the above formula satisfies in one Ts period:

[0068]

[0069] The following describes in detail the specific working process of the sampling circuit provided by the embodiment of the present application. The sampling process is implemented in three steps:

[0070] In the Ton time period, switches S1 and S2 are closed, S3 and S4 are open, and the current flowing through resistor R1 is I1 = (Vsw-Vo) / R1. The duration is Ton, and we can get:

[0071]

[0072] Since S2 is also closed in the Ton stage, and the RC network composed of C2 and R2 also averages the voltage difference on the first power tube 01 and stores it on C2, the voltage difference is:

[0073] VDD-Vm=I L *Ron_power

[0074] In the Toff time period, switches S1, S2 and S4 are open, S3 is closed, and the current flowing through resistor R3 is I3 = (Vm-Vo) / R3. The duration is Toff, and we can get

[0075]

[0076] In the Ttri time period, there will be an inductor current zero-crossing protection and enter the three-state Ttri time period. During this time period, switches S1, S2, and S3 are all disconnected, S4 is closed, and the current flowing through resistor R4 is I4 = (VDD-Vo) / R4, and the duration is Ttri. It can be obtained

[0077]

[0078] Finally, Vo (the voltage collected by the sampling circuit) is a stable voltage, so the sum of the current flowing into Vo is equal to the sum of the current leaving. According to Kirchhoff's current law, we can get: I1+I3+I4=0. If the design makes R1, R3 and R4 equal and equal to R0, then the above formula can be simplified to:

[0079]

[0080] Therefore, the final voltage difference between VDD and Vo is the product of the load (output current) of the switching charging chip and the on-resistance of the power tube, realizing the sampling and averaging operations.

[0081] In this embodiment, the averaged voltage is first amplified by the first amplifier circuit 03, and then converted into current by the voltage-to-current circuit, and then flows to a resistor with a fixed resistance to generate a final output voltage. The amplification factor is K1, and K1 is adjustable. The amplified voltage is applied to a sampling tube 06 of the same type as the power tube. The on-resistance of the sampling tube 06 is K2 times the on-resistance of the first power tube 01. The current generated by the sampling tube 06 is the sampled current of the output current.

[0082] The final sampling current expression is:

[0083]

[0084] Among them, Ron and Rsns are the equivalent on-resistances of the first power tube 01 and the sampling tube 06 respectively. Since the same device is used and the working state is guaranteed to be consistent, even if the on-resistance changes with conditions such as process and temperature, the rate of change is consistent, so the ratio can be regarded as a constant. K=K1*K2 is the amplification factor, which is also a constant. Therefore, the final sampling current Iout_sns and the equivalent load Iload are in a linear relationship. The above only collects the current of the first power tube 01, and then uses the characteristic that the average currents of the first power tube 01 and the second power tube 02 are equal to indirectly obtain the average currents of the first power tube 01 and the second power tube 02 in the entire time period.

[0085] In the embodiment of the present application, the load can also be sampled by sampling the current on the second power tube 02 of the switch-type charging chip, because in the CCM (continuous transfer mode) working mode, the average current of the first power tube 01 in the Ton time period is equal to the average current of the second power tube 02 in the Toff time period, but the application scenario may be limited, because for the charging chip, the voltage range of the lithium battery is generally 3V to 4.5V, and the minimum input voltage of the adapter may be less than 5V, so the Toff time will be compressed when the adapter voltage and the lithium battery voltage are close. It will increase the difficulty when the circuit is implemented, but it is feasible in principle. For application scenarios with higher adapter voltages, it should be more suitable and easier to implement. In addition, additional circuits need to be added to process the negative voltage at the SW output.

[0086] In a second aspect, an embodiment of the present application further provides an electronic product, comprising a load sampling circuit applied to a switch-type charging chip as described in the first aspect.

[0087] Compared with the prior art, the beneficial effects of an electronic product provided by an embodiment of the present application are the same as those of the first aspect and will not be repeated here.

[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A load sampling circuit applied to a switch type charging chip, characterized in that: The charging chip includes a first power tube, a second power tube and a sampling circuit; The sampling circuit includes a current collection circuit, a discharge circuit and a voltage-to-current conversion circuit; The current collection circuit comprises a first current collection circuit and a second current collection circuit, and the first end of the first power tube is connected to the first end of the first current collection circuit and the first end of the second current collection circuit respectively; The common end between the second end of the first power tube and the first end of the second power tube is connected to the second end of the first current acquisition circuit and the second end of the second current acquisition circuit respectively, and the voltage drop generated by the current on the first power tube is processed into a constant voltage through the first current acquisition circuit and the second current acquisition circuit; The second end of the second power tube is connected to a fixed voltage node; The first current acquisition circuit and the second current acquisition circuit are arranged in parallel, and a switch circuit is arranged between the first current acquisition circuit and the second current acquisition circuit, and the voltage stored in the second current acquisition circuit is transferred to the first current acquisition circuit through the switch circuit to stabilize the voltage of the first power tube; The first current acquisition circuit includes a first switch, a first resistor and a first capacitor, the first switch is connected to the second end of the first power tube, and the first resistor is arranged between the first switch and the first capacitor; The second current acquisition circuit includes a second switch, a second resistor and a second capacitor, the second switch is connected to the first end of the second power tube, and the second resistor is arranged between the second switch and the second capacitor; One end of the first capacitor away from the first resistor and one end of the second capacitor away from the second resistor are both connected to the first end of the first power tube; When the first switch and the second switch are turned on and the switch circuit and the discharge circuit are turned off, the first current collection circuit and the second current collection circuit collect and process the current on the first power tube and supply it to the voltage-to-current circuit; When the first power tube is disconnected, the first switch, the second switch and the discharge circuit are disconnected, and the switch circuit is turned on to transfer the voltage stored in the second capacitor to the first capacitor to stabilize the voltage of the first power tube; The first end of the discharge circuit is connected to the first current acquisition circuit, the second end of the discharge circuit is connected to the input end of the voltage-to-current circuit, and the output end of the voltage-to-current circuit is connected to the current sampling end of the charging chip.

2. A load sampling circuit for a switch type charging chip as claimed in claim 1, characterized in that: The sampling circuit further includes a first amplifier circuit; the second end of the discharge circuit is connected to the input end of the first amplifier circuit, and the output end of the first amplifier circuit is connected to the input end of the voltage-to-current circuit.

3. A load sampling circuit for a switch type charging chip as claimed in claim 1, characterized in that: The switch circuit includes a third switch and a third resistor; The first end of the third switch is connected to the common end between the second resistor and the second capacitor, The first end of the third resistor is connected to the second end of the third switch, and the second end of the third resistor is connected to the common end between the first resistor and the first capacitor; When the first power tube is disconnected, the first switch, the second switch and the discharge circuit are disconnected, and the switch circuit is turned on to transfer the voltage stored in the second capacitor to the first capacitor to stabilize the first power tube.

4. A load sampling circuit for a switch type charging chip as claimed in claim 1, characterized in that: The discharge circuit includes a fourth switch and a fourth resistor; The first end of the fourth switch is connected to the common end between the first switch and the first resistor, The second end of the fourth switch is connected to the first end of the fourth resistor, and the second end of the fourth resistor is connected to the first end of the first power tube; When the first switch, the second switch and the third switch are disconnected and the fourth switch is turned on, the voltage stored in the first capacitor is supplied to the voltage-to-current circuit through the discharge circuit.

5. A load sampling circuit for a switch type charging chip as claimed in claim 2, characterized in that: The voltage-to-current circuit includes a sampling tube, an amplifier and a feedback modulation tube; The first input end of the amplifier is connected to the output end of the first amplifier circuit, the second input end of the amplifier is connected to the third end of the feedback modulation tube, the second end of the feedback modulation tube is connected to the first end of the sampling tube, the first end of the feedback modulation tube is connected to the current sampling end of the charging chip, and the second end of the sampling tube is connected to a fixed voltage node.

6. A load sampling circuit for a switch type charging chip as claimed in claim 5, characterized in that: The first power tube, the second power tube, the sampling tube and the feedback modulation tube are all PMOS tubes or the first power tube, the second power tube, the sampling tube and the feedback modulation tube are all NMOS tubes; The first end of the first power tube, the first end of the second power tube, the first end of the sampling tube and the first end of the feedback modulation tube are all drains; The second end of the first power tube, the second end of the second power tube, the second end of the sampling tube and the second end of the feedback modulation tube are source electrodes; The third end of the first power tube, the third end of the second power tube, the third end of the sampling tube and the third end of the feedback modulation tube are grid electrodes.

7. An electronic product, characterized in that: It comprises a load sampling circuit applied to a switch-type charging chip as described in any one of claims 1-6.

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