Gamma debugging method and array substrate

Abstract

The present application provides a gamma debugging method and an array substrate. The gamma debugging method is applied to the array substrate, and the gamma debugging method includes: preparing a first metal layer, where the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights; preparing a gate insulating layer, and the gate insulating layer surrounds the first metal pillars and exposes at least one first metal pillar; debugging the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar; preparing a second metal layer, where the second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights; preparing a passivation layer, and the passivation layer surrounds the second metal pillars and exposes at least one second metal pillar; debugging the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar. Through the first metal pillars and the second metal pillars, gamma unified debugging can be performed on products with the same film thickness during the manufacturing process, and the problem of gamma value exceeding the specification due to uneven film thickness can be avoided.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a gamma debugging method and an array substrate. Background Art

[0002] In a liquid crystal display (LCD), the relationship between gamma RGB values and power is not a simple linear relationship, but a power function relationship. The exponent of this function is called the gamma value, which is generally 2.2. Currently, most products are controlled according to the industry standard of 2.2 ± 0.2. If the value exceeds the range, there will be discomfort in human eye observation, which affects the product quality.

[0003] However, during manufacturing, inaccurate control of the film thickness of the gate insulating layer and the passivation layer may cause gamma drift, and there is a risk that the gamma value exceeds the specification. Summary of the Invention

[0004] The main technical problem to be solved by this application is to provide a gamma debugging method and an array substrate to solve the problem that the gamma value exceeds the specification in the prior art.

[0005] To solve the above technical problem, the first technical solution provided by this application is: to provide a gamma debugging method applied to an array substrate, where the gamma debugging method includes:

[0006] Prepare a first metal layer, where the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights;

[0007] Prepare a gate insulating layer, and the gate insulating layer surrounds the first metal pillars and exposes at least one of the first metal pillars;

[0008] Adjust the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillars;

[0009] Prepare a second metal layer, where the second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights;

[0010] Prepare a passivation layer, and the passivation layer surrounds the second metal pillars and exposes at least one of the second metal pillars;

[0011] Adjust the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillars.

[0012] Wherein, the array substrate has a display area and a non-display area, and the first metal pillars are arranged in the non-display area;

[0013] The first metal pillars with different heights correspond to gate insulating layers with different thicknesses to correspond to different gamma values; wherein, the height of one of the first metal pillars with different heights is the first preset thickness value of the gate insulating layer.

[0014] Wherein, the debugging of the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar includes:

[0015] Comparing the thickness of the gate insulating layer and the height of the first metal pillar, measuring the resistance value of the first metal pillar exposed to the gate insulating layer, and determining the height of the first metal pillar according to the resistance value of the first metal pillar;

[0016] Adjusting the gamma voltage according to the height of the first metal pillar so that the gamma value meets the preset gamma value.

[0017] Wherein, the first metal layer forms at least one first metal pillar group, and the first metal pillar group includes three first metal pillars with different heights, namely a first sub-metal pillar, a second sub-metal pillar, and a third sub-metal pillar; wherein, the height of the first sub-metal pillar is greater than the height of the second sub-metal pillar, the height of the second sub-metal pillar is greater than the height of the third sub-metal pillar; the height of the second sub-metal pillar is equal to the first preset thickness value of the gate insulating layer;

[0018] The debugging of the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar includes:

[0019] When the thickness of the gate insulating layer is equal to the height of the second sub-metal pillar, the gamma voltage is not adjusted;

[0020] When the thickness of the gate insulating layer is greater than the height of the second sub-metal pillar and less than or equal to the height of the first sub-metal pillar, measuring the resistance value of the first sub-metal pillar and determining the height of the first sub-metal pillar, and adjusting the gamma voltage according to the height of the first sub-metal pillar;

[0021] When the thickness of the gate insulating layer is less than the height of the second sub-metal pillar and greater than the height of the third sub-metal pillar, measuring the resistance value of the second sub-metal pillar and determining the height of the second sub-metal pillar, and adjusting the gamma voltage according to the height of the second sub-metal pillar;

[0022] When the thickness of the gate insulating layer is less than or equal to the height of the third sub-metal pillar, measuring the resistance value of the third sub-metal pillar and determining the height of the third sub-metal pillar, and adjusting the gamma voltage according to the height of the third sub-metal pillar.

[0023] Wherein, the array substrate has a display area and a non-display area, and the second metal pillar is disposed in the non-display area;

[0024] The second metal pillars with different heights correspond to passivation layers with different thicknesses to correspond to different gamma values; wherein, the height of one of the second metal pillars with different heights is the second preset thickness value of the passivation layer.

[0025] Wherein, the adjusting the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar includes:

[0026] Comparing the thickness of the passivation layer and the height of the second metal pillar, measuring the resistance value of the second metal pillar exposed to the passivation layer, and determining the height of the second metal pillar according to the resistance value of the second metal pillar;

[0027] Adjusting the gamma voltage according to the height of the second metal pillar so that the gamma value meets the preset gamma value.

[0028] Wherein, the second metal layer forms at least one group of second metal pillars, and the group of second metal pillars includes three second metal pillars with different heights, namely a fourth sub-metal pillar, a fifth sub-metal pillar, and a sixth sub-metal pillar; wherein, the height of the fourth sub-metal pillar is greater than the height of the fifth sub-metal pillar, the height of the fifth sub-metal pillar is greater than the height of the sixth sub-metal pillar; the height of the fifth sub-metal pillar is equal to the second preset thickness value of the passivation layer;

[0029] The adjusting the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar includes:

[0030] When the thickness of the passivation layer is equal to the height of the fifth sub-metal pillar, the gamma voltage is not adjusted;

[0031] When the thickness of the passivation layer is greater than the height of the fifth sub-metal pillar and less than or equal to the height of the fourth sub-metal pillar, measuring the resistance value of the fourth sub-metal pillar and determining the height of the fourth sub-metal pillar, and adjusting the gamma voltage according to the height of the fourth sub-metal pillar;

[0032] When the thickness of the passivation layer is less than the height of the fifth sub-metal pillar and greater than the height of the sixth sub-metal pillar, measuring the resistance value of the fifth sub-metal pillar and determining the height of the fifth sub-metal pillar, and adjusting the gamma voltage according to the height of the fifth sub-metal pillar;

[0033] When the thickness of the passivation layer is less than or equal to the height of the sixth sub-metal pillar, measuring the resistance value of the sixth sub-metal pillar and determining the height of the sixth sub-metal pillar, and adjusting the gamma voltage according to the height of the sixth sub-metal pillar.

[0034] To solve the above technical problems, the second technical solution provided by this application is: to provide an array substrate, where the array substrate includes:

[0035] A first metal layer, a gate insulating layer, a second metal layer, and a passivation layer that are sequentially stacked;

[0036] Wherein, the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights; the first metal pillars are used to adjust the gamma voltage;

[0037] The second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights; the second metal pillars are used to adjust the gamma voltage.

[0038] Wherein, the array substrate has a display area and a non-display area, and the first metal pillars and the second metal pillars are both located in the non-display area.

[0039] Wherein, the height of one of the first metal pillars with different heights is a first preset thickness value of the gate insulating layer; the height of one of the second metal pillars with different heights is a second preset thickness value of the passivation layer.

[0040] The beneficial effects of this application: Different from the prior art, this application provides a gamma adjustment method and an array substrate. The gamma adjustment method is applied to the array substrate. The gamma adjustment method includes: preparing a first metal layer, and the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights; preparing a gate insulating layer, and the gate insulating layer surrounds the first metal pillars and exposes at least one first metal pillar; adjusting the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar; preparing a second metal layer, and the second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights; preparing a passivation layer, and the passivation layer surrounds the second metal pillars and exposes at least one second metal pillar; adjusting the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar. Through the first metal pillars and the second metal pillars, gamma unified adjustment can be performed on products with the same film thickness during the manufacturing process, and the problem of gamma value exceeding the specification due to uneven film thickness can be avoided. Description of the Drawings

[0041] In order to more clearly illustrate the technical solutions in the embodiments of this application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of this application. For those of ordinary skill in the art, without any creative effort, other drawings can also be obtained based on these drawings.

[0042] Figure 1It is a schematic flowchart of an embodiment of the gamma debugging method provided by this application;

[0043] Figure 2 is Figure 1 the corresponding structural schematic diagram of step S10 in

[0044] Figure 3 is Figure 1 the corresponding structural schematic diagram of step S20 in

[0045] Figure 4 is Figure 1 the corresponding structural schematic diagram of step S40 in

[0046] Figure 5 is Figure 1 the corresponding structural schematic diagram of step S50 in

[0047] Figure 6 It is a structural schematic diagram of an embodiment of the array substrate provided by this application.

[0048] Explanation of the reference numerals in the drawings:

[0049] Array substrate 100, substrate 10, first metal layer 20, gate 21, first metal pillar 22, first metal pillar group 23, first sub-metal pillar 231, second sub-metal pillar 232, third sub-metal pillar 233, gate insulating layer 30, second metal layer 40, electrode layer 41, source electrode 411, drain electrode 412, second metal pillar 42, second metal pillar group 43, fourth sub-metal pillar 431, fifth sub-metal pillar 432, sixth sub-metal pillar 433, passivation layer 50, active layer 60, display area 101, non-display area 102. Detailed implementation manners

[0050] Next, in combination with the drawings in the embodiments of this application, the solutions in the embodiments of this application will be described in detail.

[0051] In the following description, for the purpose of illustration rather than limitation, specific details such as specific system structures, interfaces, and technologies are presented to thoroughly understand this application.

[0052] Next, in combination with the drawings in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0053] The terms "first", "second", and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", and "third" may explicitly or implicitly include at least one of such features. In the description of this application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined. All directional indications (such as up, down, left, right, front, back...) in the embodiments of this application are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will change accordingly. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally further include steps or units not listed, or may optionally further include other steps or units inherent to these processes, methods, products, or devices.

[0054] Reference to "an embodiment" herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of this application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0055] Please refer to Figure 1 , Figure 1 which is a schematic flowchart of an implementation manner of the gamma debugging method provided by this application.

[0056] This application provides a gamma debugging method, and the gamma debugging method is applied to the array substrate 100 (as Figure 6 shown).

[0057] The specific steps of the gamma debugging method are as follows:

[0058] Please refer to Figure 2 and Figure 3 , Figure 2 is Figure 1 the schematic structural diagram corresponding to step S10 in Figure 3 is Figure 1 the schematic structural diagram corresponding to step S20 in

[0059] S10: Prepare a first metal layer, and the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights.

[0060] Specifically, a first metal layer 20 is prepared on the substrate 10, and the first metal layer 20 forms a gate 21 and a plurality of first metal posts 22. That is to say, the gate 21 and the plurality of first metal posts 22 are formed by patterning the first metal layer 20. The gate 21 is insulated from and spaced apart from the first metal posts 22. The height of the first metal posts 22 is greater than the thickness of the gate 21. At least some of the first metal posts 22 have different heights. That is to say, the heights of some of the first metal posts 22 may be the same, and the heights of some of the first metal posts 22 may be different. The shape of the first metal posts 22 may be a cuboid, a cylinder, a prism, or other three-dimensional structures, which are not limited here and are selected according to actual needs. The spacing between the first metal posts 22 may be the same or different, and is selected according to actual needs. In this embodiment, the shape of the first metal posts 22 is a cuboid. The height direction of the first metal posts 22 is perpendicular to the substrate 10.

[0061] Further, the first metal posts 22 with different heights correspond to gate insulating layers 30 with different thicknesses to correspond to different gamma values. That is, the height of the first metal posts 22 can be designed according to actual needs. Among them, the height of one of the first metal posts 22 with different heights is the first preset thickness value of the gate insulating layer 30. That is to say, when the height of the first metal posts 22 is the first preset thickness value, the corresponding gamma value is the preset gamma value.

[0062] It should be understood that at least some of the first metal posts 22 have different heights, and the height of one of the first metal posts 22 with different heights is the first preset thickness value of the gate insulating layer 30. That is to say, there is at least one first metal post 22 whose height is the first preset thickness value of the gate insulating layer 30.

[0063] The array substrate 100 has a display area 101 and a non-display area 102. The non-display area 102 is provided on at least one side of the display area 101, which is not limited here and is designed according to actual needs. The first metal posts 22 are provided in the non-display area 102.

[0064] In a specific embodiment, the first metal layer 20 forms at least one first metal pillar group 23, and the first metal pillar group 23 includes a plurality of first metal pillars 22 with different heights. Among them, in each first metal pillar group 23, the height of one first metal pillar 22 is equal to the first preset thickness value of the gate insulating layer 30, and the heights of the remaining first metal pillars 22 are either greater than or less than the first preset thickness value of the gate insulating layer 30. In each first metal pillar group 23, the number of first metal pillars 22 can be the same or different. In each first metal pillar group 23, the spacing between the first metal pillars 22 can be equal or unequal; the spacing between the first metal pillar groups 23 can be equal or unequal, and there is no limitation here, and it can be selected according to actual needs.

[0065] In this embodiment, a group of three first metal pillars 22 will be described in detail. Specifically, the first metal pillar group 23 includes three first metal pillars 22 with different heights, and the three first metal pillars 22 with different heights are respectively a first sub-metal pillar 231, a second sub-metal pillar 232, and a third sub-metal pillar 233.

[0066] Among them, the height of the first sub-metal pillar 231 is greater than the height of the second sub-metal pillar 232, and the height of the second sub-metal pillar 232 is greater than the height of the third sub-metal pillar 233. The height of the second sub-metal pillar 232 is equal to the first preset thickness value of the gate insulating layer 30.

[0067] S20: Prepare a gate insulating layer, and the gate insulating layer surrounds the first metal pillar and exposes at least one first metal pillar.

[0068] Specifically, the gate insulating layer 30 is prepared on the side of the first metal layer 20 away from the substrate 10. The gate insulating layer 30 covers the gate 21 and is disposed around the first metal pillar 22. That is, the gate insulating layer 30 fills the gap between the gate 21 and the first metal pillar 22, as well as the gap between the first metal pillars 22. The gate insulating layer 30 exposes at least one first metal pillar 22. That is to say, the height of at least part of the first metal pillars 22 is greater than or equal to the height of the gate insulating layer 30, so as to ensure that one end of at least one first metal pillar 22 away from the substrate 10 can be exposed from the gate insulating layer 30, which is convenient for subsequent implementation of subsequent steps.

[0069] The thickness of the gate insulating layer 30 affects the magnitude of the gamma value. When the thickness of the gate insulating layer 30 is the first preset thickness value, the gamma value is the preset gamma value. When the thickness of the gate insulating layer 30 is greater than the first preset thickness value, the gamma value will be greater than the preset gamma value. When the thickness of the gate insulating layer 30 is less than the first preset thickness value, the gamma value will be less than the preset gamma value. The preset gamma value can be a fixed value or a range value, which is not limited here and is selected according to actual requirements. For example, the preset gamma value can be 2.2 or 2.2 ± 0.2. The preset gamma value can also be other fixed values or range values, which are selected according to actual requirements.

[0070] S30: Adjust the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar.

[0071] Specifically, compare the thickness of the gate insulating layer 30 with the height of the first metal pillar 22, measure the resistance value of the first metal pillar 22 exposed to the gate insulating layer 30, and determine the height of the first metal pillar 22 according to the resistance value of the first metal pillar 22. Adjust the gamma voltage according to the height of the first metal pillar 22 so that the gamma value meets the preset gamma value.

[0072] Furthermore, determine the height of the first metal pillar 22 by measuring the resistance value of the first metal pillar 22. Compare the thickness of the gate insulating layer 30 with the height of the first metal pillar 22, observe the first metal pillar 22 exposed to the gate insulating layer 30, and selectively measure the first metal pillar 22 exposed to the gate insulating layer 30. That is to say, not all the first metal pillars 22 exposed to the gate insulating layer 30 are measured, but according to the relationship between the thickness of the gate insulating layer 30 and the height of the first metal pillar 22, judge the direction of adjusting the gamma voltage, and then adjust the gamma voltage so that the gamma value meets the preset gamma value.

[0073] In this embodiment, when the thickness of the gate insulating layer 30 is equal to the height of the second sub-metal pillar 232, that is, the first sub-metal pillar 231 and the second sub-metal pillar 232 are exposed to the gate insulating layer 30, the gamma value is equal to the preset gamma value and the gamma voltage is not adjusted.

[0074] When the thickness of the gate insulating layer 30 is greater than the height of the second sub-metal pillar 232 and less than or equal to the height of the first sub-metal pillar 231, that is, the first sub-metal pillar 231 is exposed to the gate insulating layer 30, the thickness of the gate insulating layer 30 is too thick. Measure the resistance value of the first sub-metal pillar 231 and determine the height of the first sub-metal pillar 231, and adjust the gamma voltage according to the height of the first sub-metal pillar 231.

[0075] When the thickness of the gate insulating layer 30 is less than the height of the second sub-metal pillar 232 and greater than the height of the third sub-metal pillar 233, that is, the first sub-metal pillar 231 and the second sub-metal pillar 232 are exposed to the gate insulating layer 30, the thickness of the gate insulating layer 30 is relatively thin. Measure the resistance value of the second sub-metal pillar 232 and determine the height of the second sub-metal pillar 232, and adjust the gamma voltage according to the height of the second sub-metal pillar 232.

[0076] When the thickness of the gate insulating layer 30 is less than or equal to the height of the third sub-metal pillar 233, that is, the first sub-metal pillar 231, the second sub-metal pillar 232, and the third sub-metal pillar 233 are all exposed to the gate insulating layer 30, the thickness of the gate insulating layer 30 is relatively thin. Measure the resistance value of the third sub-metal pillar 233 and determine the height of the third sub-metal pillar 233, and adjust the gamma voltage according to the height of the third sub-metal pillar 233.

[0077] During the process of manufacturing the array substrate 100, a first metal pillar 22 on the same layer as the gate 21 is set, and the thickness of the gate insulating layer 30 is monitored by comparing the height of the first metal pillar 22 and the thickness of the gate insulating layer 30, so as to judge whether the thickness of the gate insulating layer 30 is appropriate and determine the direction of adjusting the gamma voltage, thereby ensuring that the gamma value does not exceed the specification. That is, gamma unified debugging can be performed for products with the same film thickness, and the problem of gamma exceeding the specification caused by different gamma voltage values corresponding to uneven film thickness can be avoided.

[0078] Please refer to Figure 2 、 Figure 4 and Figure 5 , Figure 4 is Figure 1 the structural schematic diagram corresponding to step S40 in Figure 5 is Figure 1 the structural schematic diagram corresponding to step S50 in

[0079] S40: Prepare a second metal layer, and the second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights.

[0080] Specifically, a second metal layer 40 is prepared on the side of the gate insulating layer 30 away from the substrate 10. The second metal layer 40 forms an electrode layer 41 and a plurality of second metal posts 42. That is to say, the electrode layer 41 and the plurality of second metal posts 42 are formed by patterning the second metal layer 40. The electrode layer 41 includes a source electrode 411 and a drain electrode 412. The electrode layer 41 is insulated from and spaced apart from the second metal posts 42. The height of the second metal posts 42 is greater than the thickness of the electrode layer 41. At least some of the second metal posts 42 have different heights. That is to say, the heights of some of the second metal posts 42 can be the same, and the heights of some of the metal posts can be different. The shape of the second metal posts 42 can be a cuboid, a cylinder, a prism or other three-dimensional structures, which are not limited here and can be selected according to actual needs. The spacing between the second metal posts 42 can be the same or different, and can be selected according to actual needs. In this embodiment, the shape of the second metal posts 42 is a cuboid. The height direction of the second metal posts 42 is perpendicular to the substrate 10. The second metal posts 42 are disposed in the non-display area 102.

[0081] Further, the second metal posts 42 with different heights correspond to passivation layers 50 with different thicknesses to correspond to different gamma values. That is, the height of the second metal posts 42 can be designed according to actual needs. Among them, the height of one of the second metal posts 42 with different heights is the second preset thickness value of the passivation layer 50. That is to say, when the height of the second metal posts 42 is the second preset thickness value, the corresponding gamma value is the preset gamma value.

[0082] It should be understood that at least some of the second metal posts 42 have different heights, and the height of one of the second metal posts 42 with different heights is the second preset thickness value of the passivation layer 50. That is to say, there is at least one second metal post 42 whose height is the second preset thickness value of the passivation layer 50.

[0083] In the direction perpendicular to the substrate 10, the second metal posts 42 and the first metal posts 22 can be disposed opposite to each other or overlapped, which is not limited here and can be selected according to actual needs.

[0084] In a specific embodiment, the second metal layer 40 forms at least one second metal pillar group 43, and the second metal pillar group 43 includes a plurality of second metal pillars 42 with different heights. Among them, in each second metal pillar group 43, the height of one second metal pillar 42 is equal to the second preset thickness value of the passivation layer 50, and the heights of the remaining second metal pillars 42 are either greater than or less than the second preset thickness value of the passivation layer 50. In each second metal pillar group 43, the number of second metal pillars 42 can be the same or different. In each second metal pillar group 43, the spacing between the second metal pillars 42 can be equal or unequal; the spacing between the second metal pillar groups 43 can be equal or unequal, which is not limited here and can be selected according to actual needs.

[0085] In this embodiment, a group of three second metal pillars 42 will be described in detail. Specifically, the second metal pillar group 43 includes three second metal pillars 42 with different heights, and the three second metal pillars 42 with different heights are respectively a fourth sub-metal pillar 431, a fifth sub-metal pillar 432, and a sixth sub-metal pillar 433. Among them, the height of the fourth sub-metal pillar 431 is greater than the height of the fifth sub-metal pillar 432, and the height of the fifth sub-metal pillar 432 is greater than the height of the sixth sub-metal pillar 433. The height of the fifth sub-metal pillar 432 is equal to the second preset thickness value of the passivation layer 50.

[0086] It should be noted that an active layer 60 is further provided between the electrode layer 41 and the gate insulating layer 30. Similar to the existing structure, it will not be elaborated here too much. Please refer to the prior art.

[0087] S50: Prepare a passivation layer, and the passivation layer surrounds the second metal pillar and exposes at least one second metal pillar.

[0088] Specifically, the passivation layer 50 is prepared on the side of the second metal layer 40 away from the substrate 10. The passivation layer 50 covers the electrode layer 41 and is disposed around the second metal pillar 42. That is, the passivation layer 50 fills the gap between the electrode layer 41 and the second metal pillar 42, as well as the gap between the second metal pillars 42. The passivation layer 50 exposes at least one second metal pillar 42. That is to say, the height of at least part of the second metal pillars 42 is greater than or equal to the height of the passivation layer 50 to ensure that one end of at least one second metal pillar 42 away from the substrate 10 can be exposed from the passivation layer 50, facilitating the subsequent implementation of subsequent steps.

[0089] The thickness of the passivation layer 50 affects the value of gamma. When the thickness of the passivation layer 50 is the second preset thickness value, the gamma value is the preset gamma value. When the thickness of the passivation layer 50 is greater than the second preset thickness value, the gamma value will be greater than the preset gamma value. When the thickness of the passivation layer 50 is less than the second preset thickness value, the gamma value will be less than the preset gamma value.

[0090] S60: Adjust the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar.

[0091] Specifically, compare the thickness of the passivation layer 50 with the height of the second metal pillar 42, measure the resistance value of the second metal pillar 42 exposed in the passivation layer 50, and determine the height of the second metal pillar 42 according to the resistance value of the second metal pillar 42. Adjust the gamma voltage according to the height of the second metal pillar 42 to make the gamma value meet the preset gamma value.

[0092] That is to say, by measuring the resistance value of the second metal pillar 42, the height of the second metal pillar 42 is determined. Compare the thickness of the passivation layer 50 with the height of the second metal pillar 42, observe the second metal pillar 42 exposed in the passivation layer 50, and selectively measure the second metal pillar 42 exposed in the passivation layer 50. That is to say, not all the second metal pillars 42 exposed in the passivation layer 50 are measured, but according to the relationship between the thickness of the passivation layer 50 and the height of the second metal pillar 42, judge the direction of adjusting the gamma voltage, and then adjust the gamma voltage to make the gamma value meet the preset gamma value.

[0093] In this embodiment, when the thickness of the passivation layer 50 is equal to the height of the fifth sub-metal pillar 432, that is, the fourth sub-metal pillar 431 and the fifth sub-metal pillar 432 are exposed in the passivation layer 50, the gamma value is equal to the preset gamma value, and the gamma voltage is not adjusted.

[0094] When the thickness of the passivation layer 50 is greater than the height of the fifth sub-metal pillar 432 and less than or equal to the height of the fourth sub-metal pillar 431, that is, the fourth sub-metal pillar 431 is exposed in the passivation layer 50, the thickness of the passivation layer 50 is too thick. Measure the resistance value of the fourth sub-metal pillar 431 and determine the height of the fourth sub-metal pillar 431, and adjust the gamma voltage according to the height of the fourth sub-metal pillar 431.

[0095] When the thickness of the passivation layer 50 is less than the height of the fifth sub-metal pillar 432 and greater than the height of the sixth sub-metal pillar 433, that is, the fourth sub-metal pillar 431 and the fifth sub-metal pillar 432 are exposed in the passivation layer 50, the thickness of the passivation layer 50 is too thin. Measure the resistance value of the fifth sub-metal pillar 432 and determine the height of the fifth sub-metal pillar 432, and adjust the gamma voltage according to the height of the fifth sub-metal pillar 432.

[0096] When the thickness of the passivation layer 50 is less than or equal to the height of the sixth sub-metal pillar 433, that is, the fourth sub-metal pillar 431, the fifth sub-metal pillar 432 and the sixth sub-metal pillar 433 are all exposed in the passivation layer 50, the thickness of the passivation layer 50 is too thin. Measure the resistance value of the sixth sub-metal pillar 433 and determine the height of the sixth sub-metal pillar 433, and adjust the gamma voltage according to the height of the sixth sub-metal pillar 433.

[0097] During the process of manufacturing the array substrate 100, a second metal pillar 42 on the same layer as the electrode layer 41 is provided, and the thickness of the passivation layer 50 is monitored by comparing the height of the second metal pillar 42 and the thickness of the passivation layer 50, so as to determine whether the thickness of the passivation layer 50 is appropriate and the direction of adjusting the gamma voltage, thereby ensuring that the gamma value does not exceed the specification. That is, for products with the same film thickness, gamma can be uniformly adjusted, and the problem of gamma exceeding the specification caused by uneven film thickness corresponding to a version of gamma voltage values can be avoided.

[0098] The present application provides a gamma debugging method. The gamma debugging method is applied to the array substrate 100. The gamma debugging method includes: preparing a first metal layer 20, and the first metal layer 20 forms a gate 21 and a plurality of first metal pillars 22; the heights of at least some of the first metal pillars 22 are different; preparing a gate insulating layer 30, and the gate insulating layer 30 surrounds the first metal pillars 22 and exposes at least one first metal pillar 22; debugging the gamma voltage according to the thickness of the gate insulating layer 30 and the height of the first metal pillar 22; preparing a second metal layer 40, and the second metal layer 40 forms an electrode layer 41 and a plurality of second metal pillars 42; the heights of at least some of the second metal pillars 42 are different; preparing a passivation layer 50, and the passivation layer 50 surrounds the second metal pillars 42 and exposes at least one second metal pillar 42; debugging the gamma voltage according to the thickness of the passivation layer 50 and the height of the second metal pillar 42. Through the first metal pillar 22 and the second metal pillar 42, for products with the same film thickness, the gamma voltage can be uniformly adjusted during the manufacturing process, and the problem of gamma exceeding the specification caused by uneven film thickness corresponding to different gamma voltage values can be avoided.

[0099] Please refer to Figure 6 , Figure 6 which is a schematic structural diagram of an embodiment of the array substrate provided by the present application.

[0100] The present application also provides an array substrate 100, which includes a substrate 10, a first metal layer 20, a gate insulating layer 30, a second metal layer 40, and a passivation layer 50 that are sequentially stacked. Among them, the first metal layer 20 forms a gate 21 and a plurality of first metal pillars 22. The heights of at least some of the first metal pillars 22 are different. The first metal pillar 22 is used to debug the gamma voltage. The second metal layer 40 forms an electrode layer 41 and a plurality of second metal pillars 42. The heights of at least some of the second metal pillars 42 are different. The second metal pillar 42 is used to debug the gamma voltage.

[0101] Furthermore, the array substrate 100 has a display area 101 and a non-display area 102, and both the first metal pillar 22 and the second metal pillar 42 are located in the non-display area 102. The height of one of the first metal pillars 22 with different heights is the first preset thickness value of the gate insulating layer 30; the height of one of the second metal pillars 42 with different heights is the second preset thickness value of the passivation layer 50. In the direction perpendicular to the substrate 10, the second metal pillar 42 and the first metal pillar 22 may be arranged opposite to each other or may overlap, and there is no limitation here, and it can be selected according to actual requirements.

[0102] The above are only the embodiments of the present application, and do not limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A gamma debugging method, applied to an array substrate, characterized in that The gamma debugging method includes: Preparing a first metal layer, where the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights; Preparing a gate insulating layer, and the gate insulating layer surrounds the first metal pillars and exposes at least one of the first metal pillars; the first metal pillars with different heights correspond to gate insulating layers with different thicknesses to correspond to different gamma values; among them, the height of one of the first metal pillars with different heights is the first preset thickness value of the gate insulating layer; Debugging the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar; where the debugging the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar includes: comparing the thickness of the gate insulating layer and the height of the first metal pillar, measuring the resistance value of the first metal pillar exposed to the gate insulating layer, and determining the height of the first metal pillar according to the resistance value of the first metal pillar; adjusting the gamma voltage according to the height of the first metal pillar so that the gamma value meets the preset gamma value; Preparing a second metal layer, where the second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights; Preparing a passivation layer, and the passivation layer surrounds the second metal pillars and exposes at least one of the second metal pillars; the second metal pillars with different heights correspond to passivation layers with different thicknesses to correspond to different gamma values; among them, the height of one of the second metal pillars with different heights is the second preset thickness value of the passivation layer; Debugging the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar; where the debugging the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar includes: comparing the thickness of the passivation layer and the height of the second metal pillar, measuring the resistance value of the second metal pillar exposed to the passivation layer, and determining the height of the second metal pillar according to the resistance value of the second metal pillar; adjusting the gamma voltage according to the height of the second metal pillar so that the gamma value meets the preset gamma value.

2. The gamma debugging method according to claim 1, wherein The array substrate has a display area and a non-display area, and the first metal pillars are arranged in the non-display area.

3. The gamma debugging method according to claim 2, wherein The first metal layer forms at least one first metal pillar group, and the first metal pillar group includes three first metal pillars with different heights, namely a first sub-metal pillar, a second sub-metal pillar, and a third sub-metal pillar; among them, the height of the first sub-metal pillar is greater than the height of the second sub-metal pillar, the height of the second sub-metal pillar is greater than the height of the third sub-metal pillar; the height of the second sub-metal pillar is equal to the first preset thickness value of the gate insulating layer; The debugging the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar specifically includes: When the thickness of the gate insulating layer is equal to the height of the second sub-metal pillar, the gamma voltage is not adjusted; The thickness of the gate insulating layer is greater than the height of the second sub-metal pillar and less than or equal to the height of the first sub-metal pillar. Measure the resistance value of the first sub-metal pillar and determine the height of the first sub-metal pillar, and adjust the gamma voltage according to the height of the first sub-metal pillar; The thickness of the gate insulating layer is less than the height of the second sub-metal pillar and greater than the height of the third sub-metal pillar. Measure the resistance value of the second sub-metal pillar and determine the height of the second sub-metal pillar, and adjust the gamma voltage according to the height of the second sub-metal pillar; The thickness of the gate insulating layer is less than or equal to the height of the third sub-metal pillar. Measure the resistance value of the third sub-metal pillar and determine the height of the third sub-metal pillar, and adjust the gamma voltage according to the height of the third sub-metal pillar.

4. The gamma debugging method according to claim 1, characterized in that The array substrate has a display area and a non-display area, and the second metal pillar is disposed in the non-display area.

5. The gamma debugging method according to claim 4, characterized in that, The second metal layer forms at least one second metal pillar group, and the second metal pillar group includes three second metal pillars with different heights, namely a fourth sub-metal pillar, a fifth sub-metal pillar, and a sixth sub-metal pillar; wherein, the height of the fourth sub-metal pillar is greater than the height of the fifth sub-metal pillar, the height of the fifth sub-metal pillar is greater than the height of the sixth sub-metal pillar; the height of the fifth sub-metal pillar is equal to the second preset thickness value of the passivation layer; The debugging of the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar specifically includes: When the thickness of the passivation layer is equal to the height of the fifth sub-metal pillar, the gamma voltage is not adjusted; When the thickness of the passivation layer is greater than the height of the fifth sub-metal pillar and less than or equal to the height of the fourth sub-metal pillar, measure the resistance value of the fourth sub-metal pillar and determine the height of the fourth sub-metal pillar, and adjust the gamma voltage according to the height of the fourth sub-metal pillar; When the thickness of the passivation layer is less than the height of the fifth sub-metal pillar and greater than the height of the sixth sub-metal pillar, measure the resistance value of the fifth sub-metal pillar and determine the height of the fifth sub-metal pillar, and adjust the gamma voltage according to the height of the fifth sub-metal pillar; When the thickness of the passivation layer is less than or equal to the height of the sixth sub-metal pillar, measure the resistance value of the sixth sub-metal pillar and determine the height of the sixth sub-metal pillar, and adjust the gamma voltage according to the height of the sixth sub-metal pillar.

6. An array substrate, characterized in that, The array substrate includes: A first metal layer, a gate insulating layer, a second metal layer, and a passivation layer that are sequentially stacked; Wherein, the first metal layer forms a gate and a plurality of first metal pillars; at least some of the first metal pillars have different heights; the first metal pillars with different heights correspond to gate insulating layers with different thicknesses to correspond to different gamma values; Among them, adjusting the gamma voltage according to the thickness of the gate insulating layer and the height of the first metal pillar includes: comparing the thickness of the gate insulating layer and the height of the first metal pillar, measuring the resistance value of the first metal pillar exposed to the gate insulating layer, and determining the height of the first metal pillar according to the resistance value of the first metal pillar; adjusting the gamma voltage according to the height of the first metal pillar so that the gamma value meets a preset gamma value; The second metal layer forms an electrode layer and a plurality of second metal pillars; at least some of the second metal pillars have different heights; the second metal pillars with different heights correspond to different thicknesses of the passivation layer to correspond to different gamma values; Among them, adjusting the gamma voltage according to the thickness of the passivation layer and the height of the second metal pillar includes: comparing the thickness of the passivation layer and the height of the second metal pillar, measuring the resistance value of the second metal pillar exposed to the passivation layer, and determining the height of the second metal pillar according to the resistance value of the second metal pillar; adjusting the gamma voltage according to the height of the second metal pillar so that the gamma value meets a preset gamma value.

7. The array substrate according to claim 6, wherein The array substrate has a display area and a non-display area, and the first metal pillar and the second metal pillar are both located in the non-display area.

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