Method for preparing multilayer ceramic capacitor with high-precision stacking of internal electrodes, preparation device and electronic equipment, and multilayer ceramic capacitor with high-precision stacking of internal electrodes

Abstract

The invention discloses a preparation method of a chip-type multilayer ceramic capacitor with high-precision stacking of inner electrodes, comprising: peeling off a multilayer printed sheet with inner electrodes and dielectrics printed thereon from a PET film by using a gold mold; placing four inner walls and four outer walls around the inner electrodes of each layer of the printed sheet, placing an upper and a lower inner wall parallel to the long axis direction of the inner electrode, placing an upper outer wall at a certain distance outside the upper inner wall, and placing a lower outer wall at a certain distance outside the lower inner wall; placing a left and a right inner wall parallel to the short axis direction of the inner electrode, placing a left outer wall at a certain distance outside the left inner wall, and placing a right outer wall at a certain distance outside the right inner wall; stacking the multilayer printed sheets in an offset manner and covering them with upper and lower protective covers; isostatically pressing the multilayer printed sheets covered with the upper and lower protective covers; cutting the printed sheets at preset cutting points to obtain stacked multilayer printed sheets. The invention can be widely applied to the field of chip-type multilayer ceramic capacitors.

Description

Technical Field

[0001] The present invention relates to the technical field of chip-type multilayer ceramic capacitors, and in particular to a preparation method, a preparation device and an electronic device for a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, and a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes. Background Art

[0002] Multi-layer ceramic capacitors (MLCC) are one of the commonly used electronic components. They play an important role in isolating DC, passing AC and storing energy in circuits. They are widely used in home appliances, mobile phones, computers and other intelligent control circuits. In recent years, MLCC has been increasingly developed towards thinner and more multi-layered to meet technological development and market demand. One of the biggest problems encountered in the development of thin-layer and multi-layer MLCC is the stacking accuracy problem. For products with electrode layers ≥ 100 layers, during the stacking process, because the electrode block is one layer thicker than the exposed dielectric, the stacking pressure is mainly concentrated on the part with the printed inner electrode. The non-printed inner electrode part is not pressed tightly, and the edge of the gold mold is not pressed tightly, which is easy to be overturned and cause folding, resulting in defects. In addition, because the product bar blocks have a certain thickness after stacking, there is a certain pressure on the side during the isostatic pressing process. Because the cumulative height of the electrode blocks after stacking is larger than the exposed dielectric position, during the hydrostatic pressing process, the position where the stacking is not dense is prone to shrinkage and deformation to varying degrees under the action of force, which is reflected in the chip-type multilayer ceramic capacitor as the corner position of the chip-type multilayer ceramic capacitor is twisted and deformed, resulting in a low qualified rate of chip-type multilayer ceramic capacitor cutting. Summary of the invention

[0003] In view of this, an embodiment of the present invention provides a method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes, a preparation device and an electronic device, and a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes, so as to reduce the peeling defect rate of the chip-type multilayer ceramic capacitor and avoid deformation during the stacking process, thereby improving the stacking accuracy of the chip-type multilayer ceramic capacitor.

[0004] One aspect of an embodiment of the present invention provides a method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, comprising:

[0005] The multi-layer printed sheet with internal electrodes and dielectrics is peeled off from the PET film using a gold stamp;

[0006] Among them, four inner walls and four outer walls are placed around the inner electrode of each printed sheet, the upper and lower inner walls are placed parallel to the long axis direction of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis direction of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance; each outer wall and each inner wall are inner electrodes of specific sizes;

[0007] Stacking multiple layers of printed sheets in an offset manner on the lower protective cover, and covering the uppermost printed sheet with the protective cover;

[0008] isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers;

[0009] The printed sheets are cut at preset cutting points to obtain stacked multi-layer printed sheets.

[0010] Preferably, the dimensional relationship of each wall of each layer of printed sheet satisfies G+E=D, 0≤E<D, wherein the end distance of the inner electrodes of each layer of printed sheet is D, the spacing between the left inner wall and the left outer wall, or the spacing between the right inner wall and the right outer wall is E, and the width of the left and right inner walls of each layer of printed sheet is G.

[0011] Preferably, the cutting at a preset cutting point of the printed sheet includes:

[0012] Cut the printed sheet along the gap between the lower inner wall and the lower outer wall, parallel to the lower inner wall;

[0013] Along the gap between the lower inner wall and the lower outer wall, starting from the center of the first blank space on the left, cut the printed piece parallel to the left inner wall.

[0014] Preferably, the dimensional relationship of each wall of each layer of printed sheet satisfies A+B=C, 0<B<C, wherein the width of the upper and lower inner walls of each layer of printed sheet is A, the spacing between the upper inner wall and the upper outer wall, or the spacing between the lower inner wall and the lower outer wall is B, and the sum of the widths of the inner electrode and the electrolyte is C.

[0015] Preferably, the cutting at a preset cutting point of the printed sheet includes:

[0016] Cut the printed piece along the leftmost blank center of the lower exterior wall, parallel to the left interior wall;

[0017] Cut the printed sheet along the gap between the lower inner wall and the lower outer wall, parallel to the lower inner wall.

[0018] Preferably, the width of the cutting groove of the printed sheet cut in a direction parallel to the lower inner wall is less than or equal to the width of the gap between the lower inner wall and the lower outer wall.

[0019] Preferably, the width of the cutting groove of the printed sheet cut in a direction parallel to the left inner wall is less than or equal to the width of the gap between the inner electrode and the left inner wall.

[0020] Another aspect of the embodiment of the present invention further provides a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, which is prepared by the above-mentioned method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, comprising:

[0021] The invention discloses a multi-layer printed sheet stacked in an offset manner, wherein each layer of the printed sheet is printed with an inner electrode and a dielectric, and the multi-layer printed sheet is stacked and cut according to four inner walls and four outer walls placed around the inner electrode of each layer of the printed sheet.

[0022] Another aspect of the embodiments of the present invention further provides a device for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, comprising:

[0023] A peeling unit is used to peel off the multi-layer printed sheet with internal electrodes and dielectrics from the PET film using a gold mold;

[0024] Among them, four inner walls and four outer walls are placed around the inner electrode of each printed sheet, the upper and lower inner walls are placed parallel to the long axis direction of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis direction of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance; each outer wall and each inner wall are inner electrodes of specific sizes;

[0025] A protective cover covering unit, used for stacking the multiple layers of printed sheets on the lower protective cover in an offset manner, and covering the uppermost printed sheet with the upper protective cover;

[0026] A static pressure pressing unit for isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers;

[0027] The cutting unit is used for cutting the printed sheet at a preset cutting point to obtain a stacked multi-layer printed sheet.

[0028] Another aspect of an embodiment of the present invention further provides an electronic device, including a processor and a memory;

[0029] The memory is used to store programs;

[0030] The processor executes the program to implement the above method.

[0031] Another aspect of an embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the above method.

[0032] The embodiment of the present invention also discloses a computer program product or a computer program, which includes a computer instruction stored in a computer-readable storage medium. A processor of a computer device can read the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes the above method.

[0033] The present invention uses a gold mold to peel off a multi-layer printed sheet with internal electrodes and dielectrics from a PET film. Since four inner walls and four outer walls are designed at the edge of the internal electrode pattern of each layer of the printed sheet, the inner electrode thickness difference between the electrode block and the exposed dielectric at the edge of the internal electrode pattern is basically eliminated due to the existence of the protective wall. Therefore, the edge of the electrode layer can be tightly attached to the surface of the gold mold during peeling, thereby improving the peeling yield rate. At the same time, there is no height difference between the electrode block and the exposed dielectric in the overlapping part during the stacking process, so the overlapping part is completely compacted during the stacking process. The four inner walls and the four outer walls firmly fix the periphery of the chip-type multilayer ceramic capacitor to prevent it from being lifted during the stacking process and causing poor folding. During the isostatic pressing process, the protective wall increases the compacted area of ​​the edge of the chip-type multilayer ceramic capacitor, can effectively resist the force from the side, reduce the product deformation during the pressing process, and can improve the cutting qualification rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 A schematic flow chart of a method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes provided by an embodiment of the present invention;

[0036] Figure 2 A schematic diagram of a printed sheet composed of a dielectric layer printed with an inner electrode provided by an embodiment of the present invention;

[0037] Figure 3 A schematic diagram of a printed sheet with four inner walls and four outer walls provided by an embodiment of the present invention;

[0038] Figure 4 A method provided by an embodiment of the present invention Figure 3 Sectional view of AA in the middle;

[0039] Figure 5 A specific example diagram of peeling a printed sheet from a PET film provided by an embodiment of the present invention;

[0040] Figure 6 A specific example diagram of a chip-type multilayer ceramic capacitor subjected to stress provided by an embodiment of the present invention;

[0041] Figure 7 A specific example diagram of placing a protective wall provided by an embodiment of the present invention;

[0042] Figure 8 A specific example diagram of a printed sheet cutting slot provided by an embodiment of the present invention;

[0043] Fig. 9 A specific example diagram of a long-axis offset isostatic pressing provided by an embodiment of the present invention;

[0044] Fig.10 A specific example diagram of short-axis offset isostatic pressing provided by an embodiment of the present invention;

[0045] Fig.11 A comparison example diagram of various indicators of a chip-type multilayer ceramic capacitor when the method of the present invention is applied and when the method of the present invention is not applied is provided in an embodiment of the present invention;

[0046] Fig.12 A structural block diagram of a device for preparing a chip-type multilayer ceramic capacitor with high-precision stacked inner electrodes provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0048] Reference Figure 1 The embodiment of the present invention provides a method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, which specifically includes the following steps:

[0049] First, the printed sheet of each layer of the present invention is described, referring to Figure 2 , an embodiment of the present invention provides a schematic diagram of a printed sheet consisting of a dielectric layer with an inner electrode printed thereon, Figure 2 The printed sheet shown has no protective wall. Among them, 1 is an electrode block, that is, an inner electrode, 2 is an exposed dielectric, 3 is a black block parallel to the long axis of the electrode and marked by cutting, and 4 is a blank block parallel to the long axis of the electrode and marked by cutting.

[0050] Reference Figure 3, the embodiment of the present invention provides a schematic diagram of a printed sheet with four inner walls and four outer walls added. Among them, 5 is a protective wall a, 6 is a protective wall b, 7 is a protective wall c, 8 is a protective wall d, 9 is a cutting groove m, 10 is a cutting groove n, 5 and 7 are two inner walls respectively, and 6 and 8 are two outer walls respectively.

[0051] Figure 4 for Figure 3 Cross-sectional view of AA in the figure; when printing the inner electrode, the protective wall is printed on the dielectric layer, and the thickness of the protective wall is the same as the thickness of the inner electrode.

[0052] Four inner walls and four outer walls are placed around the inner electrode of each printed sheet. The upper and lower inner walls are placed parallel to the long axis of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance.

[0053] Step S100: peeling off the multi-layer printed sheet with internal electrodes and dielectrics from the PET film using a gold stamp.

[0054] Specifically, refer to Figure 4 , an embodiment of the present invention provides a specific example diagram of peeling a printed sheet from a PET film.

[0055] There are tiny holes on the contact surface between the upper gold mold and the cast dielectric film. During peeling, the upper gold mold is attached to the cast dielectric film with the inner electrode printed thereon and then vacuum is drawn. The upper gold mold can firmly grasp the film and then withdraw from the peeling platform from the right end to the left to separate the printed sheet from the PET and complete the peeling action. The present invention designs the following at the edge of the inner electrode pattern: Figure 3 As shown in the protective walls a~d of serial numbers 5~8, the existence of the protective walls basically eliminates the inner electrode thickness discontinuity that alternates between the electrode block 1 and the exposed dielectric 2 at the edge of the inner electrode. Therefore, during stripping, the edge of the electrode layer tightly adheres to the surface of the gold mold, thereby improving the stripping yield.

[0056] Step S110: Align and stack multiple layers of printed sheets on the lower protective cover, and cover the uppermost printed sheet with the protective cover.

[0057] Specifically, in the stacking process after peeling, if there is a misalignment in the long axis direction, the 5 protective walls a of the a' layer partially overlap with the 6 protective walls b of the b' layer, wherein the a' layer and the b' layer are two adjacent printed sheets; the 8 protective walls d of the a' layer completely overlap with the 8 protective walls d of the b' layer. If there is a misalignment in the short axis direction, the 6 protective walls b of the a' layer completely overlap with the 6 protective walls b of the b' layer, and the 8 protective walls d of the a' layer partially overlap with the 8 protective walls d of the b' layer. There is no height difference between the electrode block 1 and the exposed dielectric 2 in the overlapping part, so the overlapping part is completely compacted during the stacking process, like four walls, firmly fixing the periphery of the chip-type multilayer ceramic capacitor to prevent it from being lifted up during the stacking process, resulting in poor folding.

[0058] Step S120: isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers.

[0059] Specifically, refer to Figure 6 The present invention provides a specific example diagram of the stress on a chip-type multilayer ceramic capacitor, wherein 11 is an upper protective cover of the chip-type multilayer ceramic capacitor, 12 is a lower protective block of the chip-type multilayer ceramic capacitor, 13 is a blank block for cutting marks after stacking, and 14 is a carrier plate. During the isostatic pressing process, the side of the chip-type multilayer ceramic capacitor is subjected to a certain pressure due to the stacking thickness. The protective walls a~d with serial numbers 5~8 provided by the present invention increase the compacted area of ​​the edge of the chip-type multilayer ceramic capacitor in the overlapping part of the a' layer and the b' layer in the thickness direction after stacking, which can effectively resist the force from the side and reduce deformation during the pressing process, thereby improving the cutting qualification rate.

[0060] Step S130: cutting the printed sheet at preset cutting points to obtain a stacked multi-layer printed sheet.

[0061] In an optional implementation manner, the specific dimensions of the four inner walls and four outer walls designed by the present invention are as follows:

[0062] (1) In order to ensure that the 5-protection wall a of the a' layer and the 6-protection wall b of the b' layer overlap to the maximum extent after the long axis is misaligned during stacking, the size of the 5-protection wall a must satisfy G+E=D, 0≤E<D. When E=0, that is, G=D, the 5-protection wall a and the 6-protection wall b can be regarded as a whole. If E=D, that is, G=0, there is no 5-protection wall a. After the long axis is misaligned during stacking, the 5-protection wall a of the a' layer and the 6-protection wall b of the b' layer have no overlapping parts, such as Figure 7 As shown, an embodiment of the present invention provides a specific example diagram of placing a protective wall, and the product's ability to resist deformation is greatly reduced during the isostatic pressing process.

[0063] (2) In order to ensure that the 7-protection wall c of the a' layer and the 8-protection wall d of the b' layer overlap to the maximum extent after the misalignment in the short axis direction during stacking, the size of the 7-protection wall c must satisfy A+B=C, 0<B<C.

[0064] (3) To meet the visual recognition of the cutting machine after isostatic pressing, refer to Figure 8 , an embodiment of the present invention provides a specific example diagram of cutting slot points of a printed sheet, in which slotted areas 9 cutting slot m and 10 cutting slot n are designed.

[0065] ①Reference Fig. 9 , the embodiment of the present invention provides a specific example diagram of long-axis offset isostatic pressing, after long-axis offset isostatic pressing, Fig. 9 15 is used as a marking point to identify the trimming, and the trimming is performed along the trimming line of the blank center of 15 and parallel to the trimming line of the 7 protective wall c; 16 is used as a marking point to trim the trimming, and the trimming is performed along the trimming line of the blank center of 16 and parallel to the trimming line of the 5 protective wall a; after completing this step of cutting, the four sides of the product are all black and white edges, which can be identified and cut by the vision system of the cutting machine. Among them, 15 is the cutting groove m after stacking; 16 is the blank block for cutting the parallel long axis edge after stacking.

[0066] ②Reference Fig.10 , the embodiment of the present invention provides a specific example diagram of short-axis misalignment isostatic pressing, after short-axis misalignment isostatic pressing, Fig.10 17 is used as a marking point to identify the trimming, and the trimming is performed along the trimming line of the blank center of 17 and parallel to the 5th protective wall a; 18 is used as a marking point to trim the edge, and the trimming is performed along the trimming line of the blank center of 18 and parallel to the 7th protective wall c; after completing this step of cutting, the four sides of the product are all black and white edges, which can be identified and cut by the cutting machine's visual system. To ensure the trimming accuracy, the cutting is performed to Figure 8 The center line of the middle dimension B, the dimension H of the cutting groove m 9 must satisfy H≤B; similarly, the dimension J of the cutting groove n 10 must satisfy J≤K. Among them, 17 is the cutting groove n after stacking.

[0067] Furthermore, an embodiment of the present invention also provides a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, which is prepared by the above-mentioned method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, comprising:

[0068] The multi-layer printed sheets are neatly stacked, wherein each layer of the printed sheets is printed with an inner electrode and a dielectric, and the multi-layer printed sheets are stacked and cut according to four inner walls and four outer walls placed around the inner electrode of each layer of the printed sheets.

[0069] In order to describe the present invention in more detail, the practical application process of the present invention will be described below with specific examples.

[0070] Reference Fig.11 The present invention provides a comparative example diagram of various indicators of a chip-type multilayer ceramic capacitor when the method of the present invention is applied or not.

[0071] Specifically, the dielectric diaphragm is prepared by screen printing according to the method of the present invention, and the inner electrode slurry is printed on the dielectric diaphragm and then stacked, and the upper and lower protective layers and electrode layers are designed according to the specifications and capacitance of the chip-type multilayer ceramic capacitor for stacking; after the staggered stacking, isostatic pressing, cutting, debinding and sintering are performed to obtain the chip-type multilayer ceramic capacitor. The chip-type multilayer ceramic capacitor can be smoothly stacked, pressed and cut by printing and stacking according to the pattern designed by the present invention.

[0072] Reference Fig.12 The embodiment of the present invention provides a device for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, comprising:

[0073] A peeling unit is used to peel off the multi-layer printed sheet with internal electrodes and dielectrics from the PET film using a gold mold;

[0074] Among them, four inner walls and four outer walls are placed around the inner electrode of each printed sheet, the upper and lower inner walls are placed parallel to the long axis direction of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis direction of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance; each outer wall and each inner wall are inner electrodes of specific sizes;

[0075] A protective cover covering unit, used for stacking the multiple layers of printed sheets on the lower protective cover in an offset manner, and covering the uppermost printed sheet with the upper protective cover;

[0076] A static pressure pressing unit for isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers;

[0077] The cutting unit is used for cutting the printed sheet at a preset cutting point to obtain a stacked multi-layer printed sheet.

[0078] The embodiment of the present invention also discloses a computer program product or a computer program, wherein the computer program product or the computer program includes a computer instruction, and the computer instruction is stored in a computer-readable storage medium. A processor of a computer device can read the computer instruction from the computer-readable storage medium, and the processor executes the computer instruction, so that the computer device executes Figure 1 The method shown.

[0079] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0080] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features described may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions, and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0081] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0082] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.

[0083] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0084] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0085] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0086] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0087] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A method for preparing a chip-type multilayer ceramic capacitor with high-precision stacked internal electrodes, characterized in that: include: The multi-layer printed sheet with internal electrodes and dielectrics is peeled off from the PET film using a gold stamp; Among them, four inner walls and four outer walls are placed around the inner electrode of each printed sheet, the upper and lower inner walls are placed parallel to the long axis direction of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis direction of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance; each outer wall and each inner wall are inner electrodes of specific sizes; Stacking multiple layers of printed sheets in an offset manner on the lower protective cover, and covering the uppermost printed sheet with the protective cover; isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers; Cutting the printed sheet at a preset cutting point to obtain a stacked multi-layer printed sheet; The size relationship of each wall of each printed sheet satisfies G+E=D, 0≤E<D, wherein the distance between the ends of the inner electrodes of each printed sheet is D, the spacing between the left inner wall and the left outer wall, or the spacing between the right inner wall and the right outer wall is E, and the width of the left and right inner walls of each printed sheet is G; The dimensional relationship of each wall of each layer of printed sheet satisfies A+B=C, 0<B<C, wherein the width of the upper and lower inner walls of each layer of printed sheet is A, the spacing between the upper inner wall and the upper outer wall, or the spacing between the lower inner wall and the lower outer wall is B, and the sum of the widths of the inner electrode and the dielectric is C.

2. The method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes according to claim 1, characterized in that: The cutting at a preset cutting point of the printed sheet comprises: Cut the printed sheet along the gap between the lower inner wall and the lower outer wall, parallel to the lower inner wall; Along the gap between the lower inner wall and the lower outer wall, starting from the center of the first blank space on the left, cut the printed piece parallel to the left inner wall.

3. The method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes according to claim 1, characterized in that: The cutting at a preset cutting point of the printed sheet comprises: Cut the printed piece along the leftmost blank center of the lower exterior wall, parallel to the left interior wall; Cut the printed sheet along the gap between the lower inner wall and the lower outer wall, parallel to the lower inner wall.

4. The method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes according to any one of claims 1 to 3, characterized in that: The width of the cutting groove of the printed sheet cut in a direction parallel to the lower inner wall is less than or equal to the width of the gap between the lower inner wall and the lower outer wall.

5. The method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes according to any one of claims 1 to 3, characterized in that: The width of the cutting groove of the printed sheet cut in a direction parallel to the left inner wall is less than or equal to the width of the gap between the inner electrode and the left inner wall.

6. A chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes, characterized in that: The method for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes according to any one of claims 1 to 5 comprises: The invention discloses a multi-layer printed sheet stacked in an offset manner, wherein each layer of the printed sheet is printed with an inner electrode and a dielectric, and the multi-layer printed sheet is stacked and cut according to four inner walls and four outer walls placed around the inner electrode of each layer of the printed sheet.

7. A device for preparing a chip-type multilayer ceramic capacitor with high-precision stacking of internal electrodes, characterized in that: include: A peeling unit is used to peel off the multi-layer printed sheet with internal electrodes and dielectrics from the PET film using a gold mold; Among them, four inner walls and four outer walls are placed around the inner electrode of each printed sheet, the upper and lower inner walls are placed parallel to the long axis direction of the inner electrode, the upper outer wall is placed outside the upper inner wall at a certain distance, and the lower outer wall is placed outside the lower inner wall at a certain distance; the left and right inner walls are placed parallel to the short axis direction of the inner electrode, the left outer wall is placed outside the left inner wall at a certain distance, and the right outer wall is placed outside the right inner wall at a certain distance; each outer wall and each inner wall are inner electrodes of specific sizes; A protective cover covering unit, used for stacking the multiple layers of printed sheets on the lower protective cover in an offset manner, and covering the uppermost printed sheet with the upper protective cover; A static pressure pressing unit for isostatically pressing the multi-layer printed sheet covered with the upper and lower protective covers; A cutting unit, used for cutting the printed sheet at a preset cutting point to obtain a stacked multi-layer printed sheet; The size relationship of each wall of each printed sheet satisfies G+E=D, 0≤E<D, wherein the distance between the ends of the inner electrodes of each printed sheet is D, the spacing between the left inner wall and the left outer wall, or the spacing between the right inner wall and the right outer wall is E, and the width of the left and right inner walls of each printed sheet is G; The dimensional relationship of each wall of each layer of printed sheet satisfies A+B=C, 0<B<C, wherein the width of the upper and lower inner walls of each layer of printed sheet is A, the spacing between the upper inner wall and the upper outer wall, or the spacing between the lower inner wall and the lower outer wall is B, and the sum of the widths of the inner electrode and the dielectric is C.

8. An electronic device, characterized in that: including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the method according to any one of claims 1 to 5.

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