A SiC device ohmic contact and its preparation method and application

Abstract

The present invention relates to an ohmic contact for SiC devices, and a preparation method and application thereof, comprising: preparing a highly doped source region on a SiC epitaxial layer on the front side of a SiC substrate, and preparing a microchannel structure for drain region contact on the back side of the SiC substrate; depositing a 3C-SiC film simultaneously in the source region and the drain region using an LPCVD method; and depositing metal on the 3C-SiC film to achieve ohmic contact. The present invention deposits a highly doped 3C-SiC film in the source and drain regions of a SiC MOSFET using an LPCVD method. The 3C-SiC film in the source and drain regions prepared by the above steps can withstand oxygen, high humidity, high temperature and pickling environments. The present invention simplifies the ohmic contact preparation process and improves the production efficiency of this process step.

Description

Technical Field

[0001] The invention relates to an ohmic contact of a SiC device and a preparation method and application thereof, belonging to the technical field of semiconductor power devices. Background Art

[0002] Silicon carbide (SiC) is a wide bandgap semiconductor material with high breakdown field strength, high saturated electron drift velocity and high thermal conductivity. Therefore, SiC power electronic devices show great potential in high-power, high-temperature and high-frequency applications. Ohmic contacts with high stability and low contact resistance are an important prerequisite for the preparation of high-performance SiC MOSFET devices.

[0003] The common method of forming SiC ohmic contact is to use the silicidation reaction of metal Ni and SiC through rapid high temperature annealing (RTA) at a high temperature of 1000°C. Ni reacts with Si to obtain NiSi silicide, which can reduce the contact barrier. However, the carbon atoms remaining in the reaction will form submicron clusters and increase the surface roughness. Therefore, the adhesion between the deposited metal and the silicon carbide surface decreases, seriously affecting the yield of SiC devices. In order to reduce the adverse effects of the high-temperature annealing process on other effective areas, the industry has gradually begun to use laser annealing methods that can perform local area annealing, but it still cannot solve the problem of carbon precipitation during the annealing process.

[0004] In order to further improve the reliability of ohmic contact, another solution is to add a highly doped 3C-SiC layer between the deposited metal and SiC. The conduction band energy level of 3C-SiC is lower than that of the substrate 4H-SiC and 6H-SiC, which can reduce the contact barrier between metal and SiC. Therefore, this method can reduce the contact resistance between SiC and metal while avoiding the problem of low adhesion between metal and SiC caused by high temperature annealing.

[0005] Currently, the reported method of implanting 3C-SiC is to amorphize the SiC in the contact area through ion implantation, and then recrystallize the amorphous SiC in the area to obtain 3C-SiC. However, from the perspective of large-scale mass production, the additional ion implantation and high-temperature recrystallization steps greatly extend the production cycle and are difficult to be widely used. Summary of the invention

[0006] In view of the deficiencies of the prior art, the present invention provides a method for preparing an ohmic contact of a SiC device; the preparation of ohmic contacts of SiCMOSFET devices is a bottleneck in large-scale production. The present invention relates to a method for preparing an SiC ohmic contact with low on-resistance: a highly doped 3C-SiC film is deposited on the source and drain regions of a SiC MOSFET using low-pressure chemical vapor deposition (LPCVD) technology. The method simplifies the ohmic contact preparation process and improves the production efficiency of this process. The method for preparing a 3C-SiC layer that can be applied on a large scale is used to obtain the source / drain ohmic contact of a SiC MOSFET.

[0007] The invention also provides an ohmic contact of a SiC device and applications thereof.

[0008] Terminology explanation:

[0009] SiC DMOSFET: Double diffused metal oxide semiconductor field effect transistor;

[0010] UMOSFET: U-groove metal oxide semiconductor field effect transistor;

[0011] The technical solution adopted by the present invention is:

[0012] A method for preparing an ohmic contact of a SiC device, comprising:

[0013] A highly doped source region is prepared on the SiC epitaxial layer on the front side of the SiC substrate, and a micro-channel structure for contacting the drain region is prepared on the back side of the SiC substrate;

[0014] The LPCVD method is used to simultaneously deposit 3C-SiC films in the source region and the drain region;

[0015] Metal is deposited on the 3C-SiC film to achieve ohmic contact.

[0016] Preferably, according to the present invention, a 3C-SiC film is deposited simultaneously in the source region and the drain region by using an LPCVD method, comprising:

[0017] At a temperature of 1000-1600°C, a mixed gas of SiH4 and C3H8 or a mixed gas of SiH4 and C2H2 is used, and NH3 gas as an n-type doping source is introduced at the same time, and a 3C-SiC film is deposited on the front and back sides of the SiC substrate;

[0018] Further preferably, at a temperature of 1000° C., a 3C-SiC film is deposited simultaneously in the source region and the drain region using an LPCVD method.

[0019] Preferably, according to the present invention, the thickness of the 3C-SiC film is 20nm to 50nm;

[0020] More preferably, the thickness of the 3C-SiC film is 20 nm to 30 nm.

[0021] Preferably, according to the present invention, a highly doped source region is prepared on the SiC epitaxial layer on the front side of the SiC substrate, comprising: preparing the highly doped source region by ion implantation; the concentration of the source region is not less than 1E18 cm -3 .

[0022] Preferably, according to the present invention, a microchannel structure for drain region contact is prepared on the back side of a SiC substrate, comprising: preparing the microchannel structure by a plasma dry etching process.

[0023] Further preferably, the microchannel structure is a polygonal, circular or groove structure.

[0024] Preferably according to the present invention, the metal is Al, Ti, W, Ag, Cu, Ni or Au.

[0025] An ohmic contact for a SiC device is prepared by adopting the method for preparing the ohmic contact for a SiC device.

[0026] A method for preparing a SiC DMOSFET device, comprising:

[0027] The SiC device ohmic contact is prepared by adopting the above-mentioned method for preparing the SiC device ohmic contact;

[0028] Deposit a SiO2 mask on the front side of the SiC substrate and etch away the SiO2 and 3C-SiC films in the gate area;

[0029] A gate SiO2 film is deposited on the front of the SiC substrate, and then a gate contact is formed by depositing polysilicon. The polysilicon outside the gate area is then etched away to finally form a polysilicon gate.

[0030] Deposit an insulating dielectric layer, then etch away the isolation dielectric in the source region, the gate SiO2 film, and the SiO2 mask;

[0031] A patterned photoresist is prepared on the front side of the SiC substrate, and then a source contact metal is deposited on the 3C-SiC film to form an ohmic contact;

[0032] Depositing a passivation film on the front side of the SiC substrate, including a SiN protective layer and a polyimide protective layer, and etching to form a contact window;

[0033] A drain contact metal is deposited on the back side of the SiC substrate to prepare an ohmic contact in the drain region.

[0034] Further preferably, SiH4 and O2 are used to deposit a 100 nm gate SiO2 film on the front side of the SiC substrate.

[0035] Further preferably, a Ni film, a Ti film, a TiN film and an Al film are sequentially deposited on the 3C-SiC film to form a source contact metal;

[0036] Further preferably, Ni, Ti and Ag are deposited in sequence on the back side of the SiC substrate to form a drain contact metal.

[0037] The beneficial effects of the present invention are:

[0038] The present invention uses the LPCVD method to deposit a highly doped 3C-SiC film on the source and drain regions of the SiC MOSFET. The method simplifies the ohmic contact preparation process and improves the production efficiency of MOSFET devices.

[0039] The present invention is applicable to the preparation of ohmic contacts in the source and drain regions of DMOSFET and UMOSFET devices. The source contact metal is usually deposited after the gate is prepared, and the drain contact metal is deposited after the front passivation layer is prepared. The 3C-SiC film in the source and drain regions prepared by the above steps can withstand oxygen, high humidity (from 0-500g / m 3 ), high temperature of 1600℃ and pickling environment, including HF, HNO3, HCl, H2SO4. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 Schematic diagram of SiC ohmic contact prepared on SiC DMOSFET device:

[0041] Figure 2 Schematic diagram of SiC ohmic contact prepared for UMOSFET:

[0042] Figure 3 is a schematic diagram of a micro-channel structure for back-side drain contact;

[0043] Figure 4 Schematic diagram of the steps of plasma etching the micro-channel structure on the back side of the substrate during the preparation process of the SiC DMOSFET device in the embodiment:

[0044] Figure 5 Schematic diagram of the steps of depositing 3C-SiC film during the preparation of SiC DMOSFET device in the embodiment:

[0045] Figure 6 Schematic diagram of the steps of preparing the SiO2 mask of the gate structure in the process of preparing the SiC DMOSFET device in the embodiment:

[0046] Figure 7 Schematic diagram of the steps of depositing gate SiO2 film and gate contact material during the preparation process of SiC DMOSFET device in the embodiment:

[0047] Figure 8 Schematic diagram of the steps of depositing an insulating dielectric layer during the preparation of a SiC DMOSFET device in an embodiment:

[0048] Fig. 9 Schematic diagram of the steps of depositing source contact metal and passivation film during the preparation of SiC DMOSFET device in the embodiment:

[0049] Fig.10 Schematic diagram of the steps of depositing drain contact metal during the preparation of SiC DMOSFET device in the embodiment:

[0050] 1: n+SiC substrate; 2: n-SiC epitaxial layer; 3: p-well region; 4: p+ region; 5: n+ region; 6: front 3C-SiC film; 7: back 3C-SiC film; 8: SiO2 mask; 9: gate SiO2 film; 10: polysilicon gate; 11: insulating dielectric layer; 12: source contact metal; 13: SiN protective layer; 14: polyimide protective layer; 15: drain contact metal. DETAILED DESCRIPTION

[0051] The present invention will be described in detail below with reference to the accompanying drawings and embodiments, but is not limited thereto.

[0052] Example 1

[0053] A method for preparing an ohmic contact of a SiC device, comprising:

[0054] A highly doped source region is prepared on the SiC epitaxial layer on the front side of the SiC substrate, and a micro-channel structure for contacting the drain region is prepared on the back side of the SiC substrate; specifically:

[0055] The LPCVD method is used to simultaneously deposit a 3C-SiC film in the source region and the drain region; the LPCVD method used can form a continuous 3C-SiC film on the trench structure, while other methods for depositing 3C-SiC films make it difficult to achieve high coverage and high uniformity of the film, especially on the sidewalls of the microchannel structure. Figure 1 Schematic diagram of SiC ohmic contact prepared on SiC DMOSFET device: Figure 2 Schematic diagram of SiC ohmic contact prepared for UMOSFET:

[0056] Metal is deposited on the 3C-SiC film to achieve ohmic contact. After the metal deposition on the 3C-SiC film is completed, high temperature annealing or laser local annealing process is not required.

[0057] The present invention deposits 3C-SiC thin film by LPCVD method without introducing additional ion implantation step. Compared with the current method of forming SiC ohmic contact by rapid high temperature annealing or laser annealing, this method solves the problem of carbon cluster formation after silicon carbide and metal reaction, and has more advantages in large-scale mass production.

[0058] Example 2

[0059] The method for preparing an ohmic contact of a SiC device according to embodiment 1 is different in that:

[0060] The LPCVD method is used to simultaneously deposit 3C-SiC thin films in the source region and the drain region, including:

[0061] At a temperature of 1000-1600° C., a mixed gas of SiH4 and C3H8 or a mixed gas of SiH4 and C2H2 is used, and NH3 gas as an n-type doping source is introduced at the same time, and a uniform and continuous 3C-SiC film is deposited on the front and back sides of the SiC substrate, namely, a front 3C-SiC film 6 and a back 3C-SiC film 7;

[0062] The thickness of 3C-SiC film is 20nm to 50nm. When the thickness of 3C-SiC film is less than 20nm, ohmic contact cannot be formed. When the thickness of 3C-SiC film is higher than 50nm, the contact resistance is large, which reduces the performance of the device. 3C-SiC film can withstand oxygen, high humidity, strong acid and high temperature environment up to 1600℃.

[0063] A highly doped source region is prepared on a SiC epitaxial layer on the front side of a SiC substrate, comprising: preparing the highly doped source region by ion implantation; the concentration of the source region is not less than 1E18 cm -3 The ion implantation doping step is to increase the doping concentration of SiC in the source region, not to prepare 3C-SiC.

[0064] A microchannel structure for drain region contact is prepared on the back of a SiC substrate, including: preparing the microchannel structure by a plasma dry etching process. The application of the microchannel structure is to increase the surface area of ​​the ohmic contact in the drain region and reduce the contact resistance. The microchannel structure can be various repeated shapes or patterns.

[0065] The metal is Al, Ti, W, Ag, Cu, Ni or Au. The type and thickness of the metal depends on the specific application of the MOSFET.

[0066] Example 3

[0067] The method for preparing an ohmic contact of a SiC device according to embodiment 2 is different in that:

[0068] At a temperature of 1000°C, 3C-SiC film is deposited simultaneously in the source region and the drain region using the LPCVD method.

[0069] The thickness of the 3C-SiC film is 20nm to 30nm.

[0070] like Figure 3 As shown, the microchannel structure is a polygonal, circular or groove structure.

[0071] Example 4

[0072] A SiC device ohmic contact is prepared by using the method for preparing the SiC device ohmic contact of any one of embodiments 1-3.

[0073] Example 5

[0074] A method for preparing a SiC DMOSFET device, comprising:

[0075] The SiC device ohmic contact is prepared by using the method for preparing the SiC device ohmic contact of any one of Examples 1-3;

[0076] Deposit a SiO2 mask 8 on the front side of the SiC substrate, and etch away the SiO2 and 3C-SiC films in the gate region;

[0077] A gate SiO2 film 9 is deposited on the front side of the SiC substrate, and then a gate contact is formed by depositing polysilicon, and then the polysilicon outside the gate area is etched away to finally form a polysilicon gate 10;

[0078] An insulating dielectric layer 11 is deposited, and then the isolation dielectric, gate SiO2 film 9 and SiO2 mask 8 of the source region are etched away; after this step, the 3C-SiC of the source region is directly exposed.

[0079] A photoresist with a pattern is prepared on the front side of the SiC substrate, and then a source contact metal 12 is deposited on the 3C-SiC film to form an ohmic contact;

[0080] Depositing a passivation film on the front side of the SiC substrate, including a SiN protective layer 13 and a polyimide protective layer 14, and etching to form a contact window;

[0081] A drain contact metal 15 is deposited on the back side of the SiC substrate to prepare an ohmic contact in the drain region.

[0082] Example 6

[0083] The method for preparing a SiC DMOSFET device according to Embodiment 5 is different in that:

[0084] 1) preparing an n+SiC substrate 1 with a 4H-SiC epitaxial layer, and performing ion implantation on the n-SiC epitaxial layer 2 to form a p-well region 3, a p+ region 4, and an n+ region 5;

[0085] 2) A micro-channel structure is prepared on the back of the n+SiC substrate 1 by plasma etching; the channel width is 2 μm, the depth is 8 μm, and the channel spacing is 2 μm; Figure 4 shown.

[0086] 3) using a mixed gas of SiH4 and C3H8, or a mixed gas of SiH4 and C2H2, to react at 1000°C to generate a 20nm front 3C-SiC film 6 and a back 3C-SiC film 7, which are deposited on the front and back surfaces of the n+SiC substrate 1, respectively; Figure 5 shown.

[0087] 4) depositing a SiO2 mask 8 on the front side of the n+SiC substrate 1, and etching away the SiO2 and 3C-SiC films in the gate region; Figure 6 shown.

[0088] 5) Using SiH4 and O2, a 100nm gate SiO2 film 9 is deposited on the front side of the n+SiC substrate 1, and then a gate contact is formed by depositing a polysilicon layer 10, and then the polysilicon outside the gate area is etched away; Figure 7 shown.

[0089] 6) Deposit an insulating dielectric layer 11, then etch away the isolation dielectric, gate SiO2 film 9 and SiO2 mask 8 in the source region. After this step, the 3C-SiC in the source region is directly exposed. Figure 8 shown.

[0090] 7) A patterned photoresist is prepared on the front side of the n+SiC substrate 1, and then a 20 nm Ni film is deposited on the 3C-SiC film to form an ohmic contact; then Ti, TiN and Al films are deposited in sequence on the Ni film to form a source contact metal 12; the source contact metal 12 includes Ni / Ti / TiN / Al;

[0091] 8) depositing a passivation film on the front side of the n+SiC substrate 1, including a SiN protective layer 13 and a polyimide film 14, and etching to form a contact window; Fig. 9 shown.

[0092] 9) Ni, Ti, and Ag are sequentially deposited on the back side of the n+SiC substrate 1 to form a drain contact metal 15. Fig.10 shown.

[0093] The implementation includes the preparation process of the source and drain ohmic contacts of the SiC DMOSFET device. One advantage of this process is that the 3C-SiC film for the front and back ohmic contacts can be completed simultaneously in the same step, which improves production efficiency. The 3C-SiC preparation process is completed before the gate oxide layer is deposited, which is of great help in improving the stability of the gate oxide layer. In addition, the method of preparing ohmic contacts in this process does not rely on ion implantation to form the 3C-SiC region, avoiding the high energy consumption and time consuming process of ion implantation.

Claims

1. A method for preparing an ohmic contact of a SiC device, characterized in that: include: A highly doped source region is prepared on the SiC epitaxial layer on the front side of the SiC substrate, and a micro-channel structure for contacting the drain region is prepared on the back side of the SiC substrate; The LPCVD method is used to simultaneously deposit 3C-SiC films in the source region and the drain region; include: At a temperature of 1000-1600°C, a mixed gas of SiH4 and C3H8 or a mixed gas of SiH4 and C2H2 is used, and NH3 gas as an n-type doping source is introduced at the same time, and a 3C-SiC film is deposited on the front and back sides of the SiC substrate; Depositing metal on the 3C-SiC film to achieve ohmic contact; The thickness of 3C-SiC film is 20nm~50nm.

2. The method for preparing an ohmic contact of a SiC device according to claim 1, characterized in that: At a temperature of 1000°C, 3C-SiC film is deposited simultaneously in the source region and the drain region using the LPCVD method.

3. The method for preparing an ohmic contact of a SiC device according to claim 1, characterized in that: The thickness of 3C-SiC film is 20nm~30nm.

4. The method for preparing an ohmic contact of a SiC device according to claim 1, characterized in that: A highly doped source region is prepared on a SiC epitaxial layer on the front side of a SiC substrate, comprising: preparing the highly doped source region by ion implantation; the concentration of the source region is not less than 1E18 cm -3 .

5. The method for preparing an ohmic contact of a SiC device according to claim 1, characterized in that: A microchannel structure for drain region contact is prepared on the back side of a SiC substrate, comprising: preparing the microchannel structure by a plasma dry etching process.

6. The method for preparing an ohmic contact of a SiC device according to claim 5, characterized in that: The microchannel structure is a polygonal, circular or groove structure.

7. A method for preparing an ohmic contact of a SiC device according to any one of claims 1 to 6, characterized in that: The metal is Al, Ti, W, Ag, Cu, Ni or Au.

8. An ohmic contact for a SiC device, characterized in that: The ohmic contact of a SiC device is prepared by the method for preparing the ohmic contact of a SiC device according to any one of claims 1 to 7.

9. A method for preparing a SiC DMOSFET device, characterized in that: include: The SiC device ohmic contact is prepared by the method for preparing the SiC device ohmic contact according to any one of claims 1 to 7; Deposit a SiO2 mask on the front side of the SiC substrate and etch away the SiO2 and 3C-SiC films in the gate area; A gate SiO2 film is deposited on the front of the SiC substrate, and then a gate contact is formed by depositing polysilicon. The polysilicon outside the gate area is then etched away to finally form a polysilicon gate. Deposit an insulating dielectric layer, then etch away the isolation dielectric in the source region, the gate SiO2 film, and the SiO2 mask; A patterned photoresist is prepared on the front side of the SiC substrate, and then a source contact metal is deposited on the 3C-SiC film to form an ohmic contact; Depositing a passivation film on the front side of the SiC substrate, including a SiN protective layer and a polyimide protective layer, and etching to form a contact window; A drain contact metal is deposited on the back side of the SiC substrate to prepare an ohmic contact in the drain region.

10. The method for preparing a SiC DMOSFET device according to claim 9, characterized in that: A 100nm gate SiO2 film was deposited on the front side of the SiC substrate using SiH4 and O2.

11. The method for preparing a SiC DMOSFET device according to claim 10, characterized in that: A Ni film, a Ti film, a TiN film and an Al film are sequentially deposited on the 3C-SiC film to form a source contact metal.

12. The method for preparing a SiC DMOSFET device according to claim 10, characterized in that: Ni, Ti and Ag are deposited in sequence on the back side of the SiC substrate to form a drain contact metal.

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