A novel structure of laser chip and a manufacturing method thereof

Abstract

The application relates to the technical field of laser chips, and provides a novel-structure laser chip and a manufacturing method thereof.The laser chip comprises a grating layer and one or more functional layers grown on the grating layer; the grating layer is etched with a plurality of grating grooves to form a Bragg grating, and a partial structure of the grating layer is reserved below the grating grooves; wherein the grating grooves are obtained by photoetching a pattern on the one or more functional layers and performing etching at the photoetched pattern position.The application utilizes etching characteristics, removes a resist layer, maintains the integrity of the laser chip through the reserved partial structure, reduces the internal thermal effect of the laser chip while forming the Bragg grating structure, and improves the bandwidth and performance of the laser.

Description

A novel laser chip structure and its fabrication method Technical Field

[0001] This invention relates to the field of laser chip technology, and in particular to a novel laser chip structure and its fabrication method. Background Technology

[0002] Semiconductor lasers are key components in dense wavelength division multiplexing (DWDM) systems and future all-optical networks. Their advantages will become increasingly apparent as demands for network transmission speed and capacity continue to rise. The unique advantages of tunable lasers in terms of tuning range and narrow linewidth have attracted numerous researchers to study their structure, aiming to adjust parameters such as temperature and current within the laser cavity to emit different wavelengths. In tunable semiconductor lasers, the primary factor affecting the emitted wavelength is the laser's temperature, necessitating excellent temperature control performance.

[0003] Among them, DFB (Distributed Feedback Laser) semiconductor lasers incorporate a Bragg grating. By adjusting the grating period, different wavelengths of single longitudinal modes can be obtained, exhibiting high-speed and narrow-linewidth operating characteristics, thus finding widespread application in optical communication. However, in existing DFB laser structures, a resist layer is placed below the grating layer to control the grating etching depth. The addition of this resist layer increases the p-polar resistance of the DFB laser chip, thereby increasing the internal thermal effects. This impacts the laser's temperature control and limits the chip's bandwidth, ultimately affecting the DFB laser's performance.

[0004] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. Summary of the Invention

[0005] The technical problem to be solved by the present invention is that the existing DFB laser chip uses a resist layer to control the grating etching depth, but the resist layer will increase the internal thermal effect of the DFB laser chip, which will affect the temperature control of the laser and limit the bandwidth of the laser chip, thereby affecting the performance of the DFB laser.

[0006] The present invention adopts the following technical solution:

[0007] In a first aspect, the present invention provides a novel laser chip structure, comprising a grating layer 1 and one or more functional layers 2 grown on the grating layer 1;

[0008] The grating layer 1 is etched with a plurality of grating grooves 11 to form a Bragg grating, and a portion of the structure of the grating layer 1 is retained below the grating grooves 11; wherein, the grating grooves 11 are obtained by photolithographically patterning on one or more functional layers 2 and etching at the locations of the photolithographic patterns.

[0009] Preferably, the photolithographic pattern is one of a circle, a square, or a rectangle.

[0010] Preferably, when the photolithographic pattern is square or rectangular, the grating groove 11 is a V-shaped groove, and the included angle inside the V-shaped groove is a preset angle.

[0011] Preferably, the depth of the grating layer 1 is multiplied by a first preset coefficient to obtain a preset maximum depth, and the depth of the grating groove 11 is not greater than the preset maximum depth.

[0012] In a second aspect, the present invention provides a method for fabricating a novel laser chip, wherein one or more functional layers 2 are pre-grown on a grating layer 1, the method comprising:

[0013] Based on the defined photolithography pattern, the surface of each functional layer 2 is etched, and the etching penetrates all functional layers 2 to form etch grooves.

[0014] Etching solution is injected into the etching tank, and the etching solution is used to etch the grating layer 1 to obtain the grating tank 11.

[0015] Preferably, before etching the surfaces of each functional layer 2, the method further includes:

[0016] The depth of the grating groove 11 is determined based on the coupling coefficient requirements of the Bragg grating and the depth of the grating layer 1, and the width of the photolithographic pattern is determined based on the depth of the grating groove 11.

[0017] Preferably, determining the width of the photolithographic pattern based on the depth of the grating groove 11 specifically includes:

[0018] The width of the lithographic pattern is obtained by multiplying the depth of the grating groove 11 by a second preset coefficient.

[0019] Preferably, when the material of the grating layer 1 is InP, the etching solution is a hydrochloric acid-based etching solution.

[0020] Preferably, the method involves fabricating a laser chip on a laser wafer, and further includes:

[0021] Multiple laser chips are disposed on the laser wafer. An ultrasonic detector 3 is disposed at the contact position between the laser wafer and the laser chips. The ultrasonic detector 3 includes a probe 31 and a processor 32. The probe 31 of the ultrasonic detector 3 is in seamless contact with the grating layer 1 of the laser chip to detect the completion of the grating groove 11 in the laser chip.

[0022] When the grating groove 11 of the corresponding laser chip is completely formed as detected by the ultrasonic detector 3, and a portion of the structure of the grating layer 1 is still retained below the grating groove 11, the laser chip is manufactured and is qualified.

[0023] Preferably, the step of detecting the completeness of the hollow heat insulation region in the laser chip specifically includes:

[0024] The probe 31 emits a wave towards the grating layer 1. When the emitted wave enters the etching solution from the grating layer 1, it is reflected and the echo is received by the probe 31.

[0025] The completion degree of the grating groove 11 is determined based on the time difference between the emitted wave and the received echo from the probe 31.

[0026] Compared with existing technologies, the advantages of this invention are as follows: This invention maintains the integrity of the laser chip by retaining a portion of the grating layer structure below the grating groove, thus providing support for the functional layers above the grating layer. Furthermore, there is no resist layer below the grating layer, so the grating etching depth is no longer controlled by the resist layer. Instead, it utilizes the property that materials can obtain V-grooves through chemical etching. By controlling the spacing of the grating mask pattern and the thickness of the grating layer material, the grating etching depth and duty cycle are adjusted, thereby obtaining gratings with different coupling coefficients. This method achieves consistent and uniform grating etching depth. Moreover, by eliminating the resist layer found in existing technologies, the internal thermal effects of the laser chip are reduced while forming the Bragg grating structure, thereby improving the laser's bandwidth and performance. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 is a cross-sectional view of a laser chip in the prior art provided by an embodiment of the present invention;

[0029] Figure 2 is a cross-sectional view of a novel laser chip structure provided in an embodiment of the present invention;

[0030] Figure 3 is a top view of a novel laser chip structure provided in an embodiment of the present invention;

[0031] Figure 4 is a cross-sectional view of a novel laser chip structure provided in an embodiment of the present invention;

[0032] Figure 5 is a cross-sectional view of a novel laser chip structure provided in an embodiment of the present invention;

[0033] Figure 6 is a flowchart illustrating a novel laser chip fabrication method according to an embodiment of the present invention.

[0034] Figure 7 is a flowchart illustrating a novel laser chip fabrication method according to an embodiment of the present invention.

[0035] Figure 8 is a flowchart illustrating a novel laser chip fabrication method according to an embodiment of the present invention.

[0036] Figure 9 is a flowchart illustrating a novel laser chip fabrication method according to an embodiment of the present invention.

[0037] Figure 10 is a schematic diagram of the ultrasonic detector architecture in a novel laser chip fabrication method provided by an embodiment of the present invention;

[0038] Figure 11 is a flowchart illustrating a novel laser chip fabrication method according to an embodiment of the present invention.

[0039] In all the accompanying drawings, the same reference numerals are used to denote the same elements or structures, wherein:

[0040] 1. Grating layer; 11. Grating groove; 2. Functional layer; 3. Ultrasonic detector; 31. Probe; 32. Processor; 4. Anti-corrosion layer. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0042] In the description of this invention, the terms "inner", "outer", "longitudinal", "lateral", "upper", "lower", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and do not require that this invention must be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0043] In this invention, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0044] Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0045] Example 1:

[0046] As shown in Figure 1, existing DFB laser chips use a resist layer 4 to control the grating etching depth. However, the resist layer 4 increases the internal thermal effect of the DFB laser chip, affecting the laser's temperature control and limiting the chip's bandwidth, thus impacting the DFB laser's performance. To address this issue, Embodiment 1 of this invention provides a novel laser chip structure, as shown in Figure 2, comprising a grating layer 1 and one or more functional layers 2 grown on the grating layer 1. The grating layer 1 is etched with multiple grating grooves 11 to form a Bragg grating, with a portion of the grating layer 1 structure remaining below the grating grooves 11. The grating grooves 11 are obtained by photolithographically patterning the one or more functional layers 2 and etching at the locations of the photolithographically patterned patterns.

[0047] The number of functional layers 2, the materials of functional layers 2, and the materials of grating layer 1 are determined by those skilled in the art based on the fabrication and functional requirements of the laser chip. In practical applications, the material of grating layer 1 can be InP, and the number of functional layers 2 can be one. For example, a mask layer can be grown on the surface of grating layer 1, and the material of the mask layer can be InGaAsP. A laser and corresponding resistors, electrodes, and other devices are also disposed above each functional layer 2.

[0048] This embodiment maintains the integrity of the laser chip by retaining a portion of the grating layer 1 structure below the grating groove 11, and provides support for the functional layers 2 located above the grating layer 1. Furthermore, there is no resist layer below the grating layer 1, so the grating etching depth is no longer controlled by the resist layer. Instead, it utilizes the characteristic of InP material to obtain V-grooves through chemical etching. By controlling the spacing of the grating mask pattern and the thickness of the grating layer 1 material, the grating etching depth and duty cycle are adjusted, thereby obtaining gratings with different coupling coefficients. This method achieves consistent and uniform grating etching depth. Moreover, by eliminating the resist layer found in existing technologies, the internal thermal effects of the laser chip are reduced while forming the Bragg grating structure, thereby improving the laser's bandwidth and performance.

[0049] The photolithographic pattern is obtained by those skilled in the art based on experience and the requirements of the laser chip. In actual use, the photolithographic pattern is one of a circle, a square, or a rectangle. When the photolithographic pattern is square or rectangular, the grating groove 11 is a V-shaped groove, and the included angle inside the V-shaped groove is a preset angle. Viewed from top to bottom, the chip presents a Bragg grating as shown in Figure 3. When the photolithographic pattern is circular, the grating groove 11 is a conical groove, and the cone angle of the conical groove is a preset angle. The preset angle is determined by the corrosion characteristics of the etching solution and the material of the grating layer 1. For example, when using a hydrochloric acid-based etching solution to etch the InP material grating layer 1, the preset angle can be 35°. One optional formulation of the hydrochloric acid-based solution is HCl and H3PO4, wherein the ratio of HCl to H3PO4 is 1:3.

[0050] Taking a square or rectangular lithographic pattern as an example, as shown in Figure 4, the depth d of the grating groove 11 and the width w of the lithographic pattern have the following relationship:

[0051]

[0052] Wherein, θ is the included angle within the grating groove 11. The width of the photolithographic pattern refers to the length of the side corresponding to the photolithographic pattern obtained by longitudinally slicing the laser chip in the laser transmission direction, i.e., the position of w in Figure 4.

[0053] The depth of the grating groove 11 is less than the thickness of the grating layer 1. In a preferred embodiment, to provide sufficient support for each functional layer 2, the laser, and the corresponding laser resistors, the depth of the grating groove 11 and the thickness of the grating layer 1 should also have the following relationship: a preset maximum depth is obtained by multiplying the depth of the grating layer 1 by a first preset coefficient, and the depth of the grating groove 11 is not greater than the preset maximum depth. The first preset coefficient is obtained by those skilled in the art based on the requirements of the laser chip. In an optional embodiment, the first preset coefficient can be 0.7.

[0054] In a preferred embodiment, the sum of the thicknesses of all functional layers 2 is less than or equal to the thickness of the portion of the structure retained by the grating layer 1, as shown in Figure 5, where d1 is less than or equal to d2. For a more precise implementation, the thickness of each functional layer 2 is determined based on the depth analysis of the grating groove 11, and based on the amount of etching solution required to form the grating groove 11 and the photolithographic pattern. Specifically, based on the required volume of etching solution and the area of ​​the photolithographic pattern, the groove depth required to reach the required volume of etching solution is determined. This groove depth is used as the sum of the thicknesses of all functional layers 2, so that the grooves formed after etching away the photolithographic pattern are precisely used to control the amount of etching solution used. Therefore, in the actual chip fabrication process, only the etchant solution needed to fill the groove is required to control the depth of the etched grating groove 11.

[0055] Based on the relationship between the depth of the grating groove 11 and the width of the photolithographic pattern, the chip can be designed according to the requirements of the laser chip. Specifically, this includes: determining the depth of the grating groove 11 and the spacing between each grating groove 11 (i.e., the duty cycle of the grating groove 11 distribution) according to the coupling coefficient requirements of the laser chip grating; obtaining the thickness of the grating layer 1 by dividing the depth of the grating groove 11 by the first preset coefficient, thereby fabricating the grating layer 1; and calculating the width of the photolithographic pattern based on the depth d of the grating groove 11. After fabricating the grating layer 1 and each functional layer 2, a photolithography pattern is created. Etching solution is then poured into this pattern to perform etching, thus fabricating the laser chip described in this embodiment. This eliminates the need for a resist layer for etching control, allowing the laser chip's Bragg grating structure to be obtained, thereby reducing internal thermal effects, increasing the laser chip's bandwidth, and improving its performance.

[0056] It should be noted that in practical use, laser chips typically contain multiple regions, such as the SOA electrode region, front grating region, Gain electrode region, phase region, rear grating region, and COA electrode region. The laser chip structure described in this embodiment refers to the structure of the corresponding grating region in the laser chip, such as the front grating region or the rear grating region. Any application of this invention in the grating region of a laser chip should be included within the scope of protection described in this invention.

[0057] Example 2:

[0058] Based on the same concept as Embodiment 1, Embodiment 2 of the present invention also provides a novel laser chip structure, as shown in FIG6, including a grating layer 1 and multiple functional layers 2 grown on the grating layer 1; the grating layer 1 is etched with multiple grating grooves 11 to form a Bragg grating, and a portion of the structure of the grating layer 1 is retained below the grating grooves 11; wherein, the grating grooves 11 are obtained by photolithographically patterning on each functional layer 2 and etching at the locations of the photolithographically patterned patterns. The process of photolithographically patterning on each functional layer 2 and etching at the locations of the photolithographically patterned patterns can be achieved by photolithographically patterning on the uppermost functional layer 2 and etching multiple functional layers 2 at the locations of the photolithographically patterned patterns, or by photolithographically patterning and etching each functional layer 2 individually. In practical use, the specific functional layer 2 on which the pattern is photolithographically patterned and etched is determined by those skilled in the art based on the analysis of the laser chip fabrication requirements, the selection of the corresponding fabrication material for the functional layer 2, and the analysis of the differences in etching or photolithographic performance between the fabrication materials. In practical use, some functional layers 2 may be lithographically patterned, while others are obtained by etching through the lithographic patterns on the upper functional layers 2.

[0059] In a preferred embodiment, in order to provide sufficient support for each functional layer 2, the thickness of each functional layer 2 should be less than or equal to the thickness of the portion of the structure retained by the grating layer 1, i.e., the following relationship exists:

[0060]

[0061] Where d2 is the thickness of the portion of the structure retained in the grating layer 1, d i Let be the thickness of the i-th functional layer 2.

[0062] As a more precise implementation, the thickness of each functional layer 2 is obtained based on the depth analysis of the grating groove 11, and based on the amount of etchant required to form the grating groove 11 and the photolithography pattern. Specifically, based on the required volume of etchant and the area of ​​the photolithography pattern, the groove depth required to reach the required volume of etchant is determined. The groove depth is used as the thickness of each functional layer 2, so that the groove formed after etching away the photolithography pattern is precisely used to control the amount of etchant. Thus, in the actual chip manufacturing process, only the etchant filling the groove needs to be poured into the groove to achieve control of the depth of the etched grating groove 11.

[0063] Based on the relationship between the depth of the grating groove 11 and the width of the photolithographic pattern, the chip can be designed according to the requirements of the laser chip. Specifically, this includes: determining the depth of the grating groove 11 and the spacing between each grating groove 11 (i.e., the duty cycle of the grating groove 11 distribution) according to the coupling coefficient requirements of the laser chip grating; obtaining the thickness of the grating layer 1 by dividing the depth of the grating groove 11 by the first preset coefficient, thereby fabricating the grating layer 1; and calculating the width of the photolithographic pattern based on the depth d of the grating groove 11. The thickness of each functional layer 2 is determined, and after fabricating the grating layer 1 and each functional layer 2, a photolithography pattern is created. At the location of the photolithography pattern, each functional layer 2 is etched to obtain a groove extending into the grating layer 1. An etchant of sufficient volume is then poured into the groove for etching, thus achieving the fabrication of the laser chip described in this embodiment. Therefore, the Bragg grating structure of the laser chip can be obtained without using a resist layer for etching control.

[0064] Example 3:

[0065] This invention provides a novel method for fabricating a laser chip, which can be used to fabricate the novel laser chip described in Embodiment 1. It should be noted that this invention focuses on the method and process output related to substantially differentiating features. Other processes, such as electrode fabrication, are not within the scope of this invention and are conventional existing technologies, and therefore will not be described in the following embodiments.

[0066] The novel laser chip fabrication method provided in this embodiment, as shown in Figure 7, involves pre-growing one or more functional layers 2 on a grating layer 1. The method includes:

[0067] In step 201, based on the defined photolithography pattern, the surface of each functional layer 2 is etched, and the etching penetrates all functional layers 2 to form etch grooves.

[0068] In step 202, an etching solution is injected into the etching tank, and the etching solution is used to etch the grating layer 1 to obtain the grating tank 11.

[0069] The width of the photolithographic pattern is determined based on the depth of the grating groove 11. In conjunction with this embodiment of the invention, as shown in Figure 8, the related steps in this embodiment will be further integrated for a relatively complete logical demonstration. That is, before etching the surfaces of each functional layer 2, the method further includes:

[0070] In step 200, the depth of the grating groove 11 is determined according to the coupling coefficient requirement of the Bragg grating and the depth of the grating layer 1, and the width of the photolithographic pattern is determined according to the depth of the grating groove 11.

[0071] In practical implementation, the depth of the grating slot 11 and the duty cycle of the grating slot 11 distribution (i.e., the spacing between each grating slot 11) both affect the coupling coefficient of the Bragg grating. In order to retain part of the structure of the grating layer 1 below the grating slot 11, and to ensure that this part of the structure can effectively support the mask layer and the laser chip above it, the depth of the grating slot 11 also needs to be determined according to the depth of the mask layer. Therefore, the depth of the grating slot 11 is determined based on the two factors of the coupling coefficient requirement of the Bragg grating and the depth of the mask layer. The specific implementation process is actually the result of weighing the two factors. Specifically, the thickness of the grating layer 1 is multiplied by a first preset coefficient to obtain a preset maximum depth. Within the range where the depth is less than or equal to the preset maximum depth, multiple optional depth values ​​are selected, and each optional depth value is used as the depth of the grating slot 11. The spacing between each grating slot 11 is adjusted to find the grating slot 11 depth and spacing that can meet the coupling coefficient requirement of the Bragg grating.

[0072] Determining the width of the photolithographic pattern based on the depth of the grating groove 11 specifically includes: multiplying the depth d of the grating groove 11 by a second preset coefficient k to obtain the width of the photolithographic pattern. Wherein, the second preset coefficient... Where θ is a preset angle.

[0073] When the material of the grating layer 1 is InP, the etching solution is a hydrochloric acid-based etching solution. In an optional embodiment, the hydrochloric acid-based etching solution is composed of HCl and H3PO4, such as a mixture of 1 part HCl and 3 parts H3PO4. By controlling the etching time or the concentration and amount of the etching solution, etching can be stopped when the depth d is reached.

[0074] In this embodiment, a mask pattern is formed on the control grating layer 1 using photolithography and other methods. Based on the characteristic that the InP material of the grating layer 1 can obtain a V-groove structure with a specific sidewall tilt angle through chemical etching, and the thickness of the grating layer 1 is designed to be greater than the etching depth, thus forming the grating morphology shown in Figure 3, without the need for the resist layer under the grating in traditional DFB. By utilizing the characteristic that the sidewall tilt angle of the InP V-groove is fixed, V-groove gratings with different etching depths can be obtained by adjusting the width of the mask pattern, thereby obtaining grating structures with arbitrary duty cycles and different coupling efficiencies.

[0075] To achieve precise control over the depth of the grating groove 11, and considering the actual laser chip manufacturing process, where laser chips are typically mass-produced on laser wafers, the following preferred implementation method is provided: laser chips are fabricated on laser wafers, as shown in Figure 9. The method further includes:

[0076] In step 301, a plurality of laser chips are disposed on the laser wafer. An ultrasonic detector 3 is disposed at the contact position between the laser wafer and the laser chips. The ultrasonic detector 3 includes a probe 31 and a processor 32. The probe 31 of the ultrasonic detector 3 is in seamless contact with the grating layer 1 of the laser chip to detect the completion of the grating groove 11 in the laser chip.

[0077] In step 302, when the grating groove 11 of the corresponding laser chip is completely formed as detected by the ultrasonic detector 3, and a portion of the structure of the grating layer 1 is still retained below the grating groove 11, the laser chip is fabricated and is qualified.

[0078] The laser wafer refers to a silicon wafer used in the fabrication of silicon semiconductor integrated circuits. Because of its circular shape, it is called a wafer. Various circuit element structures can be fabricated on the silicon wafer to create IC products with specific electrical functions (e.g., laser chips, detector chips, driver chips, etc.). Multiple laser chips are arranged in an array on the laser wafer, thereby enabling mass production of laser chips.

[0079] As shown in Figure 10, the ultrasonic detector 3 includes a probe 31 and a corresponding processor 32. The probe 31 includes an ultrasonic transmitting unit and an ultrasonic receiving unit, which are used to emit transmitted waves and receive echoes. The processor 32 is used to process the signals fed back by the probe 31 to determine the completion degree of the grating groove 11.

[0080] Each laser chip corresponds to one or more probes 31. The number of probes 31 is determined by those skilled in the art based on the internal structure and size of the laser chip. Probes 31 of multiple laser chips can belong to the same ultrasonic detector 3, that is, they are processed by the same processor 32. Alternatively, probes 31 of one laser chip can correspond to one ultrasonic detector 3.

[0081] Because the acoustic impedance of grating layer 1 and the etching solution is different, when ultrasonic waves enter the etching solution from grating layer 1, the ultrasonic waves will exhibit transmission and reflection phenomena. Based on this principle, and combined with the manufacturing structure characteristics of the laser chip described in this embodiment, the following preferred embodiment is obtained, namely, the detection of the completion degree of the hollow heat insulation region in the laser chip, as shown in Figure 11, specifically including:

[0082] In step 401, a transmission wave is emitted towards the grating layer 1 through the probe 31. When the transmission wave enters the etching solution from the grating layer 1, it is reflected and the echo is received by the probe 31.

[0083] In step 402, the completion degree of the grating groove 11 is determined based on the time difference between the emitted wave and the received echo from the probe 31.

[0084] Depending on the depth of the etching of the grating groove 11, the time difference between the emitted wave and the echo will also be different. When the time difference between the emitted wave and the echo is a preset time difference, the grating groove 11 can be considered to be completed. The preset time difference is obtained by those skilled in the art based on the propagation law of ultrasonic waves. When the ultrasonic wave passes through the grating layer 1 and enters the area that has been etched through, part of the ultrasonic wave is reflected by the etching liquid to obtain an echo. By processing the time difference between the echo and the emitted wave, the depth of the un-etched part of the grating layer 1 is obtained. By subtracting the depth of the un-etched part of the structure from the thickness of the grating layer 1, the depth of the grating groove 11 can be obtained, thereby determining whether the grating groove 11 is completed.

[0085] It should be noted that when the ultrasonic wave is incident on the grating layer 1, there are also corresponding reflected light and transmitted light. However, since the grating layer 1 is in seamless contact with the wafer and both are solid, the difference in acoustic impedance between the two is small. The reflected light can be ignored in this solution. Alternatively, the receiving and sensing range of the probe 31 can be set so that the reflected light cannot be sensed and received by the probe 31, thereby avoiding the impact of the reflected light on the solution.

[0086] As an extended implementation, another approach is to use the relative attenuation between the echo and the transmitted wave to obtain the depth of the grating groove 11, thereby determining whether the grating groove 11 is complete.

[0087] This embodiment also provides a novel laser chip fabrication system, comprising: a chip fabrication module, a probe wave emission module, an echo reception module, and a detection module. The chip fabrication module grows a grating layer 1 and a mask layer on a laser wafer. Based on a defined photolithography pattern, it etches the surface of the mask layer, etching through it to form an etching trench. An etching solution is then injected into the etching trench, and the grating layer 1 is etched using the etching solution to obtain the grating trench 11.

[0088] The probe wave emitting module is used to periodically emit a emitted wave towards the grating layer 1, and transmits the time t1 of emitting the emitted wave to the detection module; the echo receiving module is used to receive the echo reflected by the corrosive liquid, and transmits the time t2 of receiving the echo to the echo receiving module; the detection module is used to receive the time t1 from the detection module and the time t2 from the echo receiving module, and determine whether the difference between t1 and t2 is the preset time difference.

[0089] In order to more intuitively illustrate the various locations to be detected and the relationship between the emitted wave and the echo, the above implementation method uses the form of detection by a straight probe 31 in the corresponding figures and text. However, this does not mean that the type, number, and setting position of the probe 31 are limited. For example, it is also feasible to use a single array probe 31 to detect the completion of the grating groove 11. The setting position of the probe 31 is determined by those skilled in the art based on the type of probe 31 selected.

[0090] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for fabricating a novel laser chip, characterized in that, One or more functional layers (2) are pre-grown on the grating layer (1). The method includes: etching the surface of each functional layer (2) based on a defined photolithography pattern, etching through all functional layers (2) to form an etching groove; injecting an etching solution into the etching groove, and using the etching solution to etch the grating layer (1) to obtain a grating groove (11); wherein, according to the required volume of the etching solution and the area of ​​the photolithography pattern, the groove depth required to reach the required volume of the etching solution is determined, and the groove depth is used as the thickness of all functional layers (2), so that the groove formed by each functional layer (2) after etching away the photolithography pattern position is just used to control the amount of etching solution, so that in the actual chip manufacturing process, only the etching solution filled to the groove needs to be poured into the groove to achieve control of the depth of the etched grating groove (11).

2. The method for fabricating a laser chip with a novel structure according to claim 1, characterized in that, Before etching the surface of each functional layer (2), the method further includes: determining the depth of the grating groove (11) according to the coupling coefficient requirement of the Bragg grating and the depth of the grating layer (1), and determining the width of the lithographic pattern according to the depth of the grating groove (11).

3. The method for fabricating a laser chip with a novel structure according to claim 1, characterized in that, The step of determining the width of the photolithographic pattern based on the depth of the grating groove (11) specifically includes: multiplying the depth of the grating groove (11) by a second preset coefficient to obtain the width of the photolithographic pattern.

4. The method for fabricating a laser chip with a novel structure according to claim 1, characterized in that, When the material of the grating layer (1) is InP material, the etching solution is a hydrochloric acid-based etching solution.

5. The method for fabricating a laser chip with a novel structure according to claim 1, characterized in that, The method of fabricating laser chips on a laser wafer further includes: multiple laser chips are disposed on the laser wafer; an ultrasonic detector (3) is disposed at the contact position between the laser wafer and the laser chips; the ultrasonic detector (3) includes a probe (31) and a processor (32); the probe (31) of the ultrasonic detector (3) is in seamless contact with the grating layer (1) of the laser chip to detect the completion of the grating groove (11) in the laser chip; when the ultrasonic detector (3) detects that the grating groove (11) of the corresponding laser chip is completely formed, and a portion of the structure of the grating layer (1) is still retained below the grating groove (11), the laser chip is fabricated and qualified.

6. The method for fabricating a laser chip with a novel structure according to claim 5, characterized in that, The completion degree of the grating groove (11) in the laser chip is detected by: emitting a wave in the direction of the grating layer (1) through the probe (31), the emitted wave being reflected when it enters the etch solution from the grating layer (1), and receiving the echo by the probe (31); and determining the completion degree of the grating groove (11) based on the time difference between the emitted wave and the received echo by the probe (31).

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