A digitally controlled gain high fidelity input amplifier circuit

Abstract

The application relates to a digital control gain high-fidelity input amplification circuit which comprises an MCU, an analog switch U17, an operational amplifier, an electronic volume controller U16, the 7th and 8th pins of the analog switch U17 are connected to the IO output high-low level signals of the MCU, the analog switch U17 is connected to the operational amplifier, the operational amplifier is connected to the electronic volume controller U16, and the MCU is also connected to the electronic volume controller U16. The circuit of the application is composed of an SGM4519 analog switch, an NJM2122M operational amplifier (the highest gain is 28.95dB) and an NJW1195A electronic volume controller (the highest gain is 31.5dB), a high-fidelity adjustable gain amplifier with a total gain of 60.45dB is realized, and the control mode can be diversified, for example, a potentiometer control, an encoder control, a button control or an upper computer control.

Description

Technical Field

[0001] This patent application belongs to the field of input amplifier circuit technology, and more specifically, relates to a high-fidelity input amplifier circuit with digitally controlled gain. Background Technology

[0002] In electronic audio products, a preamplifier circuit is typically used to process analog audio input signals. To achieve a large adjustable gain range, a differential amplifier circuit consisting of three operational amplifiers with a potentiometer for control is usually used. This circuit requires a potentiometer to control the gain, and one drawback is that the potentiometer may wear out after prolonged use, leading to malfunctions. This compromises both control precision and the versatility of control methods. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a high-fidelity input amplifier circuit with digitally controlled gain, which can ensure both good control accuracy and versatility of control methods.

[0004] To solve the above problems, the technical solution adopted by the present invention is as follows:

[0005] A high-fidelity input amplifier circuit with digitally controlled gain includes an MCU, an analog switch U17, an operational amplifier, and an electronic volume controller U16. The high and low level signals output by the MCU's IO are connected to pins 7 and 8 of the analog switch U17 (SGM4519). The analog switch U17 is connected to the operational amplifier, the operational amplifier is connected to the electronic volume controller U16, and the MCU is also connected to the electronic volume controller U16.

[0006] Pin 1 of analog switch U17 is connected to the CHI_R_RES_IN signal terminal of the MCU. The CHI_R_RES_IN signal terminal is also connected to capacitor C75 and pin 6 of operational amplifier U15B. The other end of capacitor C75 and pin 7 of operational amplifier U15B are both connected to resistor R116. Pin 7 of operational amplifier U15B also serves as the negative CHI_IN signal output, which is connected to electronic volume controller U16. Resistor R116 is connected in sequence to resistors R115, R117, and R121.

[0007] Pin 11 of analog switch U17 is connected to the CHI_L_RES_IN signal terminal of the MCU. The CHI_L_RES_IN signal is also connected to capacitor C74 and pin 2 of operational amplifier U15A. The other end of capacitor C74 and pin 1 of operational amplifier U15A are both connected to resistor R109. Pin 1 of operational amplifier U15A is also used as the positive CHI_IN signal output. The positive CHI_IN signal is connected to electronic volume controller U16. Resistor R109 is connected in sequence to resistor R56, resistor R111, and resistor R112. The other end of resistor R112 is connected in sequence to the other end of resistor R121 through resistor R114 and capacitor E8.

[0008] Pin 5 of operational amplifier U15B is connected to GND through resistor R113, and pin 3 of operational amplifier U15A is connected to GND through resistor R110. Pin 5 of operational amplifier U15B is also connected to the CHI_IN_N signal terminal of the MCU, and pin 3 of operational amplifier U15A is also connected to the CHI_IN_P signal terminal of the MCU.

[0009] Furthermore, the amplification between resistors R109 and R56 is 1.12 times with a gain of 1dB; the amplification between resistors R56 and R111 is 2.93 times with a gain of 9.34dB; the amplification between resistors R111 and R112 is 9.08 times with a gain of 19.16dB; and the amplification between resistors R112 and R114 is 28 times with a gain of 28.95dB.

[0010] Furthermore, the analog switch U17 is an SGM4519, the operational amplifier U15A is an NJM2122M or SGM8261 with a maximum gain of 28.95dB, the operational amplifier U15B is an NJM2122M or SGM8261 with a maximum gain of 28.95dB, and the electronic volume controller U16 is an NJW1195A with a maximum gain of 31.5dB.

[0011] Furthermore, capacitor E8 is a polarized capacitor, with its positive terminal connected to resistor R114 and its negative terminal connected to resistor R121.

[0012] Furthermore, all resistors are high-precision thin-film resistors.

[0013] Furthermore, the MCU controls the gain of the electronic volume controller U16 (NJW1195A) via the SPI interface, with a maximum gain of 31.5dB and supports fine-tuning in 0.1dB steps.

[0014] Furthermore, pin 1 of the electronic volume controller U16 (NJW1195A) is connected to the positive CHI_IN signal, and pin 2 is connected to the negative CHI_IN signal. Pins 5, 7, 9, and 11 of the electronic volume controller U16 are all connected to GND. Pin 6 of the electronic volume controller U16 is grounded through polarized capacitor E11, pin 10 is grounded through polarized capacitor E12, and pin 13 is grounded through polarized capacitor E13. Pin 8 of the electronic volume controller U16 is connected to the negative CHI_OUT signal of the MCU through polarized capacitor E1, and pin 12 is connected to the positive CHI_OUT signal of the MCU through polarized capacitor E9.

[0015] Furthermore, the overall gain is greater than 60dB.

[0016] Due to the adoption of the above technical solution, the beneficial effects achieved by this invention are:

[0017] 1) The gain of the circuit of this invention is controlled by digital signals, which can realize the gain range adjustment of the 60dB microphone preamp input circuit. The control method can be diversified, such as potentiometer control, encoder control, button control or host computer control, etc.

[0018] 2) The ultra-low THD+N preamp input circuit, when tested with an AP555P audio analyzer, achieved a THD+N of -109.2dB at an input level of 4.5dB. This parameter exceeds that of most preamp input circuits on the market. (Test parameters are available in...) Figure 9 , Figure 10 )

[0019] 3) Adjustable gain, controlled by MCU, with a maximum accuracy of 0.1dB steps.

[0020] 4) Digital control amplification can greatly improve the noise introduced by the gear amplification of analog potentiometers.

[0021] 5) Compared to traditional analog mechanical potentiometers, this microphone preamp uses digital control for adjustment, which has significant advantages such as flexible use, high adjustment accuracy, no contact, low noise, anti-interference, and long life.

[0022] 6) The entire module circuit is inexpensive, costing only 1 / 3 of other integrated high-gain amplifiers. For example, a bulk purchase of a (THAT5173+THAT1580) 60dB microphone amplifier costs 6 USD, while the circuit of this invention costs less than 2 USD. Attached Figure Description

[0023] Figure 1 This is a circuit connection block diagram of the present invention.

[0024] Figure 2 The principle of the input amplification analog amplification section circuit in this invention. Figure 1 .

[0025] Figure 3 The principle of the input amplification analog amplification section circuit in this invention. Figure 2 .

[0026] Figure 4 The principle of the input amplification analog amplification section circuit in this invention. Figure 3 .

[0027] Figure 5 This is a circuit diagram of a standard three-op-amp instrumentation amplifier involved in this invention.

[0028] Figure 6 This is a diagram illustrating the gain states of the SGM4519 analog switch and NJM2122M operational amplifier in this invention.

[0029] Figure 7 The circuit principle of the NJW1195A electronic volume controller in this invention. Figure 1 .

[0030] Figure 8 The circuit principle of the NJW1195A electronic volume controller in this invention. Figure 1 .

[0031] Figure 9 The digital gain test parameters of NJW1195 in this invention Figure 1 .

[0032] Figure 10 The digital gain test parameters of NJW1195 in this invention Figure 2 . Detailed Implementation

[0033] The present invention will be further described in detail below with reference to the embodiments.

[0034] A high-fidelity input amplifier circuit with digitally controlled gain, such as Figure 1 The system includes an MCU, an analog switch U17, an operational amplifier, and an electronic volume controller U16. The MCU's IO output high and low level signals are connected to pins 7 and 8 of the analog switch U17 (SGM4519). The analog switch U17 is connected to the operational amplifier, the operational amplifier is connected to the electronic volume controller U16, and the MCU is also connected to the electronic volume controller U16.

[0035] Continue reading Figures 2-4Pin 1 of analog switch U17 is connected to the CHI_R_RES_IN signal terminal of the MCU. The CHI_R_RES_IN signal terminal is also connected to capacitor C75 and pin 6 of operational amplifier U15B. The other end of capacitor C75 and pin 7 of operational amplifier U15B are both connected to resistor R116. Pin 7 of operational amplifier U15B also serves as the negative CHI_IN signal output. The negative CHI_IN signal is connected to electronic volume controller U16. Resistor R116 is connected in sequence to resistors R115, R117, and R121.

[0036] Pin 11 of analog switch U17 is connected to the CHI_L_RES_IN signal terminal of the MCU. The CHI_L_RES_IN signal is also connected to capacitor C74 and pin 2 of operational amplifier U15A. The other end of capacitor C74 and pin 1 of operational amplifier U15A are both connected to resistor R109. Pin 1 of operational amplifier U15A also serves as the positive CHI_IN signal output, which is connected to electronic volume controller U16. Resistor R109 is connected in sequence to resistors R56, R111, and R112. The other end of resistor R112 is connected in sequence to the other end of resistor R121 through resistor R114 and capacitor E8. In terms of selection, capacitor E8 is a polarized capacitor, with its positive terminal connected to resistor R114 and its negative terminal connected to resistor R121.

[0037] Pin 5 of operational amplifier U15B is connected to GND through resistor R113, and pin 3 of operational amplifier U15A is connected to GND through resistor R110. Pin 5 of operational amplifier U15B is also connected to the CHI_IN_N signal terminal of the MCU, and pin 3 of operational amplifier U15A is also connected to the CHI_IN_P signal terminal of the MCU.

[0038] exist Figure 2 In the diagram, the amplification between resistors R109 and R56 is 1.12 times with a gain of 1dB; the amplification between resistors R56 and R111 is 2.93 times with a gain of 9.34dB; the amplification between resistors R111 and R112 is 9.08 times with a gain of 19.16dB; and the amplification between resistors R112 and R114 is 28 times with a gain of 28.95dB.

[0039] Similarly, the amplification between resistors R116 and R115 is 1.12 times with a gain of 1dB; the amplification between resistors R115 and R117 is 2.93 times with a gain of 9.34dB; the amplification between resistors R117 and R121 is 9.08 times with a gain of 19.16dB; and the amplification between resistors R121 and R114 is 28 times with a gain of 28.95dB.

[0040] In terms of selection, the analog switch U17 is an SGM4519, the operational amplifiers U15A and U15B are NJM2122M or SGM8261 with a maximum gain of 28.95dB, and the electronic volume controller U16 is an NJW1195A with a maximum gain of 31.5dB.

[0041] The MCU controls the gain of the electronic volume controller U16 (NJW1195A) via the SPI interface, with a maximum gain of 31.5dB and supports fine-tuning in 0.1dB steps.

[0042] Pin 1 of the electronic volume controller U16 (NJW1195A) is connected to the positive CHI_IN signal, and pin 2 is connected to the negative CHI_IN signal. Pins 5, 7, 9, and 11 of the electronic volume controller U16 are all connected to GND. Pin 6 of the electronic volume controller U16 is grounded through polarized capacitor E11, pin 10 is grounded through polarized capacitor E12, and pin 13 is grounded through polarized capacitor E13. Pin 8 of the electronic volume controller U16 is connected to the negative CHI_OUT signal of the MCU through polarized capacitor E1, and pin 12 is connected to the positive CHI_OUT signal of the MCU through polarized capacitor E9.

[0043] Circuit Description: This circuit combines two circuit components, resulting in a total gain of over 60dB: 28.95dB from the SGM4519 analog amplifier and 31.5dB from the NJW1195 digital amplifier. The gain is adjusted by the MCU through a software algorithm.

[0044] Regarding the use of electronic components:

[0045] 1. The SGM4519 is a 2-channel 4-to-1 ultra-low internal resistance analog switch chip with an ultra-small package TQFN16. The MCU's IO output high and low level signals are given to pins 7 and 8 of the SGM4519 to realize the function of switching the feedback resistor value of the op-amp circuit to change the circuit gain factor. This part is responsible for coarse gain adjustment.

[0046] 2. High-precision thin-film resistors are selected.

[0047] 3. The operational amplifier chip should be either NJM2122 or the domestically produced SGM8261.

[0048] Regarding magnification, refer to Figure 5 , A1+A2: OP2177, AD8698; A3: OP1177.

[0049] Calculation formula based on standard three op-amp instrumentation amplifier circuit ( Figure 5 )

[0050] When R1 = R3, R2 = R4, R5 = R6, and Vout = (Vin2 - Vin1) * (1 + (2R5 / RG) * (R2 / R1), the preamplifier gain is calculated as follows:

[0051] Vout=(Vin2-Vin1)*(1+(2R5 / RG)

[0052] Place it in our corresponding circuit ( Figures 2-4 That is, Vout = 1 + (R109 * 2 + analog switch internal resistance)

[0053] / (R56+R111+R112)*2+R114) Because the upper and lower resistors are symmetrical, the same resistors are multiplied together during the calculation.

[0054] exist Figures 2-4 In China, combined Figure 6 The actual gain of the SGM4519 is described below. The SGM4519 analog switch + NJM2122M op-amp gain states have four types, which are explained below:

[0055] State 1:

[0056] When the analog switch is in low gain state 1, the MCU outputs a low level to CH1_SELCT_A and CH1_SELCT_B, and the X-X3 (networks CH1_L_RES_IN and CH1_L_1dB) and Y-Y3 (networks CH1_R_RES_IN and CH1_R_1dB) of analog switch U17 are turned on, while the other 3 sets of switches are turned off.

[0057] Vout=1+(R109X2+Analog switch internal resistance / (R56+R111+R112)*2+R114)=1+(562*2+22 / ((2870+1210+390)*2+374)=1.123

[0058] The amplification factor obtained through the calculation formula is 1.123 times, and the operational gain in dB is:

[0059] =LOG(1.123)*20=1.0079dB

[0060] Explanation: The MCU controls the SGM4519 analog switch + NJM2122M op-amp in state 1 and the NJW1195A to obtain a total gain of 32dB. The analog switch part is fixed at 1dB, and the other 31dB gain can be finely adjusted in 0.1dB steps on the NJW1195A.

[0061] State 2:

[0062] When gain state 2 is selected in the analog switch, the MCU outputs a low level to CH1_SELCT_A and a high level to CH1_SELCT_B. The X-X2 (networks CH1_L_RES_IN and CH1_L_9dB) and Y-Y2 (networks CH1_R_RES_IN and CH1_R_9dB) of analog switch U17 are turned on, and the other 3 sets of switches are turned off.

[0063] Vout = 1 + (R109*2 + R56*2 + internal resistance of analog switch)

[0064] / (R111+R112)*2+R114)=1+(562*2+2870*2+22 / ((1210+390)*2+374)=2.926

[0065] The amplification factor obtained through the calculation formula is 2.926 times, and the operational gain in dB is:

[0066] =LOG(2.926)*20=9.32dB

[0067] Explanation: The MCU controls the SGM4519 analog switch + NJM2122M op-amp (state 2) and NJW1195A to obtain a gain of 42dB. The analog switch part has a fixed gain of 9.32dB, and the other 31dB gain can be finely adjusted in 0.1dB steps on the NJW1195A.

[0068] State 3:

[0069] When the analog switch is selected to be in high gain state 3, the MCU outputs a high level to CH1_SELCT_A and a low level to CH1_SELCT_B. Analog switches X-X1 (networks CH1_L_RES_IN and CH1_L_19dB) and Y-Y1 (networks CH1_R_RES_IN and CH1_R_19dB) are turned on, while the other 3 sets of switches are turned off.

[0070] Vout = 1 + (R109*2 + R56*2 + R111*2 + internal resistance of analog switch)

[0071] / R112*2+R114)=1+(562*2+2870*2+1210*2+22 / 390*2+374)=9.064

[0072] The amplification factor obtained through the calculation formula is 9.064 times, and the operational gain in dB is:

[0073] =LOG(9.064)*20=19.146dB

[0074] Note: By controlling the SGM4519 analog switch + NJM2122M op-amp (state 3) and NJW1195A via MCU, a total gain of 50dB is obtained. The analog switch section has a fixed gain of 19.14dB, while the other 31dB gain can be finely adjusted in 0.1dB steps on the NJW1195A.

[0075] State 4:

[0076] When the highest gain state 4 of the analog switches is selected, the MCU outputs a high level to CH1_SELCT_A and CH1_SELCT_B, and the analog switches X-X1 (networks CH1_L_RES_IN and CH1_L_28.5dB) and Y-Y1 (networks CH1_R_RES_IN and CH1_R_28.5dB) are turned on, while the other 3 sets of switches are turned off.

[0077] Vout = 1 + (R109*2 + R56*2 + R111*2 + R112*2 + analog switch internal resistance)

[0078] / R114)=1+(562*2+2870*2+1210*2+390*2+22 / 374)=27.96

[0079] The amplification factor obtained through the calculation formula is 27.96 times, and the operational gain in dB is:

[0080] LOG(27.96)*20=28.933dB

[0081] The amplification gain was found to be 28.933 dB.

[0082] Note: By controlling the SGM4519 analog switch + NJM2122M op-amp (state 4) and NJW1195A via MCU, a total gain of 60dB is obtained. The analog switch section has a fixed gain of 28.93dB, while the other 31dB gain can be finely adjusted in 0.1dB steps on the NJW1195A.

[0083] The circuit schematic of the NJW1195A electronic volume controller is shown below. Figures 7-8 The MCU controls the gain of the NJW1195A via the SPI interface, with a maximum gain of 31.5dB and supports fine-tuning in 0.1dB steps. This part is responsible for fine-tuning the gain. By combining the two circuit parts, the total gain of the circuit is: 28.95dB from the SGM4519 analog amplification plus 31.5dB from the NJW1195 digital amplification, resulting in a gain of over 60dB. The gain is adjusted by the MCU through a software algorithm.

[0084] Therefore, using the circuit composed of the SGM4519 analog switch, NJM2122M operational amplifier (maximum gain 28.95dB), and NJW1195A electronic volume controller U16 (maximum gain 31.5dB) in this invention, a high-fidelity adjustable gain amplifier with a total gain of 60.45dB can be achieved. Furthermore, the control methods can be diversified, such as potentiometer control, encoder control, button control, or host computer control. This ensures both good control accuracy and diverse control methods, thus possessing extremely high application value.

Claims

1. A digitally controlled gain high fidelity input amplifier circuit, characterized by: It includes an MCU, an analog switch U17, an operational amplifier, and an electronic volume controller U16. The operational amplifiers include operational amplifier U15B and operational amplifier U15A. The analog switch U17 is an SGM4519, the operational amplifier U15A is an NJM2122M or SGM8261, the operational amplifier U15B is an NJM2122M or SGM8261, and the electronic volume controller U16 is an NJW1195A. The MCU controls the gain of the electronic volume controller U16 through the SPI interface. The high and low level signals output by the MCU's IO are connected to pins 7 and 8 of the analog switch U17. The analog switch U17 is connected to the operational amplifier, which is connected to the electronic volume controller U16. The MCU is also connected to the electronic volume controller U16. Pin 1 of analog switch U17 is connected to the CHI_R_RES_IN signal terminal of the MCU. The CHI_R_RES_IN signal terminal is also connected to pin 1 of capacitor C75 and pin 6 of operational amplifier U15B. Pin 2 of capacitor C75 and pin 7 of operational amplifier U15B are both connected to one end of resistor R116. Pin 7 of operational amplifier U15B also serves as the negative CHI_IN signal output, which is connected to electronic volume controller U16. The other end of resistor R116 is connected in sequence to resistors R115, R117, and R121. Pin 11 of analog switch U17 is connected to the CHI_L_RES_IN signal terminal of the MCU. The CHI_L_RES_IN signal is also connected to pin 1 of capacitor C74 and pin 2 of operational amplifier U15A. Pin 2 of capacitor C74 and pin 1 of operational amplifier U15A are both connected to one end of resistor R109. Pin 1 of operational amplifier U15A also serves as the positive CHI_IN signal output, which is connected to electronic volume controller U16. The other end of resistor R109 is connected in sequence to resistors R56, R111, and R112. The other end of resistor R112 is connected in sequence to the other end of resistor R121 through resistor R114 and capacitor E8. Pin 5 of operational amplifier U15B is connected to GND through resistor R113, and pin 3 of operational amplifier U15A is connected to GND through resistor R110. Pin 5 of operational amplifier U15B is also connected to the CHI_IN_N signal terminal of the MCU, and pin 3 of operational amplifier U15A is also connected to the CHI_IN_P signal terminal of the MCU. Pin 1 of the electronic volume controller U16 is connected to the positive CHI_IN signal, and pin 2 is connected to the negative CHI_IN signal. Pins 5, 7, 9, and 11 of the electronic volume controller U16 are all connected to GND. Pin 6 of the electronic volume controller U16 is grounded through polarized capacitor E11, pin 10 is grounded through polarized capacitor E12, and pin 13 is grounded through polarized capacitor E13. Pin 8 of the electronic volume controller U16 is connected to the negative CHI_OUT signal of the MCU through polarized capacitor E1, and pin 12 is connected to the positive CHI_OUT signal of the MCU through polarized capacitor E9.

2. The high-fidelity input amplifier circuit with digitally controlled gain according to claim 1, characterized in that: The amplification between resistors R109 and R56 is 1.12 times with a gain of 1dB; the amplification between resistors R56 and R111 is 2.93 times with a gain of 9.34dB; the amplification between resistors R111 and R112 is 9.08 times with a gain of 19.16dB; and the amplification between resistors R112 and R114 is 28 times with a gain of 28.95dB.

3. A digitally controlled gain high fidelity input amplifier circuit as claimed in claim 1, characterized in that: Capacitor E8 is a polarized capacitor. The positive terminal of capacitor E8 is connected to resistor R114, and the negative terminal is connected to resistor R121.

4. A digitally controlled gain high fidelity input amplifier circuit as claimed in claim 1, characterized in that: All resistors are high-precision thin-film resistors.

5. A digitally controlled gain high fidelity input amplifier circuit as claimed in claim 1, characterized in that: The overall gain is greater than 60dB.

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