Pixel circuit and driving method thereof, and display panel

Abstract

The present invention discloses a pixel circuit and a driving method thereof, and a display panel. The pixel circuit includes: a driving module, a first reset module, and a first variable resistance module. The driving module is used to generate a driving current to drive the light-emitting module to emit light; the output end of the first reset module is connected to the control end of the driving module; the first end of the first variable resistance module is connected to the input end of the first reset module, the second end of the first variable resistance module is connected to the first reset voltage end, and the first variable resistance module is turned on in the gate initialization stage and turned off in the light-emitting stage. The embodiment of the present invention can suppress the leakage of the control end of the driving module, improve the stability of the light-emitting brightness of the light-emitting module, and enhance the display effect of the display panel.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof, and a display panel. Background Art

[0002] With the continuous development of display technology, the application scope of display panels is becoming more and more extensive, and people's requirements for display panels are also getting higher and higher. In particular, the display quality of display panels has always been one of the important indicators for consumers and panel manufacturers to measure the quality of display panels. In the prior art, the luminous brightness of the light-emitting module is unstable, which affects the display effect of the display panel. Summary of the invention

[0003] The present invention provides a pixel circuit and a driving method thereof, and a display panel, so as to suppress leakage of a control end of a driving module, improve the stability of the light emitting brightness of a light emitting module, and enhance the display effect of a display panel.

[0004] In a first aspect, an embodiment of the present invention provides a pixel circuit, including:

[0005] A driving module, used for generating a driving current to drive the light-emitting module to emit light;

[0006] A first reset module, wherein an output end of the first reset module is connected to a control end of the driving module;

[0007] A first variable resistance module, wherein a first end of the first variable resistance module is connected to an input end of the first reset module, a second end of the first variable resistance module is connected to a first reset voltage end, and the first variable resistance module is turned on in a gate initialization phase and turned off in a light-emitting phase.

[0008] Optionally, when the first reset voltage terminal transmits a first reset voltage, the first variable resistor module presents a low-resistance state, so that the first reset voltage is transmitted to the control end of the driving module through the first variable resistor module and the first reset module; when the first reset voltage terminal transmits a second reset voltage, the first variable resistor module presents a high-resistance state, suppressing leakage generated through the first reset module and the first variable resistor module.

[0009] Optionally, the first variable resistance module includes: a memristor; a first electrode of the memristor serves as a first end of the first variable resistance module, and a second electrode of the memristor serves as a second end of the first variable resistance module;

[0010] Preferably, the memristor further comprises an intermediate layer disposed between the first electrode and the second electrode;

[0011] Preferably, the material of the first electrode is Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO;

[0012] The intermediate layer includes at least one layer of HfOx, Al2O3, ZnO, ITOx, TaOx, Ta2O5 or SrTiO3;

[0013] The material of the second electrode is Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO.

[0014] Optionally, the first reset module includes: a first transistor, a gate of the first transistor serving as a control terminal of the first reset module, a first electrode of the first transistor serving as an input terminal of the first reset module, and a second electrode of the first transistor serving as an output terminal of the first reset module;

[0015] Wherein, the first transistor is a single-gate transistor or a double-gate transistor.

[0016] Optionally, the pixel circuit further includes:

[0017] A second reset module, wherein an output end of the second reset module is connected to an anode of the light emitting module;

[0018] a second variable resistance module, wherein a first end of the second variable resistance module is connected to an input end of the second reset module, a second end of the second variable resistance module is connected to a second reset voltage end, and the second variable resistance module is turned on in an anode initialization phase and turned off in a light-emitting phase;

[0019] Preferably, the structure of the second variable resistance module is the same as that of the first variable resistance module;

[0020] Preferably, the pixel circuit further includes:

[0021] A data writing module connected to the first end of the driving module;

[0022] A threshold compensation module, connected to the control end of the driving module and the second end of the driving module respectively;

[0023] A light-emitting control module, connected in series with the driving module and the light-emitting module between the first power source and the second power source;

[0024] The storage module is connected between the first power source and the control end of the driving module.

[0025] In a second aspect, an embodiment of the present invention further provides a display panel, comprising: a pixel circuit provided by any embodiment of the present invention.

[0026] In a third aspect, an embodiment of the present invention further provides a method for driving a pixel circuit, which is used to drive the pixel circuit provided by any embodiment of the present invention; the driving method comprises:

[0027] In the gate initialization stage, the first reset module is controlled to be turned on, and the potential of the first reset voltage terminal is controlled to turn on the first variable resistor module, and the potential of the first reset voltage terminal is transmitted to the control terminal of the driving module through the first variable resistor module and the first reset module;

[0028] In the light-emitting stage, the driving module generates a driving current according to the potential of its control terminal to drive the light-emitting module to emit light; and controls the potential of the first reset voltage terminal to turn off the first variable resistance module to suppress leakage generated through the first reset module and the first variable resistance module.

[0029] Optionally, in the gate initialization stage, the first reset voltage terminal is controlled to transmit a first reset voltage so that the first variable resistance module is in a low resistance state;

[0030] In the light emitting stage, controlling the first reset voltage terminal to transmit a second reset voltage so that the first variable resistance module is in a high impedance state;

[0031] Preferably, before the gate initialization phase starts, the first reset voltage terminal is controlled to transmit a first reset voltage; and / or, before the light emitting phase starts, the first reset voltage terminal is controlled to transmit a second reset voltage.

[0032] Optionally, in each display frame, the potential of the first reset voltage is the same;

[0033] and / or, in each display frame, the potential of the second reset voltage is the same;

[0034] Preferably, the pixel circuit further comprises: a data writing module and a threshold compensation module; the first variable resistance module comprises a memristor;

[0035] The potential difference between the lower limit potential of the control end of the driving module and the first reset voltage is greater than the forward set voltage of the memristor; wherein the lower limit potential is the potential transmitted to the control end of the driving module via the data writing module and the threshold compensation module when the minimum data voltage is transmitted on the data line connected to the data writing module;

[0036] Preferably, the lower limit potential is greater than 0, and the potential of the first reset voltage is the negative positive set voltage;

[0037] Preferably, the potential of the second reset voltage is the absolute value of the reverse reset voltage of the memristor.

[0038] Optionally, the potential jump moment of the first reset voltage terminal occurs outside the light emitting stage.

[0039] In the pixel circuit provided by the embodiment of the present invention, by setting a first variable resistance module corresponding to the first reset module on the leakage path of the driving module control end, and utilizing the adjustable on-off state characteristic of the first variable resistance module, the leakage current suppression of the leakage path can be achieved. Specifically, in the gate initialization stage, by controlling the first variable resistance module to be turned on, the potential of the first reset voltage end can be normally written to the driving module control end, and the reset of the driving module control end can be completed; in the light-emitting stage, when the potential of the driving module control end needs to be maintained, the transmission of the off-state leakage current of the first reset module can be suppressed by controlling the first variable resistance module to be turned off, thereby ensuring the potential maintenance effect of the driving module control end and improving the stability of the driving current generated by the driving module. Therefore, compared with the prior art, the embodiment of the present invention can suppress the leakage of the driving module control end, improve the stability of the light-emitting brightness of the light-emitting module, and enhance the display effect of the display panel.

[0040] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 is a structural schematic diagram of a pixel circuit provided by an embodiment of the present invention;

[0043] Figure 2 is a structural schematic diagram of a memristor provided by an embodiment of the present invention;

[0044] Figure 3 is an IV characteristic curve diagram of a memristor provided by an embodiment of the present invention;

[0045] Figure 4 is a structural schematic diagram of another pixel circuit provided by an embodiment of the present invention;

[0046] Figure 5 is a driving timing diagram of a pixel circuit provided by an embodiment of the present invention;

[0047] Figure 6 is an equivalent structural diagram of a pixel circuit in a gate initialization stage provided by an embodiment of the present invention;

[0048] Figure 7 is an equivalent structural diagram of a pixel circuit in a light-emitting stage provided by an embodiment of the present invention;

[0049] Figure 8 is a structural schematic diagram of another pixel circuit provided by an embodiment of the present invention;

[0050] Fig. 9 It is a flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0051] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0052] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0053] The embodiment of the present invention provides a pixel circuit, which can effectively suppress the leakage of the control terminal of the driving module and ensure the stability of the light emitting brightness of the light emitting module. Figure 1 is a schematic diagram of a pixel circuit provided by an embodiment of the present invention. Figure 1 , the pixel circuit includes: a driving module 10, a first reset module 70 and a first variable resistance module 91. The output end of the first reset module 70 is connected to the control end of the driving module 10. The first end of the first variable resistance module 91 is connected to the input end of the first reset module 70, and the second end of the first variable resistance module 91 is connected to the first reset voltage end. The first reset voltage end can be connected to the first initialization signal line, and the first initialization signal line transmits the first initialization signal Vini to the first reset voltage end.

[0054] Among them, the on-off state of the first variable resistance module 91 is adjustable. For example, the first variable resistance module 91 can determine its resistance according to the potential difference between its two ends. The first variable resistance module 91 is close to the on state when it is in a low resistance state, and close to the off state when it is in a high resistance state. Based on this characteristic of the first variable resistance module 91, the on-off state of the first variable resistance module 91 can be controlled by adjusting the potential transmitted by the first reset voltage terminal, that is, adjusting the potential of the first initialization signal Vini. Exemplarily, when the first reset voltage terminal transmits the first reset voltage, the first variable resistance module 91 is turned on in a low resistance state, so that the first reset voltage can be smoothly transmitted to the control end of the driving module 10 through the first variable resistance module 91 and the first reset module 70; when the first reset voltage terminal transmits the second reset voltage, the first variable resistance module 91 is turned off in a high resistance state, which can suppress the leakage current transmitted from the control end of the driving module 10 via the first reset module 70 and the first variable resistance module 91.

[0055] Therefore, in coordination with the driving timing of the pixel circuit, the first initialization signal Vini is set as a signal with a variable potential, and the on-off state of the first variable resistance module 91 is controlled in a timely manner, so that each driving stage of the pixel circuit can be more reliably performed.

[0056] In the pixel circuit provided by the embodiment of the present invention, by setting the first variable resistor module 91 corresponding to the first reset module 70 on the leakage path of the control end of the driving module 10, the leakage current of the leakage path can be suppressed by using the adjustable on-off state of the first variable resistor module 91. Specifically, in the gate initialization stage, by controlling the first variable resistor module 91 to be turned on, the potential of the first reset voltage end can be normally written to the control end of the driving module 10, and the reset of the control end of the driving module 10 can be completed; in the light-emitting stage, when the potential of the control end of the driving module 10 needs to be maintained, the transmission path of the off-state current of the first reset module 70 can be blocked by controlling the first variable resistor module 91 to be turned off, and the leakage of the control end of the driving module 10 can be suppressed, thereby ensuring the potential maintenance effect of the control end of the driving module 10 and improving the stability of the driving current generated by the driving module 10. Therefore, compared with the prior art, the embodiment of the present invention can suppress the leakage of the control end of the driving module 10, improve the stability of the light-emitting brightness of the light-emitting module 20, and improve the display effect of the display panel.

[0057] On the basis of the above embodiments, optionally, the first variable resistance module 91 includes: a memristor. Figure 2 is a structural schematic diagram of a memristor provided by an embodiment of the present invention; Figure 3 : is an IV characteristic curve diagram of a memristor provided by an embodiment of the present invention. Figure 2 and Figure 3 , the structure and working characteristics of the memristor are illustrated.

[0058] See also Figure 2 In one embodiment, optionally, the first electrode TE (top electrode, TopElectrode) of the memristor M serves as the first end of the first variable resistance module 91, and the second electrode BE (bottom electrode, BottomElectrode) of the memristor M serves as the second end of the first variable resistance module 91, and the memristor M also includes an intermediate layer Switch Layer arranged between the first electrode TE and the second electrode BE, forming a metal-intermediate layer-metal MIM structure.

[0059] The material of the first electrode TE can be Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO; it can also be other metals or metal oxides. The material of the intermediate layer Switch Layer can be HfO2, HfO x 、Al2O3、ZnO、ITO x 、TaO x , Ta2O5 or SrTiO3 and other metal oxide materials and perovskite materials, wherein the intermediate layer SwitchLayer can be a single layer material or a multi-layer composite film between these materials. The material of the second electrode BE can be Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO; it can also be other metals or metal oxides.

[0060] For example, the memristor M can be a very thin piece of TiO2 sandwiched between two electrodes. Then, the TiO2 layer is divided into two parts, one half is normal titanium dioxide (undoped) and the other half is slightly oxygen-deficient (doped). When a positive bias is applied to the electrode on the oxygen-deficient side, the oxygen vacancies will migrate to the electrode on the other side, forming an oxygen vacancy conductive channel between the electrodes, and the overall resistance of the memristor M will decrease; when a negative bias is applied to the electrode on the oxygen-deficient side, the electric field will push the oxygen vacancies to the doped area, and the overall resistance of the memristor M will increase accordingly.

[0061] Specifically, the IV characteristic curve of the memristor M can be found in Figure 3 , the potential difference between the first electrode TE and the second electrode BE is recorded as VTE, and the characteristics of the memristor M are as follows:

[0062] When VTE ≥ Vset, the memristor M is in a low resistance state, i.e., a low resistance state LRS, where Vest is the forward set voltage of the memristor M. Therefore, applying a positive bias voltage greater than or equal to Vset to the memristor M first can put the device in a low resistance state LRS, and then applying a bias voltage greater than -Vreset can keep the memristor M in this low resistance state LRS. Figure 3The solid straight line arrow in . Wherein, -Vreset is the reverse reset voltage of the memristor M.

[0063] When VTE<-Vreset, the memristor M is in a high resistance state, that is, a high resistance state HRS. Therefore, applying a negative bias voltage exceeding Vreset to the memristor M first can put the device in a high resistance state HRS, and then applying a bias voltage less than Vset can keep the memristor M in this high resistance state HRS. Figure 3 The dashed straight arrow in the .

[0064] The specific driving process of the pixel circuit provided with the first variable resistance module 91 is described in detail below in combination with the specific structure of the pixel circuit.

[0065] Continue to see Figure 1 , exemplarily, the pixel circuit includes a driving module 10, a light emitting module 20, a data writing module 30, a threshold compensation module 40, a light emitting control module 50, a storage module 60, a first reset module 70 and a second reset module 80. The data writing module 30 is connected to the first end of the driving module 10, and is used to transmit the data voltage Vdata to the driving module 10; the threshold compensation module 40 is connected between the control end and the second end of the driving module 10; the first reset module 70 is connected to the control end of the driving module 10, and is used to transmit the first initialization signal Vini to the control end of the driving module 10; the storage module 60 is connected to the control end of the driving module 10, and is used to store the potential of the control end of the driving module 10; the second reset module 80 is connected to the anode of the light emitting module 20, and is used to transmit the second initialization signal Vref to the anode of the light emitting module 20; the light emitting control module 50, the driving module 10 and the light emitting module 20 are connected in series between the first power supply and the second power supply, the first power supply is used to provide the first power supply signal VDD, and the second power supply is used to provide the second power supply signal VSS. Exemplarily, the first power signal VDD is a positive potential, such as a 4.6V DC signal; the second power signal VSS is a negative potential, such as a -3V DC signal.

[0066] So, for Figure 1The pixel circuit in the working process: in the gate initialization stage, the first reset module 70 can be controlled to be turned on, and the first reset voltage terminal can be controlled to be connected to the first reset voltage, so that the first variable resistor module 91 is in a low resistance state, and the first reset voltage is transmitted to the control terminal of the driving module 10 through the first variable resistor module 91 and the first reset module 70, and the control terminal of the driving module 10 is reset so that the subsequent data writing process can proceed smoothly. In the data writing stage, the data writing module 30 and the threshold compensation module 40 can be controlled to be turned on, and the potential related to the data voltage Vdata and the threshold voltage of the driving module 10 is written to the control terminal of the driving module 10. In any stage before the light-emitting stage, the second reset module 80 can be controlled to be turned on, so that the second initialization signal Vref is transmitted to the anode of the light-emitting module 20 through the second reset module 80, and the anode of the light-emitting module 20 is reset. In the light-emitting stage, the light-emitting control module 50 can be controlled to be turned on, and the driving module 10 can generate a driving current according to the potential of its control end to drive the light-emitting module 20 to emit light; in this stage, the storage module 60 stores the potential of the control end written into the driving module 10 in the data writing stage; and, in this stage, the second reset voltage end is controlled to be connected to the second reset voltage, so that the first variable resistance module 91 is in a high-impedance state, so as to suppress the leakage generated through the first reset module 70 and the first variable resistance module 91, and improve the stability of the potential of the control end of the driving module 10.

[0067] Based on the above embodiments, optionally, the first reset module 70 can control whether the input terminal and the output terminal are connected according to the potential of the control terminal. Figure 4 , exemplarily, the first reset module 70 may specifically include: a first transistor T1; the gate of the first transistor T1 serves as the control terminal of the first reset module 70, which can be connected to the first scanning signal S1; the first electrode of the first transistor T1 serves as the input terminal of the first reset module 70, connected to the first terminal of the first variable resistor module 91; the second electrode of the first transistor T1 serves as the output terminal of the first reset module 70, connected to the control terminal of the driving module 10. In this embodiment, one transistor is used to form the first reset module 70, so that the structure of the first reset module 70 is simple and easy to implement.

[0068] Specifically, for the pixel circuit, the driving module 10 includes a driving transistor DTFT. The light-emitting module 20 includes a light-emitting device OLED. The data writing module 30 includes a second transistor T2; the gate of the second transistor T2 is connected to the third scan line and connected to the third scan signal S3; the first electrode of the second transistor T2 is connected to the data line and connected to the data voltage Vdata; the second electrode of the second transistor T2 is connected to the first electrode of the driving transistor DTFT. The threshold compensation module 40 includes a third transistor T3, which is connected between the gate and the second electrode of the driving transistor DTFT, and the gate of the third transistor T3 is connected to the third scan signal S3. The first reset module 70 includes a first transistor T1; the gate of the first transistor T1 is connected to the first scan line and connected to the first scan signal S1; the first electrode of the first transistor T1 is connected to the first electrode of the memristor M, and the second electrode of the first transistor T1 is connected to the gate of the driving transistor DTFT. The light-emitting control module includes a fifth transistor T5 and a sixth transistor T6; the gates of the fifth transistor T5 and the sixth transistor T6 are connected to the light-emitting control signal line, and the light-emitting control signal EM is connected. The fifth transistor T5, the driving transistor DTFT, the sixth transistor T6 and the light-emitting device are connected in series between the first power supply and the second power supply. The second reset module 80 includes a seventh transistor T7; the gate of the seventh transistor T7 is connected to the second scanning line and the second scanning signal S2 is connected; the first electrode of the seventh transistor T7 is used as the input end of the second reset module 80, connected to the second reset voltage end, and the second reset voltage end can be connected to the second initialization signal line and the second initialization signal Vref is connected; the second electrode of the seventh transistor T7 is connected to the anode of the light-emitting device OLED. The storage module includes a storage capacitor Cst, which is connected between the first power supply and the gate of the driving transistor DTFT.

[0069] Exemplarily, each transistor in the pixel circuit may be an LTPS type P-type transistor. To improve the leakage suppression effect, at least one of the third transistor T3 and the first transistor T1 may be set as a dual-gate transistor or an IGZO type N-type transistor. Exemplarily, any one of the first scan signal S1 and the third scan signal S3 may be multiplexed as the second scan signal S2 to simplify the wiring of the display panel. The following is an example of multiplexing the third scan signal S3 as the second scan signal S2.

[0070] Combination Figure 4 and Figure 5, taking the case where each transistor in the pixel circuit is a P-type transistor, which is turned off at a positive gate potential and turned on at a negative gate potential as an example, the driving process of the pixel circuit includes: a non-luminous stage T1 and a luminous stage T2; the non-luminous stage T1 may include a gate initialization stage T11, a data writing stage T12, and an anode initialization stage T13. In this embodiment, the third scanning signal S3 is multiplexed as the second scanning signal S2, and the data writing stage T12 and the anode initialization stage T13 are performed simultaneously. Specifically:

[0071] In the gate initialization stage T11, the first scanning signal S1 is at a low potential, and the first transistor T1 is turned on. When the first transistor T1 is just turned on, the gate of the driving transistor DTFT still maintains the potential written in the data writing stage in the previous frame display. The potential of the first initialization signal Vini is set to the first reset voltage V1 at this time. By setting the value of the first reset voltage V1, the potential difference between the potential written to the gate of the driving transistor DTFT in the previous display frame and the first reset voltage V1 in the current display frame is greater than the forward set voltage Vset of the memristor M, so that the memristor M can be converted to a low resistance state LRS. The memristor M is equivalent to a switching element. The equivalent structure of the pixel circuit in this state can be seen in Figure 6 In this stage, the first reset voltage V1 can be smoothly written into the gate of the driving transistor DTFT through the memristor M and the first transistor T1. In this way, the gate of the driving transistor DTFT can be smoothly reset to ensure that the driving transistor DTFT can be smoothly turned on in the subsequent data writing stage T12.

[0072] In the data writing stage T12, the third scanning signal S3 is at a low potential, the second transistor T2 and the third transistor T3 are turned on, and the data voltage Vdata is transmitted to the gate of the driving transistor DTFT through the second transistor T2, the first electrode and the second electrode of the driving transistor DTFT, and the third transistor T3, until the gate potential of the driving transistor DTFT is Vdata+Vth, the driving transistor DTFT is turned off, and the data writing is completed. Wherein, Vth is the threshold voltage of the driving transistor DTFT.

[0073] In the anode initialization stage T13, the second scanning signal S2 is at a low potential, the seventh transistor T7 is turned on, and the second initialization signal Vref is transmitted to the anode of the light emitting device OLED through the seventh transistor T7 to reset the anode of the light emitting device OLED.

[0074] In the light-emitting stage T2, the light-emitting control signal EM is at a low potential, the fifth transistor T5 and the sixth transistor T6 are turned on, and the driving transistor DTFT generates a driving current according to its gate potential to drive the light-emitting device OLED to emit light. Among them, since the first transistor T1 is converted to an off state at the end of the gate initialization stage T11, the potential of the first end of the memristor M is equivalent to floating. At the end of the gate initialization stage T11, the potential of the first end of the memristor M basically maintains the first reset voltage V1. In the subsequent driving process, the potential of the first end of the memristor M may change slightly due to the off-state leakage current of the first transistor T1, but the change is not large. In the light-emitting stage T2, the potential of the first initialization signal Vini is the second reset voltage V2. By setting the value of the second reset voltage V2, the potential difference between the current potential of the first end of the memristor M and the second reset voltage V2 is less than the reverse reset voltage -Vreset of the memristor M, so that the memristor M can be converted to a high-resistance state HRS. The equivalent structure of the pixel circuit in this state can be seen in Figure 7 In this way, it is equivalent to setting a large resistor on the leakage path of the gate of the driving transistor DTFT through the first transistor T1, which can effectively cut off the leakage current path and play a role in maintaining the stability of the gate potential of the driving transistor DTFT.

[0075] In the above embodiments, the first transistor T1 is exemplarily shown to be a dual-gate structure, but this is not intended to limit the present invention. Figure 8 As shown, optionally, since a memristor M is provided as a leakage suppression device, the first transistor T1 can also be set as a single-gate transistor, thereby reducing the consumption of layout design space while ensuring the maintenance effect of the gate potential of the driving transistor DTFT.

[0076] The above embodiments exemplarily provide a solution of setting the first variable resistor module 91 along the leakage path of the first reset module 70 for the control end of the driving module 10, but it is not intended to limit the present invention. In other embodiments, the second reset module 80 is also turned off during the light-emitting stage, and there may also be leakage due to the off-state current of the seventh transistor T7, for example, leakage to the second reset voltage end. Then, if Figure 8 As shown, optionally, a second variable resistor module 92 may also be provided for the leakage path through the second reset module 80. By controlling the second initialization signal Vref to be a signal with a variable potential, and combining the driving process of the pixel circuit to adjust the potential transmitted by the second reset voltage terminal, the on-off state of the second variable resistor module 92 can be controlled, and leakage suppression on the leakage path can be achieved.

[0077] Specifically, the second variable resistor module 92 can be controlled to be turned on in the anode initialization stage T13 to complete the resetting of the anode of the light-emitting device OLED; and the second variable resistor module 92 can be controlled to be turned off in the light-emitting stage T2 to suppress the leakage generated by the second reset module 80.

[0078] Based on the above embodiments, optionally, the structure of the second variable resistance module 92 may be the same as that of the first variable resistance module 91. For example, the second variable resistance module 92 may also be composed of a memristor M. The characteristics of the memristor M can be seen in Figure 2-Figure 3 The explanation will not be repeated here.

[0079] In summary, a corresponding variable resistance module can be set for the reset module in any leakage path in the pixel circuit. In the driving process of the pixel circuit, as long as the corresponding variable resistance module is controlled to be in a low resistance state when the reset module needs to be turned on, the function of the reset module can be guaranteed to be normal; when the reset module needs to be turned off, the corresponding variable resistance module is controlled to be in a high resistance state, which can effectively suppress the leakage current generated by the off-state leakage of the reset module.

[0080] It should be noted that when a memristor M is provided in the leakage path, the initialization signal potential connected to the reset voltage terminal at the end of the leakage path is adjustable. Figure 8 As shown, the specific potentials of the two initialization signals at different stages can be specifically set according to the working characteristics of the corresponding reset modules. The first reset voltages corresponding to different reset modules can be different, and the second reset voltages can also be different; and the first reset voltages corresponding to different data voltages can be different, and the second reset voltages can also be different. When the memristor M is not set in the leakage path, the initialization signal connected to the reset voltage terminal can be a DC signal. For example, when the second memristor M2 is not set corresponding to the seventh transistor T7, the second initialization signal Vref can be a -2V DC signal; when the first memristor M1 is not set corresponding to the first transistor T1, the first initialization signal Vini can be a -3V DC signal.

[0081] On the basis of the above-mentioned embodiments, optionally, taking the control process of the first variable resistance module 91 as an example, before the gate initialization stage T11 starts, the first initialization signal Vini can be controlled to have a potential jump, so that the second end of the first variable resistance module 91 is pre-connected to the first reset voltage V1. In this way, when the gate initialization stage starts, the first variable resistance module 91 has changed to a low resistance state LRS, which does not affect the transmission process of the first reset voltage V1. It should be noted that in the gate initialization stage, when the first variable resistance module 91 has changed to a low resistance state LRS, the potential difference between the first end and the second end of the memristor M can be controlled by the first reset voltage V1 of the first initialization signal Vini, so that the potential difference between the first end and the second end of the memristor M is between the forward set voltage Vset and the reverse reset voltage -Vreset, so that the memristor M maintains a low resistance state LRS throughout the gate initialization stage.

[0082] And / or, before the light-emitting stage T2 begins, the first initialization signal Vini can be controlled to have a potential jump, so that the second end of the first variable resistor module 91 is pre-connected to the second reset voltage V2. In this way, when the light-emitting stage T2 begins, the first variable resistor module 91 has changed to a high-resistance state HRS, ensuring the leakage suppression effect in the entire light-emitting stage T2. It should be noted that in the light-emitting stage T2, the second reset voltage V2 of the first initialization signal Vini can be controlled so that the potential difference between the first end and the second end of the memristor M is between the forward set voltage Vset and the reverse reset voltage -Vreset, so that the memristor M maintains a high-resistance state HRS in the entire light-emitting stage T2.

[0083] Based on the above embodiments, optionally, the potential jump moment of each initialization signal can be set to occur outside the light-emitting stage T2, that is, in the non-light-emitting stage T1, to avoid the influence of the potential jump of the initialization signal on the light-emitting state.

[0084] On the basis of the above-mentioned embodiments, it is optional to set that in each display frame, the potential of the first reset voltage V1 corresponding to the same variable resistor module is the same; and / or, in each display frame, the potential of the second reset voltage V2 corresponding to the same variable resistor module is the same; so as to effectively simplify the signal control logic. Then, taking the control process of the first variable resistor module 91 as an example, the first reset voltage V1 can be set as low as possible within the allowable range, so that under any grayscale display requirement, the first variable resistor module 91 can be controlled to be transformed into a low resistance state LRS based on the first reset voltage V1; the second reset voltage V2 can be set as high as possible within the allowable range, so that under any grayscale display requirement, the first variable resistor module 91 can be controlled to be transformed into a high resistance state HRS based on the second reset voltage V2.

[0085] Exemplarily, the potential difference between the lower limit potential of the control end of the driving module 10 and the first reset voltage V1 can be set to be greater than the forward set voltage Vset of the memristor M in the first variable resistance module 91. The lower limit potential can be understood as the potential transmitted to the control end of the driving module 10 via the data writing module 30 and the threshold compensation module 40 when the minimum data voltage (for example, the data voltage corresponding to the 255 gray scale) is transmitted on the data line, which can be approximately regarded as the above-mentioned minimum data voltage. When the lower limit potential is greater than 0, the potential of the first reset voltage V1 corresponding to the first variable resistance module 91 can be set to a negative forward set voltage, that is, V1 = -Vset. And, the potential of the second reset voltage V2 corresponding to the first variable resistance module 91 can be set to the absolute value of the reverse reset voltage of the memristor M in the first variable resistance module 91, that is, V2 = Vreset.

[0086] In summary, by designing a memristor M on the gate leakage path of the pixel circuit driving transistor DTFT, and utilizing the variable resistance characteristic of the memristor M to make it act as a switch on the leakage path, and coordinating the control of the potential connected to the second electrode of the memristor M, the gate leakage path of the driving transistor DTFT can be effectively cut off to maintain the storage potential stable. Especially in the field of low-frequency refresh, the introduction of this scheme can further enhance the ability to maintain the storage potential and further reduce power consumption. It should be noted that the embodiment of the present invention mainly illustrates the application of the memristor M as a switch on the leakage path in a pixel circuit, but it is not intended to limit the present invention. In other embodiments, the memristor M can also be applied to pixel circuits of other structures, or to GIP circuits, and to the leakage paths of other circuits that require long-term potential maintenance.

[0087] An embodiment of the present invention further provides a display panel, including the pixel circuit provided by any embodiment of the present invention, and having corresponding beneficial effects. Exemplarily, a plurality of pixel circuits may be arranged in an array in the display area of ​​the display panel. A scanning drive circuit may also be provided in the non-display area of ​​the display panel to provide a scanning signal and a light-emitting control signal to each pixel circuit. In addition, the display panel may also include a driver chip for providing a data voltage to each pixel circuit, and for providing each variable resistance module with a first reset voltage and a second reset voltage required by the module in a timely manner.

[0088] An embodiment of the present invention further provides a method for driving a pixel circuit, which is used to drive the pixel circuit provided by any embodiment of the present invention and has corresponding beneficial effects. Fig. 9 is a flowchart of a driving method of a pixel circuit provided by an embodiment of the present invention. Fig. 9 , the driving method may specifically include the following steps:

[0089] S110, gate initialization stage, controlling the first reset module to be turned on, and controlling the potential of the first reset voltage terminal to turn on the first variable resistor module, and the potential of the first reset voltage terminal is transmitted to the control terminal of the driving module through the first variable resistor module and the first reset module.

[0090] S120, in the light-emitting stage, the driving module generates a driving current according to the potential of its control terminal to drive the light-emitting module to emit light; the potential of the first reset voltage terminal is controlled to turn off the first variable resistance module to suppress leakage generated through the first reset module and the first variable resistance module.

[0091] The driving method of the pixel circuit provided by the embodiment of the present invention utilizes the adjustable on-off state of the first variable resistor module to achieve the suppression of the leakage current of the leakage path of the driving module control end. Specifically, in the gate initialization stage, by controlling the first variable resistor module to be turned on, the normal writing of the potential of the first reset voltage end to the driving module control end can be achieved; in the light-emitting stage, when the potential of the driving module control end needs to be maintained, by controlling the first variable resistor module to be turned off, the transmission path of the off-state leakage current of the first reset module can be cut off, thereby ensuring the potential maintenance effect of the driving module control end, improving the stability of the driving current generated by the driving module, so as to improve the stability of the light-emitting brightness of the light-emitting module and enhance the display effect of the display panel.

[0092] Based on the above embodiments, optionally, in the gate initialization stage, the first reset voltage terminal can be controlled to transmit a first reset voltage so that the first variable resistance module is in a low resistance state; in the light-emitting stage, the first reset voltage terminal can be controlled to transmit a second reset voltage so that the first variable resistance module is in a high resistance state.

[0093] Based on the above embodiments, optionally, before the gate initialization stage begins, the first reset voltage terminal can be controlled to transmit the first reset voltage. Also, in the gate initialization stage, the potential difference between the first electrode and the second electrode of the memristor can be controlled to be between the forward set voltage and the reverse reset voltage, so that the memristor maintains a low resistance state in the gate initialization stage.

[0094] And / or, before the light-emitting stage begins, the first reset voltage terminal can be controlled to transmit the second reset voltage. And, in the light-emitting stage, the potential difference between the first terminal and the second terminal of the memristor can be controlled to be between the forward set voltage and the reverse reset voltage, so that the memristor maintains a high resistance state in the light-emitting stage.

[0095] On the basis of the above implementations, optionally, in each display frame, the potential of the first reset voltage is the same; and / or, in each display frame, the potential of the second reset voltage is the same; so as to simplify the control logic.

[0096] On the basis of the above embodiments, optionally, the potential difference between the lower limit potential of the control end of the driving module and the first reset voltage can be set to be greater than the forward set voltage of the memristor; wherein the lower limit potential is the potential transmitted to the control end of the driving module via the data writing module and the threshold compensation module when the minimum data voltage is transmitted on the data line connected to the data writing module. For example, the lower limit potential is greater than 0, and the potential of the first reset voltage is a negative forward set voltage. The potential of the second reset voltage is the absolute value of the reverse reset voltage of the memristor.

[0097] On the basis of the above embodiments, optionally, the potential jump moment of the first reset voltage terminal occurs outside the light emitting stage to avoid the influence of the potential jump process on the light emitting brightness of the light emitting module.

[0098] It should be noted that in each embodiment of the pixel circuit, specific descriptions of driving methods are given for different pixel circuits, and these driving methods can all be considered as driving methods for the pixel circuit provided in the embodiments of the present invention, and repeated contents will not be repeated here.

[0099] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0100] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A pixel circuit, characterized in that: include: A driving module, used for generating a driving current to drive the light-emitting module to emit light; A first reset module, wherein an output end of the first reset module is connected to a control end of the driving module; a first variable resistance module, wherein a first end of the first variable resistance module is connected to an input end of the first reset module, a second end of the first variable resistance module is connected to a first reset voltage end, and the first variable resistance module is turned on in a gate initialization phase and turned off in a light-emitting phase; When the first reset voltage terminal transmits a first reset voltage, the first variable resistance module presents a low resistance state, so that the first reset voltage is transmitted to the control end of the driving module through the first variable resistance module and the first reset module; when the first reset voltage terminal transmits a second reset voltage, the first variable resistance module presents a high resistance state, so as to suppress leakage generated through the first reset module and the first variable resistance module; In each display frame, the potential of the first reset voltage is the same; and / or, in each display frame, the potential of the second reset voltage is the same; The pixel circuit further includes: a data writing module and a threshold compensation module; the first variable resistance module includes a memristor; The potential difference between the lower limit potential of the control end of the driving module and the first reset voltage is greater than the forward set voltage of the memristor; wherein the lower limit potential is the potential transmitted to the control end of the driving module via the data writing module and the threshold compensation module when the minimum data voltage is transmitted on the data line connected to the data writing module.

2. The pixel circuit according to claim 1, characterized in that: The first variable resistance module includes: a memristor; a first electrode of the memristor serves as a first end of the first variable resistance module, and a second electrode of the memristor serves as a second end of the first variable resistance module.

3. The pixel circuit according to claim 2, characterized in that: The memristor further includes an intermediate layer disposed between the first electrode and the second electrode.

4. The pixel circuit according to claim 3, characterized in that: The material of the first electrode is Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO; The intermediate layer includes at least one layer of HfO x 、Al2O3、ZnO、ITO x 、TaO x , Ta2O5 or SrTiO3; The material of the second electrode is Ti, TiN, TiW, Ag, Pt, Al, Au, TaN or ITO.

5. The pixel circuit according to claim 1, characterized in that: The first reset module comprises: a first transistor, a gate of the first transistor serving as a control terminal of the first reset module, a first electrode of the first transistor serving as an input terminal of the first reset module, and a second electrode of the first transistor serving as an output terminal of the first reset module; Wherein, the first transistor is a single-gate transistor or a double-gate transistor.

6. The pixel circuit according to any one of claims 1 to 5, characterized in that: Also includes: A second reset module, wherein an output end of the second reset module is connected to an anode of the light emitting module; A second variable resistance module, wherein a first end of the second variable resistance module is connected to an input end of the second reset module, a second end of the second variable resistance module is connected to a second reset voltage end, and the second variable resistance module is turned on in an anode initialization phase and turned off in the light-emitting phase.

7. The pixel circuit according to claim 6, characterized in that: The structure of the second variable resistance module is the same as that of the first variable resistance module.

8. The pixel circuit according to claim 7, characterized in that: The pixel circuit further comprises: A data writing module connected to the first end of the driving module; A threshold compensation module, connected to the control end of the driving module and the second end of the driving module respectively; A light-emitting control module, connected in series with the driving module and the light-emitting module between the first power source and the second power source; The storage module is connected between the first power source and the control end of the driving module.

9. A display panel, characterized in that: include: The pixel circuit according to any one of claims 1 to 8.

10. A driving method of a pixel circuit, the pixel circuit comprising a driving module for generating a driving current to drive a light-emitting module to emit light; A first reset module, wherein an output end of the first reset module is connected to a control end of the driving module; A first variable resistor module, wherein a first end of the first variable resistor module is connected to an input end of the first reset module, a second end of the first variable resistor module is connected to a first reset voltage end, and the first variable resistor module is turned on in a gate initialization phase and turned off in a light-emitting phase; characterized in that the driving method comprises: In the gate initialization stage, the first reset module is controlled to be turned on, and the potential of the first reset voltage terminal is controlled to turn on the first variable resistor module, and the potential of the first reset voltage terminal is transmitted to the control terminal of the driving module through the first variable resistor module and the first reset module; In the light-emitting stage, the driving module generates a driving current according to the potential of its control terminal to drive the light-emitting module to emit light; the potential of the first reset voltage terminal is controlled to turn off the first variable resistance module to suppress leakage generated through the first reset module and the first variable resistance module; In the gate initialization stage, controlling the first reset voltage terminal to transmit a first reset voltage so that the first variable resistance module is in a low resistance state; In the light emitting stage, controlling the first reset voltage terminal to transmit a second reset voltage so that the first variable resistance module is in a high impedance state; Before the gate initialization phase starts, controlling the first reset voltage terminal to transmit a first reset voltage; and / or, before the light emitting phase starts, controlling the first reset voltage terminal to transmit a second reset voltage; In each display frame, the potential of the first reset voltage is the same; and / or, in each display frame, the potential of the second reset voltage is the same; The pixel circuit further includes: a data writing module and a threshold compensation module; the first variable resistance module includes a memristor; The potential difference between the lower limit potential of the control end of the driving module and the first reset voltage is greater than the forward set voltage of the memristor; wherein the lower limit potential is the potential transmitted to the control end of the driving module via the data writing module and the threshold compensation module when the minimum data voltage is transmitted on the data line connected to the data writing module.

11. The driving method of the pixel circuit according to claim 10, characterized in that: The lower limit potential is greater than 0, and the potential of the first reset voltage is the negative positive set voltage.

12. The driving method of the pixel circuit according to claim 11, characterized in that: The potential of the second reset voltage is the absolute value of the reverse reset voltage of the memristor.

13. The driving method of the pixel circuit according to claim 10, characterized in that: The potential jump time of the first reset voltage terminal occurs outside the light emitting stage.

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