A random access detection method suitable for satellite communications

Abstract

The present invention discloses a random access detection method suitable for satellite communication, which relates to the base station side reception detection processing of random access signals in the field of satellite mobile communication. The method comprises: firstly, the received PRACH time domain signal is subjected to spectrum shifting, filtering down sampling, FFT transformation and data extraction to obtain a frequency domain PRACH sequence; secondly, the extracted frequency domain PRACH sequence of a PRACH time slot is stored in RAM; then, according to the configuration parameters, the number of root sequence group detections, the number of root sequence detections, the number of repeated sequence merging, the number of FPGA related detection parallel processing, etc. in the related detection processing are determined. The present invention is aimed at satellite communication systems, solves the problems of long serial processing time and high complexity of random access detection, and for random access signals of different formats, the detection performance, detection capability and occupied FPGA resources can be balanced by flexibly configuring the relevant processing parameters.

Description

Technical Field

[0001] The present invention relates to the technical field of satellite communications, and in particular to a random access detection method suitable for satellite communications. Background Art

[0002] Random access is the initial step for the user terminal to establish a connection with the base station wireless network in the satellite mobile communication system, and is also a key step for switching and uplink synchronization. In the satellite mobile communication system, the random access preamble signal uses a ZC sequence with excellent constant modulus zero autocorrelation characteristics. The base station completes the identification of the user who initiated the random access request and estimates the timing advance by detecting the preamble sequence.

[0003] The steps that consume more FPGA processing time for preamble sequence detection are the parts related to the local sequence. It is necessary to first perform conjugate multiplication with the local root sequence, and then perform IFFT transformation. The power delay spectrum of the transformed time domain signal is calculated, and then the power delay spectrum of multiple repeated sequences is summed before peak detection can be performed to complete the identification of random access users and the estimation of timing advance. When implemented in FPGA, the processing time of IFFT is relatively long, and because a preamble sequence contains one or more repeated sequences, the processing time will also increase exponentially. If the number of repeated sequence merging is reduced blindly to reduce the processing delay, the detection performance will be significantly reduced and may even fail to meet the detection index requirements. If the number of parallel processing of related detection is continuously increased to reduce the processing delay, the consumed FPGA hardware resources will increase significantly, which will aggravate the problem of tight onboard processing load resources. Summary of the invention

[0004] The technical problem to be solved by the present invention is: in view of the long FPGA processing time for random access signal reception detection in satellite communication systems and the shortage of FPGA hardware resources in onboard payloads, a random access detection method suitable for satellite communication is proposed, which achieves a balance between multiple indicators such as FPGA resources and detection processing capabilities without reducing the random access signal detection performance.

[0005] To solve the above problems, the technical solution adopted by the present invention is:

[0006] A random access detection method applicable to satellite communications comprises the following steps:

[0007] (1) The received PRACH time domain signal is subjected to spectrum shifting, filtering and downsampling, FFT transformation and data extraction to obtain a frequency domain PRACH sequence, and the extracted frequency domain PRACH sequence within a PRACH time slot is stored in RAM;

[0008] (2) When the frequency domain PRACH sequence of a PRACH access opportunity is stored, the relevant detection processing of this time slot begins, including conjugate multiplication of the frequency domain PRACH sequence and the local root sequence, IFFT transformation, calculation of power delay profile PDP, repeated sequence merging and peak detection;

[0009] (3) Determine the random access user ID, timing advance TA and frequency offset estimation value based on the relevant detection results.

[0010] Furthermore, the one PRACH time slot described in step (1) includes one or more PRACH access opportunities described in step (2).

[0011] Furthermore, the correlation detection process in step (2) is divided into two parts: group correlation detection process and intra-group correlation detection process, which specifically includes the following processes:

[0012] The local root sequences to be detected are divided into r groups, the frequency domain sequences of each group of root sequences are summed to generate the frequency domain sequences of the root sequence group, the root sequence groups are respectively used to perform group correlation detection processing with the frequency domain PRACH sequence, the number of peaks detected exceeding the threshold in each group is compared, the m groups with the largest number of peaks are found, and all the n root sequences of the selected m groups are respectively used to perform intra-group correlation detection with the frequency domain PRACH sequence; wherein, r = the number of local root sequences to be detected / the number of root sequences contained in each group, m = n / the number of root sequences contained in each group, and m≤r.

[0013] Furthermore, the configuration parameters of the relevant detection processing satisfy the following relationship:

[0014]

[0015] in, is the number of time slots between two PRACH time slots, that is, the processing time of one PRACH time slot; is the number of access opportunities contained in a PRACH time slot; is the number of IFFT cycles contained in one access opportunity; is the input and output delay of IFFT processing, in IFFT cycles; N comb is the number of times the repeated sequences are merged; r is the number of root sequence groups; n is the number of detected root sequences; N p The number of parallel processing for FPGA related detection.

[0016] Furthermore, the frequency domain PRACH sequence storage and related detection processing of a PRACH time slot in step (2) need to be Completed within the time.

[0017] The beneficial effects of the present invention are:

[0018] When the base station side of the present invention performs random access detection, the number of root sequence group detections, the number of root sequence detections, the number of repeated sequence merging, and the number of FPGA-related detection parallel processing can be parameterized according to factors such as the required detection performance, detection capability, and FPGA resource occupancy, and has good flexibility. At the same time, it can solve the problem of long serial processing time and high complexity of random access detection, and balance the detection performance, detection capability, and occupied FPGA resources by flexibly configuring related processing parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is the random access detection processing flow at the base station side of the present invention;

[0020] Figure 2 It is the preamble format of the 5G NR standard with ZC sequence lengths of 139, 571, and 1151;

[0021] Figure 3 It is the zero autocorrelation configuration of the 5G NR standard with ZC sequence lengths of 139, 571, and 1151;

[0022] Figure 4 It is the time domain configuration of the FR2 TDD random access part of the 5G NR standard;

[0023] Figure 5 It is a schematic diagram of FPGA processing of random access signal correlation detection (no root sequence grouping, FPGA 2-way parallel processing) of the present invention;

[0024] Figure 6 It is a schematic diagram of FPGA processing of random access signal correlation detection (root sequence grouping, FPGA serial processing) of the present invention. DETAILED DESCRIPTION

[0025] The technical solution of the present invention is described below through specific embodiments in conjunction with the accompanying drawings.

[0026] by Figure 2 Taking the preamble format B4 of the 5G NR standard as an example, the present invention provides a random access detection method suitable for satellite communication, such as Figure 1 The specific steps are as follows:

[0027] (1) First, the received PRACH time domain signal is subjected to spectrum shifting, filtering and downsampling, FFT transformation and data extraction to obtain a frequency domain PRACH sequence, and the extracted frequency domain PRACH sequence within a PRACH time slot is stored in RAM for subsequent correlation detection processing;

[0028] (2) When the frequency domain PRACH sequence storage of a PRACH access opportunity is completed, the subsequent correlation detection processing of this time slot can be started. The correlation detection processing includes the steps of conjugate multiplication of the frequency domain PRACH sequence and the local root sequence, IFFT transformation, calculation of power delay spectrum PDP, repeated sequence merging, peak detection, etc.

[0029] Assuming PRACH format B4, the ZC sequence length is L RA is 139, the PUSCH channel subcarrier spacing is 120kHz, and the PRACH channel subcarrier spacing is Δf RA is 120kHz, the preamble sequence length is N u The number of sampling points is 12·4096, and the length of the preamble signal CP is There are 1872 sampling points. Figure 3 The zero autocorrelation configuration zeroCorrelationZoneConfig is 0, and the cyclic shift value is N CS is 0, that is, the number of root sequences used for random access is 64. Figure 4 When the PRACH configuration index PRACHConfigIndex is 134, the shortest distance between two PRACH time slots is 2 60kHz time slots, which is equivalent to 4 120kHz time slots. Number of access opportunities in each PRACH time slot The configuration parameters of the relevant detection processing must satisfy the relationship Need to satisfy

[0030] 1) If there are many users in the system, the root sequences can be grouped without grouping, and the 64 root sequences can be directly correlated, that is, r = 0, n = 64; if the detection performance is the best, the power delay spectra of all repeated sequences can be combined, that is, N comb =12, so the parallel number N of FPGA-related detection processing can be calculated based on the relationship between the configuration parameters. p =2; the processing structure of the FPGA related detection part at this time is as follows Figure 5 As shown;

[0031] 2) If the number of users accessing the system is small and the available FPGA resources are also small, the parallel number of FPGA-related detection processing N p =1, the number of times the power delay spectrum of the repeated sequence is combined is N comb=8. When performing correlation detection, the root sequences to be detected are first divided into r=32 groups, and the frequency domain sequences of each group of root sequences are summed to generate the frequency domain sequence of the root sequence group, and the root sequence group is used to perform correlation detection processing with the frequency domain PRACH sequence. Based on the correlation detection results of the root sequence group, n=12 root sequences in m=6 groups are selected to perform correlation detection with a single root sequence; the processing structure of the FPGA correlation detection part at this time is as follows Figure 6 As shown;

[0032] (3) Finally, the random access user ID, timing advance TA and frequency offset estimation value are determined according to the relevant detection results.

Claims

1. A random access detection method suitable for satellite communication, characterized in that: The following steps are involved: (1) The received PRACH time domain signal is subjected to spectrum shifting, filtering and downsampling, FFT transformation and data extraction to obtain a frequency domain PRACH sequence, and the extracted frequency domain PRACH sequence within a PRACH time slot is stored in RAM; (2) When the frequency domain PRACH sequence of a PRACH access opportunity is stored, the relevant detection processing of this time slot begins, including conjugate multiplication of the frequency domain PRACH sequence and the local root sequence, IFFT transformation, calculation of power delay profile PDP, repeated sequence merging and peak detection; (3) Determine the random access user ID, timing advance TA, and frequency offset estimation value based on the relevant detection results; The correlation detection process in step (2) is divided into two parts: group correlation detection process and intra-group correlation detection process, which specifically includes the following processes: The local root sequences to be detected are divided into r groups, the frequency domain sequences of each group of root sequences are summed to generate the frequency domain sequences of the root sequence group, the root sequence groups are respectively used to perform group correlation detection processing with the frequency domain PRACH sequence, the number of peaks exceeding the threshold detected in each group is compared, the m groups with the largest number of peaks are found, and all the n root sequences of the selected m groups are respectively used to perform intra-group correlation detection with the frequency domain PRACH sequence; wherein, r = the number of local root sequences to be detected / the number of root sequences contained in each group, m = n / the number of root sequences contained in each group, and m≤r; Among them, the configuration parameters of the relevant detection processing satisfy the following relationship: in, is the number of time slots between two PRACH time slots, that is, the processing time of one PRACH time slot; is the number of PRACH access opportunities contained in a PRACH time slot; is the number of IFFT cycles contained in one access opportunity; is the input and output delay of IFFT processing, in IFFT cycles; N comb is the number of times the repeated sequences are merged; r is the number of root sequence groups; n is the number of detected root sequences; N p The number of parallel processing for FPGA related detection.

2. A random access detection method suitable for satellite communication according to claim 1, characterized in that: One PRACH time slot described in step (1) includes one or more PRACH access opportunities described in step (2).

3. A random access detection method suitable for satellite communication according to claim 1, characterized in that: In step (2), the frequency domain PRACH sequence storage and related detection processing of a PRACH time slot need to be Completed within the time.

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