A method and device for detecting through-hole defects in a layout and an automatic reinforcement method
By constructing the intermediate layer metal pattern as a medium, the accuracy and efficiency of detection of multi-layer metal through hole defects in semiconductor integrated circuits are solved, automatic detection and reinforcement are achieved, detection accuracy and efficiency are improved, and detection accuracy and efficiency are applicable to Highly integrated layout design.
Patent Information
- Application Number
- CN202310725735.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-16
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2043-06-16
AI Technical Summary
During the manufacturing process of semiconductor integrated circuits, it is difficult for the prior art to accurately and quickly detect multi-layer metal through-hole defects, especially in high-integration layout design. Manual inspections have the risk of missing and missing detection, and automation tools cannot accurately locate and pass through. Areas with insufficient pore density, performance testing is cumbersome and inapplicable.
By constructing the intermediate layer metal pattern as a medium, the overlapping areas in the upper and lower non-adjacent metal layers are converted into overlapping areas in the upper and lower adjacent metal layers, and spatial checksum through hole defect verification is performed to achieve automatic detection and compensation Strong, reduce detection difficulty and avoid manual inspection and performance testing.
It improves the accuracy and efficiency of through hole defect detection, simplifies operation, reduces false detection and missed detection, and is suitable for high-integration layout designs, and the detection results are not affected by through hole density.
Smart Images
Figure CN117350936B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuit layout design defect inspection, and in particular to a layout through-hole defect detection method, device and automatic reinforcement method. Background Art
[0002] With the advancement of semiconductor integrated circuit manufacturing technology, the characteristic size of transistors is getting smaller and smaller, the integration of circuits per unit area is higher, the number of metal wiring levels is increasing, and the density of interconnection lines is increasing. According to statistics, more than 70% of the reasons for product failure are caused by interconnection line defects. When designing the internal layout of the chip, the metals of different levels inside the chip are used to alternately arrange the upper and lower layers vertically and horizontally. The upper and lower metal layers are connected through different through holes to form a grid-like power line network and ground line network to ensure the power supply inside the chip.
[0003] There are often omissions where there is no through-hole point at the connection point between the upper and lower metal layers or no through-hole of corresponding shape is added at the through-hole point position. As the layout design becomes more and more complex, it is difficult to detect through-hole defects in the layout. At present, there are three main methods for detecting through-hole defects: the first is manual inspection, which is labor-intensive and has the risk of missed inspections; the second method is detection through automated tools, but this method cannot accurately locate areas with insufficient through-hole density, and the software cost is relatively high; the third method is performance testing, which connects metal wires at different levels to test pads for performance testing. Although this method can ensure the accuracy of detection, it requires test metal wires and test pads, which is cumbersome to operate and is not suitable for highly integrated layout design. In the layout design of multiple metal layers, how to accurately and quickly verify whether the metal layers are fully connected is a technical problem that needs to be solved urgently. Summary of the invention
[0004] The present application provides a method, device and automatic reinforcement method for detecting through-hole defects in a layout, which are used to accurately and quickly detect through-hole defects in a layout.
[0005] In a first aspect, the present application provides a method for detecting through-hole defects in a layout, comprising:
[0006] Acquire all metal patterns contained in the first wiring network and the second wiring network in the target layout;
[0007] Respectively obtaining overlapping regions between each metal pattern in the first wiring network and the second wiring network and metal patterns in upper and lower non-adjacent metal layers, performing spatial verification on each overlapping region, generating an intermediate layer metal pattern in each overlapping region that passes the spatial verification, and extracting each first overlapping region where the generated intermediate layer metal pattern overlaps with metal patterns in upper and lower adjacent metal layers;
[0008] The second overlapping areas between each metal pattern in the first wiring network and the second wiring network and the metal patterns in the upper and lower adjacent metal layers are respectively extracted, and each first overlapping area and each second overlapping area are checked for through-hole defects, and the first overlapping area and the second overlapping area with through-hole defects are output; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that the overlapping area has a through-hole defect.
[0009] In this way, after obtaining all the metal patterns in the target layout, the metal patterns and the metal patterns in the upper and lower non-adjacent metal layers are further obtained according to the positional relationship of the metal patterns in the wiring network. Each overlapping area is spatially checked and an intermediate layer metal pattern is generated in the overlapping area that passes the spatial check, and each first overlapping area where the intermediate layer metal pattern overlaps with the upper and lower adjacent metal patterns is extracted. Using the intermediate layer metal pattern as a medium, the overlapping area of the metal patterns in the upper and lower non-adjacent metal layers is converted into the first overlapping area where the metal patterns in the upper and lower adjacent metal layers overlap, reducing the difficulty of through-hole defect detection. Further, the second overlapping area where each metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers in the wiring network is obtained, and the first handover area where the intermediate layer metal pattern overlaps with the metal patterns in the upper and lower non-adjacent metal layers is checked for through-hole defects one by one. When there is no through-hole in the overlapping area and there is space for placing the through-hole, it is determined that there is a through-hole defect in the overlapping area at this time, and the through-hole defect detection of the target layout is realized. The present application provides a through-hole defect detection method, which converts the overlapping area of metal patterns in upper and lower non-adjacent metal layers into the overlapping area of metal patterns in upper and lower adjacent metal layers based on the idea of constructing an intermediate layer metal pattern as a medium, thereby reducing the difficulty of through-hole defect detection. Furthermore, through-hole defect judgment is directly performed on the overlapping area, without the need for manual inspection or performance testing of the target layout to determine whether there is a through-hole defect. The operation is simple and easy to implement. The through-hole defect detection result is not affected by the through-hole density, thereby improving the accuracy of through-hole defect detection.
[0010] In one implementation, the step of acquiring all metal patterns contained in the first wiring network and the second wiring network in the target layout specifically includes:
[0011] Obtaining a structure file of a target layout and inputting the structure file into a layout verification tool;
[0012] Based on the layout verification tool, all metal graphics contained in the wiring network in the target layout are obtained; wherein the first wiring network is a power line network, and the second wiring network is a ground line network.
[0013] In this way, all metal patterns in the layout are extracted through the commonly used layout verification tools in the field, without the need for manual detection, thus reducing the cost of manual operation and avoiding false detection and missed detection.
[0014] In one implementation, performing spatial verification on each overlapping region and generating an intermediate metal pattern in each overlapping region that passes the spatial verification specifically includes:
[0015] Perform a first spatial check on each overlapping area, determine whether there is an intermediate metal pattern in each overlapping area one by one, and remove the overlapping area with the intermediate metal pattern, and output a first spatial check result when there is no intermediate metal pattern in each overlapping area; wherein the first spatial check result includes all overlapping areas without intermediate metal patterns;
[0016] A second spatial check is performed on each overlapping area within the first spatial check result, and it is determined one by one whether there is space in each overlapping area that allows the placement of an intermediate layer metal pattern. When there is space in the overlapping area that allows the placement of an intermediate layer metal pattern, it is determined that the overlapping area has passed the spatial check.
[0017] In this way, a spatial check is performed on the overlapping area between each metal pattern and the upper and lower non-adjacent metal patterns, and whether an intermediate metal pattern is allowed to be generated in each overlapping space is determined by whether there is an intermediate metal pattern in the overlapping area and whether there is space for placing the intermediate metal pattern.
[0018] In one implementation, each first overlapping region where the extracted and generated intermediate layer metal pattern overlaps with metal patterns in upper and lower adjacent metal layers specifically includes:
[0019] Obtaining metal patterns in upper and lower non-adjacent metal layers corresponding to the overlapping area where each intermediate layer metal pattern is located one by one;
[0020] The intermediate layer metal pattern is positionally matched with metal patterns in upper and lower non-adjacent metal layers corresponding to the overlapping region, to generate a first overlapping region where the intermediate layer metal pattern overlaps with the upper and lower adjacent metal patterns.
[0021] In this way, using the intermediate layer metal pattern as a medium, the overlapping area of the upper and lower non-adjacent metal patterns in the wiring network is converted into a first overlapping area where the upper and lower adjacent metal patterns overlap, so as to facilitate the detection of whether there are defects in the position and number of through holes between the upper and lower adjacent metal patterns.
[0022] In a second aspect, the present application also provides an automatic reinforcement method, comprising:
[0023] Using the layout through-hole defect detection method as described above to perform defect detection on the target layout;
[0024] Collecting each first overlapping area and second overlapping area where a through-hole defect exists, and generating a through-hole defect verification result;
[0025] Generate a corresponding reinforced via pattern in each overlapping region of the via defect verification result according to the design rule of the target layout;
[0026] Summarize each generated reinforcement through-hole pattern and each intermediate layer metal pattern and generate a reinforcement information file, merge the reinforcement information file with the structure file of the target layout, and generate a reinforcement layout file
[0027] In this way, the information of each reinforced through-hole pattern and the intermediate metal pattern is summarized and output as a reinforcement information file, and the generated reinforcement information file is merged with the structure file of the target layout to form a complete reinforcement layout file. The reinforcement layout file contains the through-hole information to be reinforced, thereby realizing the automatic reinforcement of the power line network and the ground line network in the target power network.
[0028] In one implementation, before aggregating the generated through hole graphic information and the intermediate layer metal graphic information and generating the reinforcement information file, the method further includes:
[0029] A through-hole check is performed on the first overlapping region where each intermediate layer metal pattern is located. When it is detected that the reinforced through-hole pattern does not exist in the first overlapping region, the intermediate layer metal pattern corresponding to the first overlapping region is removed.
[0030] In this way, before collecting the information of the intermediate layer metal pattern, the first overlapping area where the intermediate layer metal pattern is located is also checked for through holes. If there is no reinforced through hole pattern in the first overlapping area, the intermediate layer metal pattern corresponding to the first overlapping area is removed to ensure that there is indeed space in the first overlapping area where the intermediate layer metal pattern is located that allows the generation of a reinforced through hole pattern, thereby improving the accuracy of through hole defect detection.
[0031] In a third aspect, the present application further provides a layout through-hole defect detection device, including a pattern acquisition module, a first verification module, and a second verification module;
[0032] The graphic acquisition module is used to acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout;
[0033] The first verification module is used to respectively obtain the overlapping areas between each metal pattern in the first wiring network and the second wiring network and the metal patterns in the upper and lower non-adjacent metal layers, perform spatial verification on each overlapping area, generate an intermediate layer metal pattern in each overlapping area that passes the spatial verification, and extract each first overlapping area where the metal patterns in the generated intermediate layer metal layer overlap;
[0034] The second verification module is used to respectively extract the second overlapping areas where each metal pattern in the first wiring network and the second wiring network exists with the metal patterns in the upper and lower adjacent metal layers, perform through-hole defect verification on each first overlapping area and each second overlapping area, and output the first overlapping area and the second overlapping area where through-hole defects exist; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that a through-hole defect exists in the overlapping area.
[0035] In this way, after obtaining all the metal patterns in the target layout, the metal patterns and the metal patterns in the upper and lower non-adjacent metal layers are further obtained according to the positional relationship of the metal patterns in the wiring network. Each overlapping area is spatially checked and an intermediate layer metal pattern is generated in the overlapping area that passes the spatial check, and each first overlapping area where the intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers is extracted. Using the intermediate layer metal pattern as a medium, the overlapping area of the metal patterns in the upper and lower non-adjacent metal layers is converted into the first overlapping area where the metal patterns in the upper and lower adjacent metal layers overlap, reducing the difficulty of through-hole defect detection. Further, the second overlapping area where each metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers in the wiring network is obtained, and the through-hole defect check is performed one by one with the first handover area where the intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers. When there is no through hole in the overlapping area and there is space to allow the through hole to be placed, it is determined that there is a through hole defect in the overlapping area at this time, and the through hole defect detection of the target layout is realized. The present application provides a through-hole defect detection device, which converts the overlapping area of metal patterns in upper and lower non-adjacent metal layers into the overlapping area of metal patterns in upper and lower adjacent metal layers based on the idea of constructing an intermediate layer metal pattern as a medium, thereby reducing the difficulty of through-hole defect detection. Furthermore, through-hole defect judgment is directly performed on the overlapping area, without the need for manual inspection or performance testing of the target layout to determine whether there is a through-hole defect. The operation is simple and easy to implement. The through-hole defect detection result is not affected by the through-hole density, thereby improving the accuracy of through-hole defect detection.
[0036] In one implementation, the pattern acquisition module is used to acquire all metal patterns contained in the first wiring network and the second wiring network in the target layout, specifically including:
[0037] Obtaining a structure file of a target layout and inputting the structure file into a layout verification tool;
[0038] Based on the layout verification tool, all metal graphics contained in the wiring network in the target layout are obtained; wherein the first wiring network is a power line network, and the second wiring network is a ground line network.
[0039] In one implementation, performing spatial verification on each overlapping region and generating an intermediate metal pattern in each overlapping region that passes the spatial verification specifically includes:
[0040] Perform a first spatial check on each overlapping area, determine whether there is an intermediate metal pattern in each overlapping area one by one, and remove the overlapping area with the intermediate metal pattern, and output a first spatial check result when there is no intermediate metal pattern in each overlapping area; wherein the first spatial check result includes all overlapping areas without intermediate metal patterns;
[0041] A second spatial check is performed on each overlapping area within the first spatial check result, and it is determined one by one whether there is space in each overlapping area that allows the placement of an intermediate layer metal pattern. When there is space in the overlapping area that allows the placement of an intermediate layer metal pattern, it is determined that the overlapping area has passed the spatial check.
[0042] In one implementation, each first overlapping region where the extracted and generated intermediate layer metal pattern overlaps with metal patterns in upper and lower adjacent metal layers specifically includes:
[0043] Obtaining metal patterns in upper and lower non-adjacent metal layers corresponding to the overlapping area where each intermediate layer metal pattern is located one by one;
[0044] The metal pattern of the middle layer is matched with the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region, so as to generate a first overlapping region where the metal pattern of the middle layer overlaps with the metal patterns in the upper and lower adjacent metal layers.
[0045] In one implementation, the layout through-hole defect detection method further includes automatically reinforcing the target layout based on the through-hole defect verification result, specifically including:
[0046] Collecting each first overlapping area and second overlapping area where a through-hole defect exists, and generating a through-hole defect verification result;
[0047] Generate a corresponding reinforced via pattern in each overlapping region of the via defect verification result according to the design rule of the target layout;
[0048] Each generated reinforcement through-hole pattern and each intermediate layer metal pattern are summarized to generate a reinforcement information file, and the reinforcement information file is merged with the structure file of the target layout to generate a reinforcement layout file.
[0049] In one implementation, before aggregating the generated through hole graphic information and the intermediate layer metal graphic information and generating the reinforcement information file, the method further includes:
[0050] A through-hole check is performed on the first overlapping region where each intermediate layer metal pattern is located. When it is detected that the reinforced through-hole pattern does not exist in the first overlapping region, the intermediate layer metal pattern corresponding to the first overlapping region is removed. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] Figure 1 It is a schematic flow chart of a method for detecting through-hole defects in a layout provided by an embodiment of the present invention;
[0052] Figure 2 It is a top view of a layout wiring network provided by an embodiment of the present invention;
[0053] Figure 3 is a flow chart of an automatic reinforcement method provided by an embodiment of the present invention;
[0054] Figure 4 This is an example diagram of the application process of an automatic reinforcement method provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0055] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0056] The terms "first" and "second" and the like in the specification and claims of the present application and the drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products or devices.
[0057] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0058] Example 1
[0059] See also Figure 1 , Figure 1 1 is a flow chart of a method for detecting through-hole defects in a layout provided by an embodiment of the present invention. The present invention provides a method for detecting through-hole defects in a layout, including steps 101 to 103, each of which is as follows:
[0060] Step 101: Obtain all metal patterns contained in the first wiring network and the second wiring network in the target layout.
[0061] In one embodiment, the acquisition of all metal graphics contained in the first wiring network and the second wiring network in the target layout specifically includes: acquiring a structure file of the target layout and inputting the structure file into a layout verification tool; acquiring all metal graphics contained in the wiring network in the target layout based on the layout verification tool; wherein the first wiring network is a power line network, and the second wiring network is a ground line network. In an embodiment of the present invention, the structure file of the target layout is converted into a file in GDS format and input into a layout verification tool. GDSII is a binary file that contains geometric shapes, texts or labels of a plane in an integrated circuit layout, and is used for data conversion of an integrated circuit layout. Preferably, in an embodiment of the present invention, the converted GDS file is input into a Mentor Calibre layout verification tool, and all metal graphics contained in the power line network and the ground line network in the target layout are acquired through the verification tool.
[0062] See also Figure 2 , Figure 2 It is a top view of a layout wiring network provided by an embodiment of the present invention. An embodiment of the present invention provides a top view of a wiring network in a layout for auxiliary explanation, where metal 1 indicates a metal graphic located on the first layer of the layout, and metal 2, metal 3, and metal 4 are recursively indicated in turn, indicating metal graphics at different layers. The metal graphics between different layers are connected using different through-hole graphics. Through hole 1 is used to connect metal 1 and metal 2, through hole 2 is used to connect metal 2 and metal 3, and through hole 3 is used to connect metal 3 and metal 4. It should be noted that the specific number of metal layers used in the layout, the shape of the connecting through holes between metals, etc. are adjusted according to the specific application products, and the top view of a wiring network in a layout provided by an embodiment of the present invention is only used for auxiliary explanation.
[0063] Step 102: Obtain overlapping areas between each metal pattern in the first wiring network and the second wiring network and metal patterns in upper and lower non-adjacent metal layers, perform spatial verification on each overlapping area, generate an intermediate layer metal pattern in each overlapping area that passes the spatial verification, and extract each first overlapping area where the generated intermediate layer metal pattern overlaps with patterns in upper and lower adjacent metal layers.
[0064] Respectively obtain the areas where each metal pattern in the power line network overlaps with the metal patterns in the upper and lower non-adjacent metal layers, and the areas where each metal pattern in the ground line network overlaps with the metal patterns in the upper and lower non-adjacent metal layers. In one embodiment, the spatial verification is performed on each overlapping area, and the intermediate metal pattern is generated in each overlapping area that passes the spatial verification, specifically including: performing a first spatial verification on each overlapping area, judging whether there is an intermediate metal pattern in each overlapping area one by one, and eliminating the overlapping area with the intermediate metal pattern, and outputting a first spatial verification result when there is no intermediate metal pattern in each overlapping area; wherein the first spatial verification result includes all overlapping areas without intermediate metal patterns; performing a second spatial verification on each overlapping area in the first spatial verification result, judging whether there is space in each overlapping area that allows the intermediate metal pattern to be placed one by one, and when there is space in the overlapping area that allows the intermediate metal pattern to be placed, it is determined that the overlapping area passes the spatial verification. Respectively obtain the areas where the metal patterns in the power line network and the ground line network overlap with the upper and lower non-adjacent metal patterns, and perform a spatial verification on each overlapping area. The space check includes a first space check and a second space check. When the first space check is performed, when it is detected that there is an intermediate metal pattern in the overlapping area, the overlapping area is removed. Whether there is an intermediate metal pattern in each overlapping area is determined one by one until all the overlapping areas are detected to be free of intermediate metal patterns, and the first space check result is output. The first space check result contains all overlapping areas without intermediate metal patterns. A second space check is performed on each overlapping area in the first space check result, and whether there is space in each overlapping area that allows the placement of intermediate metal patterns is determined one by one. The spatial size of each intermediate metal pattern is determined according to the metal pattern design of different metal layers in the specific layout, and the space for placing intermediate metal patterns in the overlapping area is not limited here. When the overlapping area satisfies both "no intermediate metal pattern" and "there is space that allows the placement of intermediate metal patterns", it is determined that the overlapping area passes the space check. As an alternative to the embodiment of the present invention, when performing the space check, the order of the first space check and the second space check can be replaced, and the second space check is performed first to check whether there is an overlapping area that allows the placement of intermediate metal patterns, and then the first space check is performed.
[0065] In one embodiment, each first overlapping region where the extracted generated intermediate layer metal pattern overlaps with the metal pattern in the upper and lower adjacent metal layers specifically includes: obtaining the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region where each intermediate layer metal pattern is located one by one; performing position matching between the intermediate layer metal pattern and the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region, selecting metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region that are in the upper and lower adjacent metal layer relationship with the intermediate layer metal pattern, and obtaining the first overlapping region where the intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers. When generating the intermediate layer metal pattern in each overlapping region that passes the spatial verification, the shape of the intermediate layer metal pattern depends on the design requirements of the target layout. Obtaining the upper and lower non-adjacent metal patterns corresponding to the overlapping region where each intermediate layer metal pattern is located one by one and performing position matching, generating the first overlapping region between the intermediate layer metal pattern and the upper and lower adjacent metal pattern. In the embodiment of the present invention, the intermediate layer metal pattern is used as a medium to convert the overlapping area of the metal patterns in the upper and lower non-adjacent metal layers in the wiring network into a first overlapping area where the metal patterns in the upper and lower adjacent metal layers overlap, so as to facilitate the detection of whether there are defects in the position and number of through holes between the upper and lower adjacent metal patterns.
[0066] Step 103: respectively extract the second overlapping areas where each metal pattern in the first wiring network and the second wiring network exists with the metal patterns in the upper and lower adjacent metal layers, perform through-hole defect verification on each first overlapping area and each second overlapping area, and output the first overlapping area and the second overlapping area where through-hole defects exist; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that the overlapping area has a through-hole defect.
[0067] In an embodiment of the present invention, a first overlapping area where metal patterns in upper and lower adjacent metal layers in a power network and a ground network exist, and a second overlapping area where metal patterns in a middle layer exist and metal patterns in upper and lower adjacent metal layers exist are obtained, and a through-hole defect check is performed on each first overlapping area and each second overlapping area. When it is detected that there is no through-hole in the overlapping area and there is space allowing the through-hole to be placed, it is determined that a through-hole defect exists in the overlapping area.
[0068] In an embodiment of the present invention, a layout through-hole defect detection device is also provided, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, the above-mentioned layout through-hole defect detection method is implemented.
[0069] In an embodiment of the present invention, a computer-readable storage medium is further provided. The computer-readable storage medium includes a stored computer program. When the computer program is executed, the device where the computer-readable storage medium is located is controlled to execute the above-mentioned layout through-hole defect detection method.
[0070] Exemplarily, the computer program may be divided into one or more modules, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules may be a series of computer program instruction segments capable of completing specific functions, which are used to describe the execution process of the computer program in the layout through-hole defect detection device.
[0071] The layout through-hole defect detection device can be a computing device such as a desktop computer, a notebook, a PDA, and a cloud server. The layout through-hole defect detection device may include, but is not limited to, a processor, a memory, and a display. Those skilled in the art can understand that the above components are only examples of layout through-hole defect detection devices and do not constitute a limitation on the layout through-hole defect detection device. It may include more or less components than the above components, or a combination of certain components, or different components. For example, the layout through-hole defect detection device may also include input and output devices, network access devices, buses, etc.
[0072] The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the layout through-hole defect detection device, and uses various interfaces and lines to connect various parts of the entire layout through-hole defect detection device.
[0073] The memory can be used to store the computer program and / or module, and the processor realizes various functions of the layout through-hole defect detection device by running or executing the computer program and / or module stored in the memory, and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, an application required for at least one function (such as a sound playback function, a text conversion function, etc.), etc.; the data storage area can store data created according to the use of the mobile phone (such as audio data, text message data, etc.), etc. In addition, the memory can include a high-speed random access memory, and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (SecureDigital, SD) card, a flash card (Flash Card), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.
[0074] Wherein, if the module integrated in the layout through-hole defect detection device is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned method embodiments can be implemented. Wherein, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal and software distribution medium, etc. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electric carrier signals and telecommunication signals. Ordinary technicians in this field can understand and implement it without creative work.
[0075] The embodiment of the present invention provides a method for detecting through-hole defects in a layout. After obtaining all metal patterns in a target layout, the metal patterns and metal patterns in upper and lower non-adjacent metal layers are further obtained according to the positional relationship of the metal patterns in the wiring network. Each overlapping area is spatially checked and an intermediate metal pattern is generated in the overlapping area that passes the spatial check. Each first overlapping area where the intermediate metal pattern overlaps with the metal patterns in upper and lower adjacent metal layers is extracted. Using the intermediate metal pattern as a medium, the overlapping area of the metal patterns in upper and lower non-adjacent metal layers is converted into the first overlapping area where the metal patterns in upper and lower adjacent metal layers overlap, thereby reducing the difficulty of through-hole defect detection. Further, the second overlapping area where each metal pattern overlaps with the metal patterns in upper and lower adjacent metal layers in the wiring network is obtained, and the through-hole defect check is performed one by one with the first handover area where the intermediate metal pattern overlaps with the metal patterns in upper and lower adjacent metal layers. When there is no through-hole in the overlapping area and there is space for placing the through-hole, it is determined that there is a through-hole defect in the overlapping area at this time, thereby realizing through-hole defect detection of the target layout. The embodiment of the present invention provides a through-hole defect detection method, which converts the overlapping area of metal patterns in upper and lower non-adjacent metal layers into the overlapping area of metal patterns in upper and lower adjacent metal layers based on the idea of constructing an intermediate layer metal pattern as a medium, thereby reducing the difficulty of through-hole defect detection. Furthermore, through-hole defect judgment is directly performed on the overlapping area, without the need for manual inspection or performance testing of the target layout to determine whether there is a through-hole defect. The operation is simple and easy to implement. The through-hole defect detection result is not affected by the through-hole density, thereby improving the accuracy of through-hole defect detection.
[0076] Example 2
[0077] See also Figure 3 , Figure 3 2 is a flow chart of an automatic reinforcement method provided by an embodiment of the present invention. The present invention provides an automatic reinforcement method, including steps 201 to 204, and each step is specifically as follows:
[0078] Step 201: performing through-hole defect detection on a target layout using the layout through-hole defect detection method described in Example 1;
[0079] Step 202: collecting each first overlapping region and second overlapping region where a through-hole defect exists, and generating a through-hole defect verification result;
[0080] Step 203: generating a corresponding reinforced via pattern in each overlapping region of the via defect verification result according to the design rule of the target layout;
[0081] Step 204: Summarize each generated reinforcement through-hole pattern and each intermediate layer metal pattern and generate a reinforcement information file, merge the reinforcement information file with the structure file of the target layout, and generate a reinforcement layout file.
[0082] In the embodiment of the present invention, the structure file of the target layout is input into the layout verification tool, and the through-hole defect detection of the target layout is performed based on the layout through-hole defect detection method described in Example 1. Figure 4 , Figure 4 This is an example diagram of the application process of an automatic reinforcement method provided by an embodiment of the present invention. After the through-hole defect detection is completed, each generated reinforced through-hole graphic and each intermediate layer metal graphic are summarized and a reinforcement information file is generated, and the reinforcement information file is merged with the structure file of the target layout to generate a reinforcement layout file. Through the layout verification tool, according to the design rules of the target layout, the reinforcement through-hole graphics corresponding to the through-hole level are automatically added in each overlapping area where the through-hole defect exists, and the generated reinforced through-hole graphics need to meet the DRC verification requirements. The information of each generated reinforced through-hole graphic and the intermediate layer metal graphic is summarized and output as a reinforcement information file in the GDS format, and the generated reinforcement information file is merged with the GDS file of the target layout to form a complete GDS file, namely the reinforcement layout file. The reinforcement layout file contains the through-hole information that needs to be reinforced, and realizes the automatic reinforcement of the power line network and the ground line network.
[0083] As an optimization scheme of an embodiment of the present invention, before aggregating the generated through-hole graphic information and the intermediate metal graphic information and generating the reinforcement information file, it also includes: performing a through-hole check on the first overlapping area where each intermediate metal graphic is located, and when it is detected that the reinforced through-hole graphic does not exist in the first overlapping area, the intermediate metal graphic corresponding to the first overlapping area is eliminated. Before aggregating the information of the intermediate metal graphic, it is also necessary to perform a through-hole check on the first overlapping area where the intermediate metal graphic is located, and if the reinforced through-hole graphic does not exist in the first overlapping area, the intermediate metal graphic corresponding to the first overlapping area is eliminated to ensure that there is indeed space in the first overlapping area where the intermediate metal graphic is located that allows the generation of a reinforced through-hole graphic.
[0084] Example 3
[0085] The embodiment of the present invention provides a layout through-hole defect detection device, including a pattern acquisition module, a first verification module and a second verification module;
[0086] The graphic acquisition module is used to acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout;
[0087] The first verification module is used to respectively obtain the overlapping areas between each metal pattern in the first wiring network and the second wiring network and the metal patterns in the upper and lower non-adjacent metal layers, perform spatial verification on each overlapping area, generate an intermediate layer metal pattern in each overlapping area that passes the spatial verification, and extract each first overlapping area where the metal patterns in the generated intermediate layer metal layer overlap;
[0088] The second verification module is used to respectively extract the second overlapping areas where each metal pattern in the first wiring network and the second wiring network exists with the metal patterns in the upper and lower adjacent metal layers, perform through-hole defect verification on each first overlapping area and each second overlapping area, and output the first overlapping area and the second overlapping area where through-hole defects exist; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that a through-hole defect exists in the overlapping area.
[0089] In one embodiment, the graphic acquisition module is used to acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout, specifically including: acquiring the structure file of the target layout and inputting the structure file into the layout verification tool; based on the layout verification tool, acquiring all metal graphics contained in the wiring network in the target layout; wherein the first wiring network is a power line network, and the second wiring network is a ground line network.
[0090] In one embodiment, the spatial verification is performed on each overlapping area, and an intermediate metal pattern is generated in each overlapping area that passes the spatial verification, specifically including: performing a first spatial verification on each overlapping area, judging one by one whether there is an intermediate metal pattern in each overlapping area and eliminating overlapping areas with intermediate metal patterns, and outputting a first spatial verification result when there is no intermediate metal pattern in each overlapping area; wherein the first spatial verification result includes all overlapping areas without intermediate metal patterns; performing a second spatial verification on each overlapping area in the first spatial verification result, judging one by one whether there is space in each overlapping area that allows the intermediate metal pattern to be placed, and when there is space in the overlapping area that allows the intermediate metal pattern to be placed, determining that the overlapping area passes the spatial verification.
[0091] In one embodiment, each first overlapping area where the extracted and generated intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers specifically includes: acquiring one by one the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping area where each intermediate layer metal pattern is located; positionally matching the intermediate layer metal pattern with the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping area, to generate a first overlapping area where the intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers.
[0092] In one embodiment, the layout through-hole defect detection method also includes automatically reinforcing the target layout based on the through-hole defect verification result, specifically including: collecting each first overlapping area and second overlapping area where a through-hole defect exists to generate a through-hole defect verification result; generating a corresponding reinforced through-hole pattern in each overlapping area of the through-hole defect verification result according to the design rules of the target layout; summarizing each generated reinforced through-hole pattern and each intermediate layer metal pattern and generating a reinforcement information file, merging the reinforcement information file with the structure file of the target layout, and generating a reinforced layout file.
[0093] In one embodiment, before the generated through-hole graphic information and the intermediate metal graphic information are aggregated and the reinforcement information file is generated, it also includes: performing a through-hole check on the first overlapping area where each intermediate metal graphic is located, and when it is detected that the reinforcement through-hole graphic does not exist in the first overlapping area, the intermediate metal graphic corresponding to the first overlapping area is removed. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.
[0094] The embodiment of the present invention provides a layout through-hole defect detection device. After obtaining all metal patterns in the target layout, the device further obtains the area where the metal pattern overlaps with the metal pattern in the upper and lower non-adjacent metal layers in the wiring network according to the positional relationship of the metal pattern, performs spatial verification on each overlapping area, generates an intermediate layer metal pattern in the overlapping area that passes the spatial verification, and extracts each first overlapping area where the intermediate layer metal pattern overlaps with the metal pattern in the upper and lower adjacent metal layers. Using the intermediate layer metal pattern as a medium, the area where the metal pattern in the upper and lower non-adjacent metal layers overlaps is converted into the first overlapping area where the metal pattern in the upper and lower adjacent metal layers overlaps, thereby reducing the difficulty of through-hole defect detection. Further, the second overlapping area where each metal pattern overlaps with the metal pattern in the upper and lower adjacent metal layers in the wiring network is obtained, and the through-hole defect verification is performed one by one with the first handover area where the intermediate layer metal pattern overlaps with the metal pattern in the upper and lower adjacent metal layers. When there is no through hole in the overlapping area and there is space for placing the through hole, it is determined that there is a through-hole defect in the overlapping area at this time, thereby realizing through-hole defect detection of the target layout. The embodiment of the present invention provides a through-hole defect detection device, which converts the overlapping area of metal patterns in upper and lower non-adjacent metal layers into the overlapping area of metal patterns in upper and lower adjacent metal layers based on the idea of constructing an intermediate layer metal pattern as a medium, thereby reducing the difficulty of through-hole defect detection. Furthermore, through-hole defect judgment is directly performed on the overlapping area, without the need for manual inspection or performance testing of the target layout to determine whether there is a through-hole defect, and the operation is simple and easy to implement. Moreover, the through-hole defect detection result is not affected by the through-hole density, thereby improving the accuracy of through-hole defect detection.
[0095] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and substitutions can be made without departing from the technical principles of the present invention. These improvements and substitutions should also be regarded as the scope of protection of the present invention.
Claims
1. A method for detecting through-hole defects in a layout, characterized in that: include: Acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout based on the layout verification tool; Respectively obtaining overlapping regions between each metal pattern in the first wiring network and the second wiring network and metal patterns in upper and lower non-adjacent metal layers, performing spatial verification on each overlapping region, generating an intermediate layer metal pattern in each overlapping region that passes the spatial verification, and extracting each first overlapping region where the generated intermediate layer metal pattern overlaps with metal patterns in upper and lower adjacent metal layers, wherein the shape of the intermediate layer metal pattern depends on the design requirements of the target layout; The performing of a spatial check on each overlapping region and generating an intermediate metal pattern in each overlapping region that passes the spatial check specifically includes: performing a first spatial check on each overlapping region, determining one by one whether there is an intermediate metal pattern in each overlapping region and eliminating overlapping regions with intermediate metal patterns, and outputting a first spatial check result when there is no intermediate metal pattern in each overlapping region; wherein the first spatial check result includes all overlapping regions without intermediate metal patterns; performing a second spatial check on each overlapping region in the first spatial check result, determining one by one whether there is space in each overlapping region that allows the intermediate metal pattern to be placed, and determining that the overlapping region passes the spatial check when there is space in the overlapping region that allows the intermediate metal pattern to be placed. The second overlapping areas between each metal pattern in the first wiring network and the second wiring network and the metal patterns in the upper and lower adjacent metal layers are respectively extracted, and each first overlapping area and each second overlapping area are checked for through-hole defects, and the first overlapping area and the second overlapping area with through-hole defects are output; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that the overlapping area has a through-hole defect.
2. A method for detecting through-hole defects in a layout as claimed in claim 1, characterized in that: The step of obtaining all metal patterns contained in the first wiring network and the second wiring network in the target layout specifically includes: Obtaining a structure file of a target layout and inputting the structure file into a layout verification tool; Based on the layout verification tool, all metal graphics contained in the wiring network in the target layout are obtained; wherein the first wiring network is a power line network, and the second wiring network is a ground line network.
3. A method for detecting through-hole defects in a layout as claimed in claim 1, characterized in that: Each first overlapping region where the extracted and generated intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers specifically includes: Obtaining metal patterns in upper and lower non-adjacent metal layers corresponding to the overlapping area where each intermediate layer metal pattern is located one by one; The metal pattern of the middle layer is matched with the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region, so as to generate a first overlapping region where the metal pattern of the middle layer overlaps with the metal patterns in the upper and lower adjacent metal layers.
4. An automatic reinforcement method, characterized in that: include: Performing through-hole defect detection on a target layout using the layout through-hole defect detection method as described in any one of claims 1 to 3; Collecting each first overlapping area and second overlapping area where a through-hole defect exists, and generating a through-hole defect verification result; Generate a corresponding reinforced via pattern in each overlapping region of the via defect verification result according to the design rule of the target layout; Each generated reinforcement through-hole pattern and each intermediate layer metal pattern are summarized to generate a reinforcement information file, and the reinforcement information file is merged with the structure file of the target layout to generate a reinforcement layout file.
5. An automatic reinforcement method as claimed in claim 4, characterized in that: Before the generated through hole graphic information and intermediate layer metal graphic information are aggregated and the reinforcement information file is generated, it also includes: A through-hole check is performed on the first overlapping region where each intermediate layer metal pattern is located. When it is detected that the reinforced through-hole pattern does not exist in the first overlapping region, the intermediate layer metal pattern corresponding to the first overlapping region is removed.
6. A layout through-hole defect detection device, characterized in that: It includes a graphics acquisition module, a first verification module and a second verification module; The graphic acquisition module is used to acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout; The first verification module is used to respectively obtain the overlapping areas between each metal pattern in the first wiring network and the second wiring network and the metal patterns in the upper and lower non-adjacent metal layers, perform spatial verification on each overlapping area, generate an intermediate layer metal pattern in each overlapping area that passes the spatial verification, and extract each first overlapping area where the metal patterns in the generated intermediate layer metal layer overlap; wherein the shape of the intermediate layer metal pattern depends on the design requirements of the target layout; The performing of a spatial check on each overlapping region and generating an intermediate metal pattern in each overlapping region that passes the spatial check specifically includes: performing a first spatial check on each overlapping region, determining one by one whether there is an intermediate metal pattern in each overlapping region and eliminating overlapping regions with intermediate metal patterns, and outputting a first spatial check result when there is no intermediate metal pattern in each overlapping region; wherein the first spatial check result includes all overlapping regions without intermediate metal patterns; performing a second spatial check on each overlapping region in the first spatial check result, determining one by one whether there is space in each overlapping region that allows the intermediate metal pattern to be placed, and determining that the overlapping region passes the spatial check when there is space in the overlapping region that allows the intermediate metal pattern to be placed. The second verification module is used to respectively extract the second overlapping areas where each metal pattern in the first wiring network and the second wiring network exists with the metal patterns in the upper and lower adjacent metal layers, perform through-hole defect verification on each first overlapping area and each second overlapping area, and output the first overlapping area and the second overlapping area where through-hole defects exist; wherein, when there is no through-hole in the overlapping area and there is space in the overlapping area that allows the through-hole to be placed, it is determined that a through-hole defect exists in the overlapping area.
7. A layout through-hole defect detection device as claimed in claim 6, characterized in that: The graphic acquisition module is used to acquire all metal graphics contained in the first wiring network and the second wiring network in the target layout, specifically including: Obtaining a structure file of a target layout and inputting the structure file into a layout verification tool; Based on the layout verification tool, all metal graphics contained in the wiring network in the target layout are obtained; wherein the first wiring network is a power line network, and the second wiring network is a ground line network.
8. A layout through-hole defect detection device as claimed in claim 6, characterized in that: Each first overlapping region where the extracted and generated intermediate layer metal pattern overlaps with the metal patterns in the upper and lower adjacent metal layers specifically includes: Obtaining metal patterns in upper and lower non-adjacent metal layers corresponding to the overlapping area where each intermediate layer metal pattern is located one by one; The metal pattern of the middle layer is matched with the metal patterns in the upper and lower non-adjacent metal layers corresponding to the overlapping region, so as to generate a first overlapping region where the metal pattern of the middle layer overlaps with the metal patterns in the upper and lower adjacent metal layers.