A high-precision automatic compensation test method

Abstract

The present invention relates to the field of semiconductor testing technology, specifically a high-precision automatic compensation test method, which can reduce the error accumulation of superimposed output, collect the load terminal voltage difference through the high-precision ADC, transmit the data to the FPGA for processing, take the VI source output value and the high-precision measurement value for difference calculation, and then transmit it to the VI source output through the correction Offset, through this mode to ensure that the VI source output voltage source has higher accuracy; at the same time, it can solve the dependence of measurement on high-precision instruments, cut to different channels for calibration through the public High-Accuray ADC on the board, and the calibration steps are the same as S2. This calibration method reduces the dependence on the multimeter, and the multi-channel ADC / DAC on the board is modified and calibrated through the high-precision ADC inside the board, and internal self-test can be added. The additional test control is set to the FPGA through software, and the hardware automatically compensates the operation. This method can improve the test efficiency. There is no need to repeatedly measure and test compensation verification back and forth through software.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor testing, in particular to a high-precision automatic compensation testing method. Background Art

[0002] Semiconductor testing is an important part of ensuring the quality and performance of semiconductor chips. The testing process can be divided into wafer testing and package testing according to different test objects; it can also be divided into three types according to different test parameters, namely temperature, speed and operation mode testing. The temperature test uses the temperature applied to the test sample as the standard, the speed test is divided into core test and rate test, and the operation mode test is subdivided into DC test (DC Test), AC test (ACTTest) and function test (FunctionTest). The object of wafer testing is the wafer.

[0003] In the prior art, when the output voltage of a single channel is not enough, multi-channel superposition output is required. The superposition error will be amplified, resulting in large output value deviation. When the channel measurement accuracy does not meet the requirements, high-precision instruments are required to perform high-precision measurements to compensate the output voltage value, which is more dependent on high-precision instruments. However, high-precision instruments make the testing cost higher. Summary of the invention

[0004] The purpose of the present invention is to provide a high-precision automatic compensation test method to solve the problems raised in the above background technology.

[0005] The technical solution of the present invention is: a high-precision automatic compensation test method, comprising the following steps:

[0006] S1. Calibrate the High-Accuray ADC through VI Multimate to achieve high accuracy.

[0007] S2. Use the calibrated High-Accuray ADC to perform internal calibration correction on VI Source;

[0008] S3, High-Accuray ADC calibrates the multi-channel VI Source through relays to correct gainoffset;

[0009] S4. When the load requires a high-precision output voltage value, the voltage difference at the load end is collected through a high-precision ADC, and the data is transmitted to the FPGA for processing. The difference between the VI source output value and the high-precision measurement value is calculated, and then the offset is corrected and transmitted to the VI source output;

[0010] S5. VI source compensation for multiple load superposition outputs is achieved by collecting the voltage difference at the load end through a high-precision ADC. The data is transmitted to the FPGA for processing, and the difference between the VI source output value and the high-precision measurement value is calculated. The difference is then transmitted to the last accumulated VI source output through the correction Offset.

[0011] Preferably, S2 comprises:

[0012] The VI source outputs the theoretical value FVvalue of the voltage to the load, and the High-Accuray ADC measures it to obtain the measured value MeasureValue;

[0013] The ADC value measured in the channel is SelfMeasure; the FV deviation value = MeasureValue - FVvalue; the linear data of the 10V position is obtained through coherent calculation, and finally the FVgain and offset are obtained; similarly, the channel ADC deviation value = MeasureValue- SelfMeasure; the linear data of the 10V position is obtained through coherent calculation, and finally the gain and offset of the channel ADC are obtained.

[0014] Preferably, S3 includes switching to different channels for calibration through a common High-Accuray ADC on the board, and the calibration steps are the same as S2.

[0015] Preferably, S4 includes:

[0016] When the high-precision ADC monitoring VI source output value is not accurate enough, and when the test shows that the VI source output deviates from the theoretical value added by the software, the deviation value is obtained through FPGA and added to the VI source output.

[0017] Preferably, S4 further includes:

[0018] Use FPGA to control the high-precision measurement of the power supply to test the voltage on the load. The VI source is set to add voltage to the load. The FPGA reads back the high-precision source test value - the output value to the load end set by the VI = the deviation value. When the deviation value is within the set range, no processing is done. If it exceeds the set deviation range, the output value to the load end set by the FPGA control VI + the deviation value = the theoretical value required to be achieved by the load end.

[0019] The deviation range accuracy reaches +-0.5mV range.

[0020] Preferably, S5 includes:

[0021] When three VI sources simultaneously output 5V and the maximum total deviation is 1.5mV, if the potential difference from the lowest end L to the highest end H is required not to exceed 0.5mV, connect the high-precision measurement unit to the load end under test for monitoring. When the deviation exceeds 0.5mV, if the measured value is 15.001V, the FPGA controls the highest end VI source A to output a voltage of 4.999V to compensate for the overall deviation.

[0022] The present invention provides a high-precision automatic compensation test method through improvement, which has the following improvements and advantages compared with the prior art:

[0023] The present invention can reduce the error accumulation of superimposed output. The load end voltage difference is collected by high-precision ADC, and the data is transmitted to FPGA for processing. The difference between the VI source output value and the high-precision measurement value is calculated, and then the difference is transmitted to the VI source output through the correction Offset. This mode ensures that the VI source output voltage source has higher accuracy.

[0024] The present invention can add internal self-check, calibrate the internal measurement unit, and then disconnect the multimeter to perform internal self-check calibration correction, etc.; connect the high-precision measurement unit to the load end for monitoring, when the deviation exceeds 0.5mV, if the measured value is 15.001V, the FPGA controls the highest end VI source A output voltage to 4.999V to compensate for the overall deviation; the above-mentioned additional test control is set to the FPGA through software, and the hardware automatically compensates the operation, and this method can improve the test efficiency. There is no need to repeatedly measure and test compensation verification through software.

[0025] The present invention can solve the dependence of measurement on high-precision instruments. The common High-Accuray ADC on the board is switched to different channels for calibration. The calibration steps are the same as S2. This calibration method reduces the dependence on the multimeter. The multi-channel ADC / DAC on the board is modified and calibrated through the high-precision ADC inside the board. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The present invention will be further explained below in conjunction with the accompanying drawings and embodiments:

[0027] Figure 1 is a flow chart of a single-channel high-precision automatic compensation test method according to an embodiment of the present invention;

[0028] Figure 2 is a flow chart of a multi-channel high-precision automatic compensation test method according to an embodiment of the present invention;

[0029] Figure 3 is a flow chart of calibrating High-Accuray ADC by VI Multimate of the present invention;

[0030] Figure 4 is a flow chart of the High-Accuray ADC calibrating the VI Source of the present invention;

[0031] Figure 5 It is a flow chart of the High-Accuray ADC of the present invention calibrating and correcting gain offset of multi-channel VI Source through relays;

[0032] Figure 6 It is a flow chart of the High-Accuray ADC of the present invention calibrating and correcting gain offset of multi-channel VI Source through relays;

[0033] Figure 7 is a flow chart of collecting and processing single-channel voltage difference in an embodiment of the present invention;

[0034] Figure 8 It is a flow chart of collecting and processing multi-channel voltage differences in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The present invention is described in detail below, and the technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] The present invention provides a high-precision automatic compensation test method through improvement. The technical solution of the present invention is: Example

[0037] like Figure 1-Figure 8 As shown, a high-precision automatic compensation test method includes the following steps:

[0038] S1. Calibrate the High-Accuray ADC through VI Multimate to achieve high precision. Currently, a 6-bit 1 / 2 multimeter is commonly used, and the precision reaches the 16-bit precision requirement. In this embodiment, an 18-bit high-precision measurement unit is used, so an 8-bit 1 / 2 multimeter is required for calibration, for example:

[0039] The accuracy resolution of the 10V gear is 20V / =0.076mV; the accuracy requirement of the VI source output voltage to the load can be low, and the multimeter is used to measure the measured value MultimeterValue; the high-precision measurement ADC measured value SelfMeasure; the deviation value = SelfMeasure - MultimeterValue; the gain and offset (i.e. the linearity index from -10V to 10V) are obtained through the coherent calculation method;

[0040] S2. Use the calibrated High-Accuray ADC to perform internal calibration correction on VI Source. Specifically:

[0041] The VI source outputs the theoretical value FVvalue of the voltage to the load, and the High-Accuray ADC measures it to obtain the measured value MeasureValue;

[0042] The ADC value measured in the channel is SelfMeasure; FV deviation value = MeasureValue - FVvalue; the linear data of the 10V range (-10V to 10V) is obtained through coherent calculation, and finally the FVgain and offset are obtained; similarly, the channel ADC deviation value = MeasureValue - SelfMeasure; the linear data of the 10V range (-10V to 10V) is obtained through coherent calculation, and finally the gain and offset of the channel ADC are obtained;

[0043] With the high-precision measurement units of gain and offset, the multimeter's index accuracy can be achieved when measuring other voltages. Therefore, the higher the accuracy of the multimeter, the higher the accuracy of the high-precision measurement unit after calibration.

[0044] The gain and offset of the ADC obtained above are stored in the database; the gain and offset of the DAC are stored in the FPGA memory on the board (the FPGA ram is stored so that the software does not need to read the gain / offset when the force output is performed, thus saving the time of the output operation);

[0045] S3, High-Accuray ADC calibrates the multi-channel VI Source through the relay to correct the gainoffset, that is, the public High-Accuray ADC on the board is switched to different channels for calibration (the high-precision measurement unit at this time acts as a multimeter). The calibration steps are the same as S2. This calibration method reduces the dependence on the multimeter and modifies and calibrates the multi-channel ADC / DAC on the board through the high-precision ADC inside the board.

[0046] S4. When the load requires a high-precision output voltage value (for example, the automotive battery management chip needs to control the voltage deviation between each battery, and the ADC chip below 14 bits requires a LSB resolution of 20V / for each voltage value), the high-precision ADC is required to monitor the VI source output value, which is not accurate enough. When the VI source output is tested to have a deviation from the theoretical value added by the software, the deviation value is obtained through the FPGA and added to the VI source output;

[0047] Specifically, FPGA controls the voltage on the power supply test load with high precision. The VI source is set to add voltage to the load. The FPGA reads back the high-precision source test value (actually the actual value output by the VI to the load end) - the value output to the load end set by the VI (theoretical value) = the deviation value (considered to be the offset). When the deviation value is within the set range, no processing is performed. If it exceeds the set deviation range, the value output to the load end set by the FPGA control VI (theoretical value) + the deviation value (considered to be the offset) = the theoretical value required to be achieved by the load end. The deviation range accuracy can reach +-0.5mV;

[0048] When the high-precision ADC is required to monitor the value of the VI source output but it is not accurate enough, and when the VI source output is tested to be deviated from the theoretical value added by the software, the deviation value is obtained through FPGA and added to the VI source output;

[0049] Use FPGA to control the high-precision measurement of the power supply to test the voltage on the load. The VI source is set to add voltage to the load. The FPGA reads back the high-precision source test value - the output value to the load end set by the VI = the deviation value. When the deviation value is within the set range, no processing is done. If it exceeds the set deviation range, the output value to the load end set by the FPGA control VI + the deviation value = the theoretical value required to be achieved by the load end.

[0050] The load voltage difference is collected by high-precision ADC, and the data is transmitted to FPGA for processing. The difference between the VI source output value and the high-precision measurement value is calculated, and then the offset is corrected and transmitted to the VI source output. This mode ensures that the VI source output voltage source has higher accuracy.

[0051] S5, multi-channel load superposition output VI source compensation is to collect the load end voltage difference through high-precision ADC, and transmit the data to FPGA for processing to calculate the difference between the VI source output value and the high-precision measurement value, and then pass it to the last accumulated VI source output through the correction Offset;

[0052] Scenarios for using multi-channel overlay:

[0053] For example, the role of a battery management chip is to monitor the use of multiple batteries in series. When testing battery management chips, multiple VI sources act as batteries to provide power.

[0054] The high-precision measurement unit is a floating power supply, so the measurement unit tests the potential difference. Multi-channel superposition can monitor any VI source in the series circuit, and can also monitor the overall potential difference after series connection.

[0055] The output deviation of a single-channel VI source is within the deviation accuracy of 0.5mV, and the deviation will be greater when multiple channels are superimposed.

[0056] example:

[0057] like Figure 8 As shown in the figure, when the 3-way VI source outputs 5V at the same time, the maximum total deviation is 1.5mV. If the potential difference from the lowest end L to the highest end H is required not to exceed 0.5mV, it cannot be met.

[0058] At this time, the high-precision measurement unit can be connected to the load end (the lowest end L and the highest end H of the load end to be measured) for monitoring. When the deviation exceeds 0.5mV, if the measured value is 15.001V, the FPGA controls the highest end VI source A to output a voltage of 4.999V to compensate for the overall deviation. The above-mentioned additional measurement control is set to the FPGA through software, and the hardware automatically compensates the operation. This method can improve the test efficiency; there is no need to repeatedly measure and test compensation verification through software.

[0059] The above description enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A high-precision automatic compensation test method, characterized in that: The following steps are involved: S1. Calibrate the High-Accuray ADC through VI Multimate to achieve high accuracy. S2. Use the calibrated High-Accuray ADC to perform internal calibration correction on VI Source; S3, High-Accuray ADC calibrates the multi-channel VI Source through relays to correct the gain offset; S4. When the load requires a high-precision output voltage value, the voltage difference at the load end is collected through a high-precision ADC, and the data is transmitted to the FPGA for processing. The difference between the VI source output value and the high-precision measurement value is calculated, and then the offset is corrected and transmitted to the VI source output; S5, multi-channel load superposition output VI source compensation is to collect the load end voltage difference through high-precision ADC, and transmit the data to FPGA for processing to calculate the difference between the VI source output value and the high-precision measurement value, and then pass it to the last accumulated VI source output through the correction Offset; Add internal self-check, calibrate the internal measuring unit, then disconnect the multimeter to perform internal self-check calibration correction, and connect the high-precision measuring unit to the load end for monitoring.

2. A high-precision automatic compensation test method according to claim 1, characterized in that: The S2 includes: The VI source outputs the theoretical value FVvalue of the voltage to the load, and the High-Accuray ADC measures it to obtain the measured value MeasureValue; The ADC value measured in the channel is SelfMeasure; the FV deviation value = MeasureValue - FVvalue; the linear data of the 10V position is obtained through coherent calculation, and finally the FVgain and offset are obtained; similarly, the channel ADC deviation value = MeasureValue - SelfMeasure; the linear data of the 10V position is obtained through coherent calculation, and finally the gain and offset of the channel ADC are obtained.

3. A high-precision automatic compensation test method according to claim 2, characterized in that: The S3 includes switching to different channels for calibration through the common High-Accuray ADC on the board, and the calibration steps are the same as those of S2.

4. A high-precision automatic compensation test method according to claim 1, characterized in that: The S4 includes: When the high-precision ADC is required to monitor the value of the VI source output but it is not accurate enough, and when the VI source output is tested to have a deviation from the theoretical value added by the software, the deviation value is obtained through the FPGA and added to the VI source output.

5. A high-precision automatic compensation test method according to claim 4, characterized in that: The S4 further comprises: Use FPGA to control the high-precision measurement of the power supply to test the voltage on the load. The VI source is set to add voltage to the load. The FPGA reads back the high-precision source test value - the output value to the load end set by the VI = the deviation value. When the deviation value is within the set range, no processing is done. If it exceeds the set deviation range, the output value to the load end set by the FPGA control VI + the deviation value = the theoretical value required to be achieved by the load end. The deviation range accuracy reaches +-0.5mV range.

6. A high-precision automatic compensation test method according to claim 1, characterized in that: The S5 includes: When three VI sources simultaneously output 5V and the maximum total deviation is 1.5mV, if the potential difference from the lowest end L to the highest end H is required not to exceed 0.5mV, connect the high-precision measurement unit to the load end under test for monitoring. When the deviation exceeds 0.5mV, if the measured value is 15.001V, the FPGA controls the highest end VI source A to output a voltage of 4.999V to compensate for the overall deviation.

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