Integrated circuit chip packaging optimization control method and system

Abstract

The present application provides an integrated circuit chip packaging optimization control method and system, which relates to the field of image data processing technology. The method includes: constructing a hyperspace, configuring a chip pad surface reference image, interacting with a packaging controller, obtaining a packaging signal and a packaging live image, and then selectively comparing based on a semantic segmentation component to generate a live image semantic identifier, extracting the edge coordinates of the chip packaging space through an edge positioning component, and then extracting the selected reference edge coordinates. When it is greater than or equal to the deviation index threshold, a chip adjustment signal is issued to optimize the position. This application can solve the technical problem that the prior art is difficult to detect and correct packaging position deviations in a timely manner due to low packaging accuracy and the lack of real-time monitoring and feedback mechanisms, further affecting chip performance and packaging efficiency. Real-time monitoring and feedback are achieved to improve packaging accuracy.

Description

Technical Field

[0001] This application relates to the field of image data processing technology, and in particular to an integrated circuit chip packaging optimization control method and system. Background Technology

[0002] The growing demand for miniaturization, lightweighting, and high performance in the electronics market has driven the development of packaging technology towards higher density, higher pin count, thinner profiles, and smaller size.

[0003] While current chip packaging technologies have made some progress, numerous challenges remain in practical applications. Traditional packaging processes often rely on manual operation and simple mechanical positioning, which have limitations in terms of accuracy and efficiency. This is especially true in high-level redistribution layer packaging, where the complexity of the layers and the high precision requirements often make traditional methods insufficient for modern chip packaging needs. During the packaging process, the lack of efficient and accurate automated detection and positioning technologies means that minute deviations in the packaging position may not be detected and corrected in time. These deviations can be amplified in subsequent process flows, leading to chip performance degradation or even failure. Furthermore, the absence of real-time monitoring and feedback mechanisms during the packaging process also hinders timely problem detection, further impacting packaging quality and efficiency.

[0004] In summary, existing technologies suffer from low packaging precision and a lack of real-time monitoring and feedback mechanisms, making it difficult to detect and correct packaging position deviations in a timely manner. This further impacts chip performance and packaging efficiency. Therefore, there is an urgent need for a novel chip packaging technology to improve packaging precision, achieve real-time monitoring and feedback, and enhance automation levels, thereby addressing the aforementioned problems. Summary of the Invention

[0005] The purpose of this application is to provide an integrated circuit chip packaging optimization control method and system to solve the technical problem that the low packaging accuracy and lack of real-time monitoring and feedback mechanisms in the prior art make it difficult to detect and correct packaging position deviations in a timely manner, which further affects chip performance and packaging efficiency.

[0006] In view of the above problems, this application provides an integrated circuit chip packaging optimization control method and system.

[0007] In a first aspect, this application provides an integrated circuit chip packaging optimization control method, which is implemented through an integrated circuit chip packaging optimization control system. The method includes: constructing a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space; configuring a chip pad surface reference image and first reference edge coordinates, a first-level redistribution layer reference image and second reference edge coordinates up to an Nth-level redistribution layer reference image and an N+1th-level reference edge coordinates in the hyperspace; interacting with a packaging controller to obtain packaging process signals and packaging real-time images; and, based on the packaging real-time images and the packaging process signals, performing semantic segmentation on the chip pad surface reference image, the first-level redistribution layer reference image, and the N+1th-level reference edge coordinates in the hyperspace. Selective comparison is performed on the reference images of the redistribution layer up to the Nth level redistribution layer to generate real-time image semantic identifiers, wherein the semantic segmentation component is a Siamese neural network topology; the edge coordinates of the real-time image semantic identifiers in the chip packaging space are extracted by the edge localization component and set as the comparison edge coordinates; according to the packaging process signal, selected reference edge coordinates are extracted from the first reference edge coordinates, the second reference edge coordinates up to the (N+1)th reference edge coordinates; when the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to the deviation index threshold, a chip position adjustment signal is issued to notify the packaging controller to perform position optimization.

[0008] Secondly, this application also provides an integrated circuit chip packaging optimization control system for executing an integrated circuit chip packaging optimization control method as described in the first aspect, wherein the system includes: a hyperspace construction module for constructing a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space; a chip configuration module for configuring a chip pad surface reference image and first reference edge coordinates, a first-level redistribution layer reference image and second reference edge coordinates up to an Nth-level redistribution layer reference image and N+1th reference edge coordinates in the hyperspace; a packaging information acquisition module for interacting with a packaging controller to obtain packaging process signals and packaging real-time images; and an image comparison module for using the packaging real-time images and the packaging process signals to perform semantic segmentation on the chip pad surface reference image and the packaging process signals. The system selectively compares the quasi-image, the first-level redistribution layer reference image up to the Nth-level redistribution layer reference image to generate a real-world image semantic identifier. The semantic segmentation component is a Siamese neural network topology. A comparison edge coordinate extraction module is used to extract the edge coordinates of the real-world image semantic identifier within the chip packaging space using an edge localization component, and set these as comparison edge coordinates. A reference edge coordinate extraction module is used to extract selected reference edge coordinates from the first reference edge coordinate, the second reference edge coordinate, up to the (N+1)th reference edge coordinate, based on the packaging process signal. A position optimization module is used to send a chip position adjustment signal to the packaging controller to perform position optimization when the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to a deviation index threshold.

[0009] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0010] By constructing a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space; configuring chip pad surface reference images and first reference edge coordinates, first-level redistribution layer reference images and second reference edge coordinates up to N-level redistribution layer reference images and N+1-th reference edge coordinates in the hyperspace; interacting with the packaging controller to obtain packaging process signals and packaging real-time images; using the packaging real-time images and the packaging process signals, selectively comparing the chip pad surface reference images, the first-level redistribution layer reference images up to the N-level redistribution layer reference images based on a semantic segmentation component to generate real-time image semantic labels, wherein the semantic segmentation component is a twin neural network topology; The edge positioning component extracts the semantic identifiers of the real-time image from the edge coordinates of the chip packaging space, setting them as the comparison edge coordinates. Based on the packaging process signal, selected reference edge coordinates are extracted from the first reference edge coordinates, the second reference edge coordinates, up to the (N+1)th reference edge coordinates. When the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to a deviation index threshold, a chip position adjustment signal is sent to the packaging controller to optimize the position. This effectively solves the technical problem in existing technologies where low packaging accuracy and the lack of real-time monitoring and feedback mechanisms make it difficult to detect and correct packaging position deviations in a timely manner, further affecting chip performance and packaging efficiency. Real-time monitoring and feedback are achieved, improving packaging accuracy.

[0011] The above description is merely an overview of the technical solution of this application. To better understand the technical means of this application and to facilitate its implementation according to the description, and to make the above and other objects, features, and advantages of this application more apparent, specific embodiments of this application are described below. It should be understood that the content described in this section is not intended to identify key or important features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent through the following description. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely exemplary. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0013] Figure 1 This is a flowchart illustrating an integrated circuit chip packaging optimization control method according to this application;

[0014] Figure 2 This is a schematic diagram of the structure of an integrated circuit chip packaging optimization control system according to this application.

[0015] Explanation of reference numerals in the attached figures:

[0016] The module includes a hyperspace construction module 11, a chip configuration module 12, a packaging information acquisition module 13, an image comparison module 14, a comparison edge coordinate extraction module 15, a reference edge coordinate extraction module 16, and a position optimization module 17. Detailed Implementation

[0017] This application provides an integrated circuit chip packaging optimization control method and system, which solves the technical problem in existing technologies where low packaging accuracy and the lack of real-time monitoring and feedback mechanisms make it difficult to detect and correct packaging position deviations in a timely manner, further affecting chip performance and packaging efficiency. Real-time monitoring and feedback are achieved, thus improving packaging accuracy.

[0018] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. It should be understood that this application is not limited to the exemplary embodiments described herein. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application. It should also be noted that, for ease of description, only the parts related to this application are shown in the accompanying drawings, not all of them.

[0019] Example 1

[0020] Please see the appendix Figure 1 This application provides an integrated circuit chip packaging optimization control method, wherein the method is applied to an integrated circuit chip packaging optimization control system, and the method specifically includes the following steps:

[0021] S1: Construct a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space.

[0022] Specifically, a digital twin space is a virtual environment constructed using digital technology to create a model that perfectly corresponds to a physical entity. In the field of chip packaging, a digital twin space can simulate the real chip packaging environment and processes. It utilizes sensors and monitoring systems to collect key data from the chip packaging process, such as temperature, pressure, and packaging material properties. The collected data is cleaned, denoised, and standardized to ensure accuracy and usability. Using professional modeling software such as SolidWorks and AutoCAD, a high-precision 3D model is created based on the actual chip packaging equipment and processes. The model should include all key components such as the chip, packaging substrate, pads, and pins, accurately reflecting their geometry, material properties, and interrelationships. The pre-processed sensor data is then fused with the 3D model, enabling the model to reflect the real production environment in real time.

[0023] S2: Configure the chip pad surface reference image and the first reference edge coordinates, the first-level redistribution layer reference image and the second reference edge coordinates up to the Nth-level redistribution layer reference image and the N+1th reference edge coordinates in the hyperspace.

[0024] Specifically, a high-precision image of the chip pad surface is imported into the digital twin space as a reference image. First reference edge coordinates of the pad surface are determined. These coordinates are typically located at specific positions on the pad surface, such as corners or edges, and are used to locate and align the pad surface. These reference edge coordinates are matched with the reference image to ensure accurate correspondence in the digital twin space. Subsequently, a high-precision image of the first-level redistribution layer is imported as a reference image. Second reference edge coordinates of the first-level redistribution layer are determined. These coordinates should be consistent with the first reference edge coordinates of the pad surface to ensure precise alignment of the redistribution layer with the pad surface. In the digital twin space, the second reference edge coordinates are matched with the first-level redistribution layer reference image. For each level of redistribution layer, the above process is repeated, importing a high-precision image as a reference image and determining the corresponding reference edge coordinates. The reference edge coordinates of each level are ensured to be consistent with the previous level to achieve precise alignment between each level of redistribution layer. The reference images and corresponding reference edge coordinates of each level of redistribution layer are matched one by one in the digital twin space.

[0025] S3: Interactive encapsulation controller, obtains encapsulation process signals and real-time encapsulation images.

[0026] Specifically, the packaging controller collects various signals in real time during the packaging process, such as temperature, pressure, and position. These signals reflect the real-time status of the packaging. During the packaging process, the packaging process is captured in real time by a camera or other image acquisition device. The acquired image data may need to be preprocessed, such as noise reduction and enhancement, to improve image quality.

[0027] S4: Using the packaging real-time image and the packaging process signal, selectively compare the chip pad surface reference image, the first-level redistribution layer reference image up to the Nth-level redistribution layer reference image based on the semantic segmentation component to generate a real-time image semantic identifier, wherein the semantic segmentation component is a Siamese neural network topology.

[0028] Specifically, the process involves collecting real-time packaging images, captured during the packaging process, reflecting the current packaging state. Reference images of the chip pad surface, level 1 redistribution layer, and up to level N redistribution layer are prepared. The packaging real-time images and reference images undergo preprocessing, such as scaling, cropping, and normalization, to ensure they have the same size and color space. Key features are extracted from the packaging real-time images and reference images at each level using a Siamese neural network topology semantic segmentation component. These features include edges, textures, and shapes, which are crucial for comparison and identification of the packaging state. Based on packaging process signals, the redistribution level to be compared is determined. For example, if the packaging process signal indicates that level 1 redistribution layer packaging is currently underway, the packaging real-time image is compared with the level 1 redistribution layer reference image. The Siamese neural network topology is used to compare the real-time images with the corresponding level's reference images. This network learns and recognizes similarities and differences between images to determine if the packaging real-time state meets expectations. Semantic labels are generated for the packaging real-time images based on the comparison results. These labels include normal, abnormal, misaligned, etc., to indicate the current packaging state.

[0029] S5: Using the edge positioning component, extract the edge coordinates of the semantic identifier of the real-time image in the chip packaging space and set them as the comparison edge coordinates.

[0030] Specifically, the edge localization component is used to identify and extract image edges. It utilizes image processing techniques, including Canny edge detection and the Sobel operator. The generated real-world image semantic tags are passed as input to the edge localization component. These tags have already labeled the key regions and features of the encapsulated real-world image. The edge localization component processes the real-world image semantic tags, identifying and extracting the edges of the labeled regions. The extracted edge coordinates are typically in the image coordinate system, and a coordinate transformation is performed. The transformed edge coordinates are set as the comparison edge coordinates. These coordinates will be used to compare with the edge coordinates in the actual encapsulation process.

[0031] S6: Based on the encapsulation process signal, extract the selected reference edge coordinates from the first reference edge coordinates, the second reference edge coordinates up to the (N+1)th reference edge coordinates.

[0032] Specifically, the system listens for and receives packaging process signals from the packaging controller. These signals indicate the current status or stage of the packaging process. The received packaging process signals are parsed to determine the current packaging step or level. For example, the signal might indicate that alignment of a first-level redistribution layer is in progress, or that chip pad bonding is underway. Based on the parsed packaging process signals, reference edge coordinates corresponding to the current packaging step or level are selected from pre-stored reference edge coordinates (first reference edge coordinates, corresponding to the chip pad surface; second reference edge coordinates, corresponding to the first-level redistribution layer; up to the (N+1)th reference edge coordinates, corresponding to the Nth level redistribution layer). The selected reference edge coordinates are extracted from the stored reference edge coordinate data. These extracted reference edge coordinates are used for comparison, positioning, or control operations. For example, during packaging alignment, these coordinates can be used as reference points to adjust the packaging position or orientation.

[0033] S7: When the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to the deviation index threshold, a chip position adjustment signal is sent to notify the packaging controller to perform position optimization.

[0034] Specifically, the deviation between the compared edge coordinates and the selected reference edge coordinates is calculated. For each corresponding coordinate point, a comparison is made, and the difference between them is calculated. Based on these differences, a comprehensive coordinate deviation index is calculated. This index can be the sum of the absolute values ​​of the differences, the square root of the sum of squares, or other statistics that reflect the overall deviation. The calculated coordinate deviation index is compared with a preset deviation index threshold. This threshold is set based on packaging accuracy requirements and manufacturing process capabilities, and it represents the maximum acceptable deviation range. If the coordinate deviation index is greater than or equal to the deviation index threshold, it indicates that there is an unacceptable deviation in the current packaging position, requiring adjustment. Once it is determined that the deviation exceeds the threshold, a chip position adjustment signal is generated. This signal contains specific instructions on how to adjust the chip position, such as the direction and distance of movement, informing the packaging controller that position optimization is needed. The chip position adjustment signal is sent to the packaging controller. The packaging controller is the device responsible for actually controlling the packaging robotic arm or packaging platform. After receiving the signal, the packaging controller will execute the corresponding position adjustment operation according to a preset algorithm or operator instructions.

[0035] Furthermore, step S2 of this application also includes:

[0036] Using the hyperspace, an initial chip concept model is constructed and deployed on a preset virtual positioning slot to obtain the chip pad surface reference image and the first reference edge coordinates. The preset virtual positioning slot is a preset fixed chip position that is consistent with the chip positioning area in the chip packaging space. A first-level redistribution layer concept model is constructed and deployed on the chip pad surface of the initial chip concept model to obtain the first-level redistribution layer reference image and the second reference edge coordinates. Through iterative analysis, the Nth-level redistribution layer reference image and the N+1th reference edge coordinates are obtained.

[0037] Specifically, the constructed initial chip concept model is placed in a pre-defined virtual positioning slot. This virtual positioning slot simulates the actual positioning area of ​​the chip in the packaging space, ensuring that the placement of the model is consistent with the actual packaging position. In the virtual environment, an image of the chip pad surface is captured from a suitable perspective as a reference image. The reference image of the chip pad surface is processed using an edge detection algorithm to extract the edge coordinates of the pad surface; these coordinates will be used as the first reference edge coordinates. On the pad surface of the already placed initial chip concept model, a conceptual model of the first-level redistribution layer is constructed. This model should accurately reflect the structure and size of the first-level redistribution layer. In the virtual environment, an image of the first-level redistribution layer is captured as the reference image of that layer. Edge detection is performed on the first-level redistribution layer reference image to extract the edge coordinates, which are used as the second reference edge coordinates. Higher-level redistribution layer conceptual models are constructed progressively until the Nth level of redistribution layer is reached. For each level of redistribution layer, its reference image is captured, and the corresponding reference edge coordinates, third reference edge coordinates, fourth reference edge coordinates, and so on, up to the N+1th reference edge coordinates.

[0038] Furthermore, step S3 of this application also includes:

[0039] The first image acquisition control parameters of the hyperspace are sent to the packaging controller to control the physical image acquisition device to acquire the packaging real-time image; wherein, the disturbance distance between the second image acquisition control parameters and the first image acquisition control parameters of the physical image acquisition device must be less than or equal to the disturbance distance threshold.

[0040] Specifically, within the hyperspace, first image acquisition control parameters are set according to the simulated environment and requirements. These parameters include exposure time, focal length, white balance, resolution, etc., and are sent to the packaging controller. Upon receiving the control parameters, the packaging controller converts them into instructions suitable for the physical image acquisition device. The physical image acquisition device is a camera or camera system installed on the packaging equipment to capture live images of the packaging process. Based on the received control parameters, the physical image acquisition device begins capturing live images of the packaging process. During this process, it is ensured that the difference between the second image acquisition control parameters of the physical image acquisition device and the first image acquisition control parameters sent from the hyperspace—that is, the perturbation distance—is less than or equal to a preset perturbation distance threshold.

[0041] Furthermore, this application also includes:

[0042] The image acquisition control parameter attribute set is weighted and distributed to generate a control parameter attribute weight distribution result; the first image acquisition control parameter and the second image acquisition control parameter are subjected to same attribute deviation analysis to generate a first control parameter deviation magnitude set; the first control parameter deviation magnitude set is normalized and adjusted, and then weighted and summed according to the control parameter attribute weight distribution result to generate the disturbance distance; when the disturbance distance is less than or equal to the disturbance distance threshold, the encapsulated real-time image is sent; otherwise, the second image acquisition control parameter is updated and the image is re-acquired.

[0043] Specifically, the attribute set of image acquisition control parameters is defined, such as exposure time, focal length, white balance, and resolution. A weight is assigned to each attribute based on its importance to image quality. This can be determined through historical data analysis. The weights of each attribute are integrated into a weight distribution result. The first image acquisition control parameters are obtained from the hyperspace, and the second image acquisition control parameters are obtained from the physical image acquisition device. Deviation analysis is performed on the values ​​of the same attributes in the two sets of parameters, and the deviation magnitude of each attribute is calculated. The deviation magnitudes of all attributes are integrated into a set, namely the first control parameter deviation magnitude set. To eliminate the influence of different attribute dimensions and value ranges, the first control parameter deviation magnitude set is normalized, converting all deviation magnitudes to the same order of magnitude. Using the weight distribution result, the normalized deviation magnitudes are weighted and summed to obtain the total perturbation distance. The calculated perturbation distance is compared with a preset perturbation distance threshold. If the perturbation distance is less than or equal to the perturbation distance threshold, it indicates that the deviation of the image acquisition control parameters is within an acceptable range, and the encapsulated live image can be sent for subsequent processing. If the disturbance distance is greater than the disturbance distance threshold, it indicates that the deviation of the image acquisition control parameters is too large. In this case, it is necessary to update the second image acquisition control parameters and re-acquire the image to ensure the consistency of image quality.

[0044] Furthermore, this application also includes:

[0045] Using the image acquisition control parameter attribute set as the sole variable, historical image acquisition results of the same model of physical image acquisition device are acquired; semantic deviation analysis is performed on any two images of the same model of historical image acquisition results to generate several image semantic deviations; same attribute deviation analysis is performed on the acquisition control parameters of any two images of the same model of historical image acquisition results to generate several sets of second control parameter deviation magnitudes, wherein the several sets of second control parameter deviation magnitudes correspond one-to-one with the several image semantic deviations; a benchmark sequence is constructed based on the several image semantic deviations, and several comparison sequences are constructed based on the several sets of second control parameter deviation magnitudes; gray relational analysis is performed based on the benchmark sequence and the several comparison sequences to obtain a relational degree set; the relational degree set is traversed, and the result of summing the relational degrees is compared to generate the control parameter attribute weight distribution result.

[0046] Specifically, using the image acquisition control parameter attribute set as the sole variable, historical image acquisition results of the same model of physical image acquisition device are collected. This ensures the diversity and representativeness of the acquired image data, covering image acquisition under different parameter settings. Semantic deviation analysis is performed on any two images from the collected historical image acquisition results of the same model. Image processing and machine learning techniques are used to extract image features, and the differences between these features are compared to generate several image semantic deviations. Same-attribute deviation analysis is then performed on the acquisition control parameters corresponding to the images that generate semantic deviations. The deviation magnitude of the control parameters causing the image semantic deviations is calculated, generating several sets of second control parameter deviation magnitudes, ensuring a one-to-one correspondence between each set of second control parameter deviation magnitudes and the corresponding image semantic deviation. A baseline sequence is constructed based on several image semantic deviations, representing the degree of difference between images. Several comparison sequences are constructed based on several sets of second control parameter deviation magnitudes, representing the contribution of different control parameters to image differences. Grey relational analysis is used to compare the correlation between the baseline sequence and the comparison sequences. Grey relational analysis can quantify the similarity or correlation between different sequences, thereby determining which control parameters have a greater impact on image semantic deviations. The set of correlation degrees obtained through grey relational analysis is traversed, and the ratio of each correlation degree to the sum of the correlation degrees is calculated. This ratio reflects the relative importance of each control parameter attribute to the semantic bias of the image, i.e., its weight. These weights are then integrated to form the weight distribution result of the control parameter attributes.

[0047] Furthermore, step S4 of this application also includes:

[0048] Based on the packaging process signal, a redistribution layer deployment level is obtained. A selected reference image is extracted from the chip pad reference image, the first-level redistribution layer reference image, and up to the Nth-level redistribution layer reference image based on the redistribution layer deployment level. The selected reference image is input into the first feature extraction channel of the semantic segmentation component for training to obtain a first feature extraction result. The packaging real-world image is input into the second feature extraction channel of the semantic segmentation component for training to obtain a second feature extraction result. The packaging real-world image is then labeled using a semantic labeling channel based on the first and second feature extraction results to generate a semantic label for the real-world image. The model parameters and topology of the first and second feature extraction channels are identical.

[0049] Specifically, upon receiving a signal indicating the packaging process, this signal contains information such as the current packaging stage and level. Based on the received packaging process signal, the current redistribution layer deployment level is determined. According to the redistribution layer deployment level, a reference image corresponding to the current deployment level is extracted from pre-stored chip pad surface reference images, first-level redistribution layer reference images, up to N-level redistribution layer reference images. The extracted selected reference image is input into the first feature extraction channel of the semantic segmentation component for training. The first feature extraction channel extracts features from the reference image using a deep learning model, such as a convolutional neural network. After forward propagation, the first feature extraction channel outputs the feature extraction result of the reference image, i.e., the first feature extraction result, which includes the device's texture, shape, and color. Simultaneously, the packaging live image is input into the second feature extraction channel of the semantic segmentation component for training. The model parameters and topology of this channel are the same as those of the first feature extraction channel. Through training, the second feature extraction channel outputs the feature extraction result of the packaging live image, i.e., the second feature extraction result. Using the results of the first and second feature extractions, the encapsulated live image is semantically labeled pixel-by-pixel through a semantic labeling channel. Regions and features in the live image corresponding to the baseline image are identified. Finally, the semantic labeling result of the encapsulated live image is generated. This result clearly displays the semantic information of each region in the live image.

[0050] Furthermore, this application also includes:

[0051] A training image dataset is acquired, wherein the training image dataset contains a set of images of elements to be segmented; a first training feature dataset is extracted from the set of images of elements to be segmented; a second training feature dataset is extracted from the training image dataset; the training image dataset is labeled to generate a training label image dataset, wherein the training label image dataset contains edge labels of elements to be segmented; the first training feature dataset is used as input data for a first input node, the second training feature dataset is used as input data for a second input node, the training image dataset is used as input data for a third input node, and the training label image dataset is used as output supervision data; the semantic labeling channel is configured using the proportion of the area of ​​the non-intersecting edge labels of the output data and the output supervision data as the loss function.

[0052] Specifically, images containing the elements to be segmented are collected to form a training image dataset. Element-specific features, such as color, texture, and shape, are extracted from this dataset to form a first training feature dataset. More extensive image features, including but not limited to global color distribution and spatial layout, are extracted from the entire training image dataset to form a second training feature dataset. Each image in the training image dataset is manually or automatically labeled to identify the edges of the elements to be segmented. These labeled images constitute a training label image dataset, used for loss calculation during supervised learning. The first training feature dataset is used as input data for the first input node, the second training feature dataset as input data for the second input node, and the original training image dataset as input data for the third input node. The training label image dataset is used as output supervision data. The loss function should be based on the proportion of non-intersecting regions of the edge labels in the output data and output supervision data. The greater the difference between the edge predicted by the model and the true edge, the higher the value of the loss function. The semantic label channel is trained using the configured input data, output supervision data, and loss function. The model parameters are iteratively optimized to minimize the loss function. During training, a validation set is used to evaluate the model's performance. Adjust model parameters or network structure based on validation results to optimize performance. Evaluate the trained model on a test set to ensure good generalization ability. Apply the model to real-world scenarios for image segmentation tasks.

[0053] In summary, the integrated circuit chip packaging optimization control method provided in this application has the following technical effects:

[0054] By constructing a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space; configuring chip pad surface reference images and first reference edge coordinates, first-level redistribution layer reference images and second reference edge coordinates up to N-level redistribution layer reference images and N+1-th reference edge coordinates in the hyperspace; interacting with the packaging controller to obtain packaging process signals and packaging real-time images; using the packaging real-time images and the packaging process signals, selectively comparing the chip pad surface reference images, the first-level redistribution layer reference images up to the N-level redistribution layer reference images based on a semantic segmentation component to generate real-time image semantic labels, wherein the semantic segmentation component is a twin neural network topology; The edge positioning component extracts the semantic identifiers of the real-time image from the edge coordinates of the chip packaging space, setting them as the comparison edge coordinates. Based on the packaging process signal, selected reference edge coordinates are extracted from the first reference edge coordinates, the second reference edge coordinates, up to the (N+1)th reference edge coordinates. When the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to a deviation index threshold, a chip position adjustment signal is sent to the packaging controller to optimize the position. This effectively solves the technical problem in existing technologies where low packaging accuracy and the lack of real-time monitoring and feedback mechanisms make it difficult to detect and correct packaging position deviations in a timely manner, further affecting chip performance and packaging efficiency. Real-time monitoring and feedback are achieved, improving packaging accuracy.

[0055] Example 2

[0056] Based on the same inventive concept as the integrated circuit chip packaging optimization control method described in the foregoing embodiments, this application also provides an integrated circuit chip packaging optimization control system. Please refer to the appendix. Figure 2 The system includes:

[0057] Hyperspace construction module 11, which is used to construct a hyperspace, wherein the hyperspace is a digital twin space of the chip packaging space.

[0058] Chip configuration module 12 is used to configure chip pad surface reference image and first reference edge coordinates, first level redistribution layer reference image and second reference edge coordinates up to N level redistribution layer reference image and N+1th reference edge coordinates in the hyperspace.

[0059] The encapsulation information acquisition module 13 is used to interact with the encapsulation controller to obtain encapsulation process signals and real-time encapsulation images.

[0060] Image comparison module 14 is used to selectively compare the chip pad reference image, the first-level redistribution layer reference image up to the Nth-level redistribution layer reference image with the packaging real-time image and the packaging process signal based on the semantic segmentation component to generate a real-time image semantic identifier, wherein the semantic segmentation component is a Siamese neural network topology.

[0061] The edge coordinate extraction module 15 is used to extract the edge coordinates of the semantic identifier of the real-time image in the chip packaging space through the edge positioning component, and set them as the edge coordinates for comparison.

[0062] The reference edge coordinate extraction module 16 is used to extract selected reference edge coordinates from the first reference edge coordinates, the second reference edge coordinates up to the (N+1)th reference edge coordinates according to the encapsulation process signal.

[0063] The position optimization module 17 is used to send a chip position adjustment signal to notify the packaging controller to perform position optimization when the coordinate deviation index between the comparison edge coordinates and the selected reference edge coordinates is greater than or equal to the deviation index threshold.

[0064] Furthermore, the chip configuration module 12 in the system is also used for:

[0065] Through the hyperspace, an initial concept model of the chip is constructed and deployed in a preset virtual positioning slot to obtain the reference image of the chip pad surface and the coordinates of the first reference edge. The preset virtual positioning slot is a preset fixed chip position that is consistent with the chip positioning area of ​​the chip packaging space.

[0066] A first-level redistribution layer conceptual model is constructed and deployed on the chip pad surface of the initial chip conceptual model to obtain the reference image of the first-level redistribution layer and the second reference edge coordinates;

[0067] Through iterative analysis, the reference image of the Nth level redistribution layer and the coordinates of the (N+1)th reference edge are obtained.

[0068] Furthermore, the encapsulated information acquisition module 13 in the system is also used for:

[0069] The first image acquisition control parameters of the hyperspace are sent to the packaging controller to control the physical image acquisition device to acquire the real-time image of the packaging.

[0070] The disturbance distance between the second image acquisition control parameter and the first image acquisition control parameter of the entity image acquisition device must be less than or equal to the disturbance distance threshold.

[0071] Furthermore, the system also includes a disturbance distance generation module, which is used for:

[0072] The image acquisition control parameter attribute set is weighted and distributed to generate the control parameter attribute weight distribution result.

[0073] Perform same-attribute deviation analysis on the first image acquisition control parameter and the second image acquisition control parameter to generate a set of deviation magnitudes for the first control parameter.

[0074] The first set of control parameter deviation magnitudes is normalized and adjusted, and then weighted and summed according to the control parameter attribute weight distribution results to generate the disturbance distance;

[0075] If the disturbance distance is less than or equal to the disturbance distance threshold, the encapsulated real-time image is sent; otherwise, the second image acquisition control parameters are updated for image re-acquisition.

[0076] Furthermore, the system also includes a correlation set acquisition module, which is used for:

[0077] Using the image acquisition control parameter attribute set as the only variable, collect historical image acquisition results of the same model of entity image acquisition device;

[0078] Semantic deviation analysis is performed on any two images from the historical image acquisition results of the same model to generate several image semantic deviations;

[0079] For any two images from the historical image acquisition results of the same model, perform same attribute deviation analysis on the acquisition control parameters to generate several sets of second control parameter deviation magnitudes, wherein the several sets of second control parameter deviation magnitudes correspond one-to-one with the several image semantic deviations;

[0080] A baseline sequence is constructed based on the aforementioned image semantic deviations, and a comparison sequence is constructed based on the aforementioned sets of second control parameter deviation magnitudes.

[0081] Grey relational analysis is performed based on the benchmark sequence and the plurality of comparison sequences to obtain a relational set;

[0082] Traverse the set of correlation degrees, compare it with the sum of correlation degrees, and generate the result of the weight distribution of the control parameter attributes.

[0083] Furthermore, the image comparison module 14 in the system is also used for:

[0084] Based on the packaging process signal, a redistribution layer deployment level is obtained, and a selected reference image is extracted from the chip pad surface reference image, the first-level redistribution layer reference image up to the N-level redistribution layer reference image based on the redistribution layer deployment level;

[0085] The selected benchmark image is input into the first feature extraction channel of the semantic segmentation component for training to obtain the first feature extraction result;

[0086] The encapsulated live image is input into the second feature extraction channel of the semantic segmentation component for training to obtain the second feature extraction result;

[0087] The encapsulated live image is identified through a semantic identification channel based on the first feature extraction result and the second feature extraction result, thereby generating a semantic identifier for the live image.

[0088] The model parameters and topology of the first feature extraction channel and the second feature extraction channel are exactly the same.

[0089] Furthermore, the system also includes a semantic identifier channel configuration module, which is used for:

[0090] Acquire a training image dataset, wherein the training image dataset contains a set of images of elements to be segmented;

[0091] Extract the first training feature dataset from the image set of the elements to be segmented;

[0092] Extract the second training feature dataset from the training image dataset;

[0093] The training image dataset is labeled to generate a training labeled image dataset, wherein the training labeled image dataset has edge labels of the elements to be segmented;

[0094] The first training feature dataset is used as the input data for the first input node, the second training feature dataset is used as the input data for the second input node, the training image dataset is used as the input data for the third input node, and the training labeled image dataset is used as the output supervision data. The semantic labeling channel is configured with the ratio of the area of ​​the non-intersecting edge labels of the output data and the output supervision data as the loss function.

[0095] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Figure 1The integrated circuit chip packaging optimization control method and specific examples in Embodiment 1 are also applicable to the integrated circuit chip packaging optimization control system of this embodiment. Through the foregoing detailed description of the integrated circuit chip packaging optimization control method, those skilled in the art can clearly understand the integrated circuit chip packaging optimization control system of this embodiment; therefore, for the sake of brevity, it will not be described in detail here. As for the system disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant details can be found in the method section.

[0096] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0097] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of this application and its equivalents, this application also intends to include such modifications and variations.

Claims

1. An integrated circuit chip packaging optimization control method, characterized in that: include: Constructing a hyperspace, wherein the hyperspace is a digital twin space of a chip packaging space; Arrange the chip pad surface reference image and the first reference edge coordinate, the first-level redistribution layer reference image and the second reference edge coordinate in the hyperspace until the N-level redistribution layer reference image and the N+1-th reference edge coordinate; Interactive packaging controller to obtain packaging process signals and packaging live images; Through the package live image and the package process signal, selectively compare the chip pad surface reference image, the first-level redistribution layer reference image, and the N-level redistribution layer reference image based on a semantic segmentation component to generate a live image semantic identifier, wherein the semantic segmentation component is a twin neural network topology; Extracting edge coordinates of the semantic mark of the live image in the chip packaging space through an edge positioning component and setting them as comparison edge coordinates; extracting selected reference edge coordinates from the first reference edge coordinates, the second reference edge coordinates, and up to the N+1th reference edge coordinates according to the encapsulation process signal; When the coordinate deviation index of the compared edge coordinates and the selected reference edge coordinates is greater than or equal to a deviation index threshold, a chip position adjustment signal is sent to notify the packaging controller to perform position optimization.

2. The method according to claim 1, characterized in that Configuring the chip pad surface reference image and the first reference edge coordinate, the first-level redistribution layer reference image and the second reference edge coordinate in the hyperspace until the N-level redistribution layer reference image and the N+1th reference edge coordinate, including: Through the hyperspace, an initial conceptual model of the chip is constructed and deployed in a preset virtual positioning groove, and the chip pad surface reference image and the first reference edge coordinates are obtained, wherein the preset virtual positioning groove is a preset position for fixing the chip, which is consistent with the chip positioning area of ​​the chip packaging space; Constructing a primary redistribution layer conceptual model, deploying it on the chip pad surface of the chip initial conceptual model, and obtaining the primary redistribution layer reference image and the second reference edge coordinates; Circular analysis is performed to obtain the N-level redistribution layer reference image and the N+1th reference edge coordinates.

3. The method according to claim 1, characterized in that Interactive packaging controller, obtain packaging process signals and packaging live images, including: Sending the first image acquisition control parameter of the hyperspace to the encapsulation controller to control the entity image collector to acquire the encapsulated live image; The disturbance distance between the second image acquisition control parameter of the physical image collector and the first image acquisition control parameter must be less than or equal to a disturbance distance threshold.

4. The method according to claim 3, characterized in that The disturbance distance between the second image acquisition control parameter of the physical image collector and the first image acquisition control parameter must be less than or equal to the disturbance distance threshold, including: Performing weight distribution on the image acquisition control parameter attribute set to generate a control parameter attribute weight distribution result; Performing same-attribute deviation analysis on the first image acquisition control parameter and the second image acquisition control parameter to generate a first control parameter deviation modulus value set; Normalizing and adjusting the first control parameter deviation modulus value set, and then weighting and summing them according to the control parameter attribute weight distribution result to generate the disturbance distance; When the disturbance distance is less than or equal to the disturbance distance threshold, the packaged live image is sent; otherwise, the second image acquisition control parameter is updated to perform image re-acquisition.

5. The method according to claim 4, characterized in that Perform weight distribution on the image acquisition control parameter attribute set to generate the control parameter attribute weight distribution result, including: Using the image acquisition control parameter attribute set as the only variable, collecting historical image acquisition results of the same model of the physical image collector; Performing semantic deviation analysis on any two images of the same model historical image acquisition results to generate a number of image semantic deviations; Performing same attribute deviation analysis on the acquisition control parameters of any two images of the same model historical image acquisition results to generate a plurality of groups of second control parameter deviation modulus values, wherein the plurality of groups of second control parameter deviation modulus values ​​correspond one to one to the plurality of image semantic deviations; Constructing a reference sequence according to the plurality of image semantic deviations, and constructing a plurality of comparison sequences according to the plurality of groups of second control parameter deviation modulus values; Performing grey relational analysis based on the reference sequence and the plurality of comparison sequences to obtain a relational degree set; The association degree set is traversed, and compared with the association degree sum result to generate the control parameter attribute weight distribution result.

6. The method according to claim 1, characterized in that Through the package live image and the package process signal, the chip pad surface reference image, the first-level redistribution layer reference image and the N-level redistribution layer reference image are selectively compared based on the semantic segmentation component to generate a live image semantic identifier, wherein the semantic segmentation component is a twin neural network topology, including: According to the packaging process signal, a redistribution layer deployment level is obtained, and according to the redistribution layer deployment level, a selected reference image is extracted from the chip pad surface reference image, the first-level redistribution layer reference image, and up to the N-level redistribution layer reference image; Inputting the selected reference image into the first feature extraction channel of the semantic segmentation component for training to obtain a first feature extraction result; Inputting the encapsulated live image into the second feature extraction channel of the semantic segmentation component for training to obtain a second feature extraction result; The packaged live image is identified based on the first feature extraction result and the second feature extraction result through a semantic identification channel to generate the live image semantic identification; The model parameters and topological structures of the first feature extraction channel and the second feature extraction channel are completely the same.

7. The method according to claim 6, characterized in that The semantic identification channel construction step includes: Acquiring a training image data set, wherein the training image data set comprises an image set of components to be segmented; Extracting a first training feature data set of the image set of the component to be segmented; Extracting a second training feature data set from the training image data set; Marking the training image data set to generate a training marked image data set, wherein the training marked image data set has edge marks of components to be segmented; The first training feature data set is used as input data of the first input node, the second training feature data set is used as input data of the second input node, the training image data set is used as input data of the third input node, the training identification image data set is used as output supervision data, and the area ratio of the edge identification non-intersection area of ​​the output data and the output supervision data is used as the loss function to configure the semantic identification channel.

8. An integrated circuit chip packaging optimization control system, characterized in that: For implementing the steps of the method according to any one of claims 1 to 7, the system comprises: A hyperspace construction module, wherein the hyperspace construction module is used to construct a hyperspace, wherein the hyperspace is a digital twin space of a chip packaging space; A chip configuration module, the chip configuration module is used to configure the chip pad surface reference image and the first reference edge coordinates, the first-level redistribution layer reference image and the second reference edge coordinates up to the N-level redistribution layer reference image and the N+1-th reference edge coordinates in the hyperspace; A packaging information acquisition module, wherein the packaging information acquisition module is used to interact with the packaging controller to obtain packaging process signals and packaging live images; An image comparison module, the image comparison module is used to selectively compare the chip pad surface reference image, the first-level redistribution layer reference image, and even the N-level redistribution layer reference image through the package live image and the package process signal based on a semantic segmentation component to generate a live image semantic identification, wherein the semantic segmentation component is a twin neural network topology; A comparison edge coordinate extraction module, the comparison edge coordinate extraction module is used to extract the edge coordinates of the semantic mark of the live image in the chip packaging space through the edge positioning component, and set them as comparison edge coordinates; A reference edge coordinate extraction module, the reference edge coordinate extraction module is used to extract a selected reference edge coordinate from the first reference edge coordinate, the second reference edge coordinate to the N+1th reference edge coordinate according to the packaging process signal; A position optimization module is used to send a chip position adjustment signal to notify the packaging controller to perform position optimization when the coordinate deviation index of the compared edge coordinates and the selected reference edge coordinates is greater than or equal to a deviation index threshold.

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