Chip detection method, electronic device and storage medium

Abstract

The present application discloses a chip detection method, electronic device and storage medium. The method includes: setting a region to be detected in a preset template chip to obtain a template chip image; transforming the region to be detected to the image of the chip to be detected based on the image of the chip to be detected and the template chip image to obtain a target detection image; extracting a feature image to be detected based on the region to be detected in the target detection image; determining the type of defect to be detected based on the region to be detected; wherein the type of defect to be detected includes a broken line defect, a missing corner defect, a notch defect and a linear narrowing defect; and determining the defect position in the feature image to be detected based on the detection strategy corresponding to the defect type to be detected. Through the technical solution of the present application, the detection accuracy and detection compatibility of the chip can be improved, thereby improving the chip detection efficiency and detection quality.

Description

Technical Field

[0001] The present application generally relates to the field of image processing technology. More specifically, the present application relates to a chip detection method, an electronic device and a storage medium. Background Art

[0002] With the continuous improvement of chip manufacturing technology and processes, various new materials and new process chips are constantly emerging, and the requirements for chip detection accuracy are also constantly increasing. Some existing wafer substrates with higher hardness, such as SIC chips, are very prone to edge collapse and corner collapse defects, that is, notches, missing corners and other defects. In addition, some linear patterns may have fracture defects due to production process limitations. However, traditional detection solutions can generally only perform customized detection on specific patterns or areas, or simply determine the length or area of ​​defects based on grayscale difference cards. They have poor compatibility and cannot cover all detection types, and cannot meet the production needs of high precision, high efficiency, ease of use, and easy migration.

[0003] In view of this, there is an urgent need to provide an innovative chip detection method to improve the chip detection accuracy and detection compatibility, thereby improving the chip detection efficiency and detection quality. Summary of the invention

[0004] In order to at least solve one or more of the above-mentioned technical problems, the present application proposes a chip detection method, an electronic device and a storage medium in multiple aspects. The chip detection method can improve the detection accuracy and detection compatibility of the chip, thereby improving the chip detection efficiency and detection quality.

[0005] In the first aspect, the present application provides a chip detection method, including: setting an area to be detected in a preset template chip to obtain a template chip image; transforming the area to be detected to the chip image to be detected based on the chip image to be detected and the template chip image to obtain a target detection image; extracting a feature image to be detected in the target detection image based on the area to be detected; determining the type of defect to be detected based on the area to be detected; wherein the type of defect to be detected includes broken line defects, missing corner defects, notch defects and linear narrowing defects; and determining the defect position in the feature image to be detected based on the detection strategy corresponding to the defect type to be detected.

[0006] In some embodiments, determining the defect position in the feature image to be inspected based on the detection strategy corresponding to the defect type to be inspected includes: if the defect type to be inspected is a broken line defect, filling internal holes in the feature image to be inspected and extracting a first skeleton image; determining each endpoint and each intersection in the first skeleton image; determining the burr position based on each endpoint and each intersection and smoothing the burr position to obtain a target skeleton image; determining the number of endpoints in the target skeleton image; determining whether there are breakpoints based on the number of endpoints; if there are breakpoints, determining the breakpoint distance between adjacent breakpoints; determining whether there is a broken line defect based on the breakpoint distance and a first preset distance threshold; if there is a broken line defect, determining the defect position corresponding to the broken line defect based on the breakpoint position.

[0007] In some embodiments, determining each endpoint and each intersection in the first skeleton image includes: performing eight-neighborhood statistics on each white pixel in the first skeleton image; if the number of white pixels in the eight-neighborhood of the current target white pixel is less than 3, determining the current white pixel as an endpoint; if the number of white pixels in the eight-neighborhood of the current target white pixel is equal to 3, performing eight-neighborhood statistics on the remaining pixels in the eight-neighborhood of the current target white pixel except the current target white pixel; if the number of white pixels in the eight-neighborhood of the current statistical pixel among the remaining pixels is equal to 1, counting the current statistical pixel among the remaining pixels until the statistics of each pixel in the remaining pixels are completed to obtain the target count number; if the target count number is greater than 1, determining the current target white pixel as an endpoint; performing eight-neighborhood statistics on each white pixel in the first skeleton image; if the number of white pixels in the eight-neighborhood of the current target white pixel is greater than or equal to 4, determining the current target white pixel as an intersection.

[0008] In some embodiments, determining the burr position based on each endpoint and each intersection and smoothing the burr position includes: searching for intersections along the skeleton path of the first skeleton graph from each endpoint respectively; if the intersection is found within a preset search length, determining that the area between the current endpoint and the current intersection is the burr position, and setting the white pixels in the burr position to black.

[0009] In some embodiments, after determining whether there is a breakpoint based on the number of endpoints, the method also includes: if there is no breakpoint, determining the endpoint distance between the first and last endpoints; determining whether there is a broken line defect based on the endpoint distance and a second preset distance threshold; if there is a broken line defect, determining the defect position corresponding to the broken line defect based on the endpoint position.

[0010] In some embodiments, determining the defect position in the characteristic image to be inspected based on the detection strategy corresponding to the defect type to be inspected includes: if the defect type to be inspected is a missing corner defect, subtracting the area to be inspected from the characteristic image to be inspected to obtain a missing corner defect position image; extracting the connected domain of the missing corner defect in the missing corner defect position image, and determining the connected domain length and connected domain area of ​​the connected domain; determining whether there is a missing corner defect based on the connected domain length, the connected domain area, a preset length threshold and a preset area threshold; if there is a missing corner defect, determining the defect position based on the position of the connected domain of the missing corner defect.

[0011] In some embodiments, determining the defect position in the feature image to be inspected based on the detection strategy corresponding to the defect type to be inspected includes: if the defect type to be inspected is a notch defect, filling non-edge holes in the feature image to be inspected by a morphological closing operation to obtain a target filled image; subtracting the target filled image from the feature image to be inspected to obtain a notch position image; determining the notch area and notch depth based on the notch position image; determining whether there is a notch defect based on the notch area, notch depth, a preset notch area and a preset notch depth; if there is a notch defect, determining the defect position based on the notch position image.

[0012] In some embodiments, determining the defect position in the feature image to be inspected based on the detection strategy corresponding to the defect type to be inspected includes: if the defect type to be inspected is a linear narrowing defect, filling internal holes in the feature image to be inspected and extracting a second skeleton image, and determining the coordinates of each skeleton point in the second skeleton image; determining each pair of edge contour point coordinates based on the feature image to be inspected, and each pair of edge contour point coordinates are symmetrically distributed on both sides of the corresponding skeleton point coordinates; determining each line width corresponding to each skeleton point coordinate based on each pair of edge contour point coordinates and each skeleton point coordinate; determining the average line width based on each line width; determining whether there is a linear narrowing defect based on the average line width and a preset average width; if a linear narrowing defect exists, determining the defect position based on each line width and a line width threshold.

[0013] In a second aspect, the present application provides an electronic device, comprising: a processor; and a memory, on which a program code for chip detection is stored, and when the program code is executed by the processor, the electronic device implements the method as described above.

[0014] In a third aspect, the present application provides a non-transitory machine-readable storage medium having stored thereon a program code for chip detection, and when the program code is executed by a processor, the method as described above can be implemented.

[0015] The technical solution provided by this application may have the following beneficial effects:

[0016] The chip detection method, electronic device and storage medium provided in the present application obtain a template chip image by setting the area to be detected in a preset template chip, and then transform the area to be detected onto the chip image to be detected based on the chip image to be detected and the template chip image to obtain a target detection image, thereby being able to delineate the detection area in the target detection image.

[0017] Furthermore, the embodiment of the present application can extract the feature image to be inspected based on the area to be inspected in the target inspection image, and determine the type of defect to be inspected based on the area to be inspected, wherein the defect type to be inspected includes broken line defect, missing corner defect, notch defect and linear narrowing defect, and then determine the defect position in the feature image to be inspected based on the detection strategy corresponding to the defect type to be inspected. This achieves efficient and accurate detection of multiple defects, simplifies the detection and parameter adjustment process of different defects, has a wide range of applications, and is conducive to improving the quality and efficiency of chip detection.

[0018] In general, the embodiments of the present application can improve the detection accuracy and detection compatibility of the chip, thereby improving the chip detection efficiency and detection quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] By reading the detailed description below with reference to the accompanying drawings, the above and other purposes, features and advantages of the exemplary embodiments of the present application will become easy to understand. In the accompanying drawings, several embodiments of the present application are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0020] Figure 1 An exemplary flow chart of a chip detection method according to some embodiments of the present application is shown;

[0021] Figure 2 An exemplary flow chart showing chip detection methods according to other embodiments of the present application is shown;

[0022] Figure 3 An exemplary flow chart of a chip detection method according to some further embodiments of the present application is shown;

[0023] Figure 4 An exemplary flow chart showing a chip detection method according to some other embodiments of the present application is shown;

[0024] Figure 5 An exemplary flow chart showing a chip detection method according to some further embodiments of the present application is shown;

[0025] Figure 6 An example diagram showing a template chip image in the chip detection method of the present application;

[0026] Figure 7 An example diagram showing an image of a chip to be inspected in the chip inspection method of the present application is shown;

[0027] Figure 8 An example diagram showing a target detection image in the chip detection method of the present application;

[0028] Fig. 9 An example diagram showing a feature image to be detected in the chip detection method of the present application;

[0029] Fig.10 An example diagram of the first skeleton diagram in the chip detection method of the present application is shown;

[0030] Fig.11 An example diagram showing the appearance of step-like endpoints in the first skeleton diagram in the chip detection method of the present application;

[0031] Fig.12 A schematic diagram showing eight-neighborhood statistics of step-shaped endpoints in the first skeleton diagram of the chip detection method of the present application is shown;

[0032] Fig.13 An example diagram showing a feature image to be inspected after internal hole filling when detecting a linear narrowing defect in the chip inspection method of the present application;

[0033] Fig.14 An example diagram of the second skeleton diagram in the chip detection method of the present application is shown;

[0034] Fig.15 An example diagram showing the edge contour of a feature image to be inspected after internal holes have been filled when detecting a linear narrowing defect in the chip inspection method of the present application;

[0035] Fig.16 A schematic diagram of the structure of an electronic device shown in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. For the simplicity and clarity of the description, the figure marks may be repeated in the drawings to indicate corresponding or similar elements when deemed appropriate. In addition, the present application sets forth many specific details in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein may be practiced without these specific details. In other cases, well-known methods, processes, and components are not described in detail to avoid blurring the embodiments described herein. Moreover, the description should not be regarded as limiting the scope of the embodiments described herein. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0037] It should be understood that the possible terms "first" or "second" etc. in the claims, specifications and drawings disclosed in this application are used to distinguish different objects, rather than to describe a specific order. The terms "include" and "comprise" used in the specification and claims of this application indicate the presence of the described features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their collections.

[0038] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in this application specification and claims, unless the context clearly indicates otherwise, the singular forms of "a", "an" and "the" are intended to include plural forms. It should also be further understood that the term "and / or" used in this application specification and claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0039] As used in this specification and claims, the term "if" can be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0040] The edges of wafer substrates with high hardness, such as SIC chips, are prone to edge and corner collapse defects, i.e., notches and missing corners. In addition, some linear patterns may have fracture defects due to production process limitations. However, traditional detection solutions can generally only perform customized detection on specific patterns or areas, or simply measure the length or area of ​​defects based on grayscale differences. They have poor compatibility and cannot cover all detection types, and cannot meet the production needs of high precision, high efficiency, ease of use, and easy migration.

[0041] In view of this, there is an urgent need to provide an innovative chip detection method to improve the chip detection accuracy and detection compatibility, thereby improving the chip detection efficiency and detection quality.

[0042] The specific implementation of the present application is described in detail below with reference to the accompanying drawings.

[0043] Figure 1 An exemplary flow chart 100 of a chip detection method according to some embodiments of the present application is shown. Figure 6 An example diagram showing a template chip image in the chip detection method of the present application; Figure 7An example diagram showing an image of a chip to be inspected in the chip inspection method of the present application is shown; Figure 8 An example diagram showing a target detection image in the chip detection method of the present application; Fig. 9 An example diagram of a feature image to be detected in the chip detection method of the present application is shown. Figure 1 and Figures 6 to 9 , the chip detection method shown in the embodiment of the present application may include:

[0044] In step S101, a region to be detected is set in a preset template chip to obtain a template chip image. Figure 6 As shown, in the embodiment of the present application, Figure 6 The main part of the template chip is a schematic diagram of the preset template chip, and then the black frame part can be set on the preset template chip, and then Figure 6 The black frame part in is taken as the area to be detected, thereby obtaining the template chip image.

[0045] Understandably, Figure 6 The shape and area of ​​the area to be detected are only exemplary. In actual applications, the shape of the black frame part needs to be set according to the actual application situation to determine the shape and area of ​​the area to be detected. This application does not impose any restrictions in this regard.

[0046] In step S102, the area to be detected is transformed onto the image of the chip to be detected based on the image of the chip to be detected and the template chip image to obtain a target detection image. In an embodiment of the present application, the template chip image can be used to perform template matching on the image of the chip to be detected so as to establish an affine transformation relationship between the template chip image and the image of the chip to be detected. Among them, the template matching is a computer vision technology used to find an area in the image to be processed that matches a given template image. When performing template matching, it is usually necessary to determine the position and possible rotation angle of a given template in the image to be processed. Figure 6 and Figure 7 As shown, Figure 7 Relative to Figure 6 There is a certain angle deviation and position deviation, so it can be determined by template matching Figure 7 and Figure 6 The relative position relationship and relative angle relationship between them.

[0047] Furthermore, an affine transformation relationship between the template chip image and the image of the chip to be tested can be established based on the above-mentioned relative position relationship and relative angle relationship. Affine transformation is a linear transformation from a two-dimensional coordinate to a two-dimensional coordinate. Affine transformation is generally used for image rotation, scaling, translation and tilt. Exemplarily, the affine transformation relationship can be determined by image processing software and libraries such as OpenCV. It is understandable that in actual applications, it is necessary to select a suitable method to determine the affine transformation relationship according to the actual application situation, and the present application does not impose any restrictions in this regard.

[0048] Furthermore, based on the above affine transformation relationship, the area to be detected can be mapped and transformed onto the image of the chip to be detected, and the following is obtained: Figure 8 As shown in the target detection image, the target detection image also has a detection area demarcated by a black frame.

[0049] In step S103, the feature image to be detected is extracted from the target detection image based on the region to be detected. In the embodiment of the present application, the target detection image can be cropped according to the region to be detected to obtain the following: Fig. 9 It is understandable that there are various ways to extract the feature image to be detected from the target detection image. In practical applications, a suitable extraction method should be selected according to the actual application situation. This application does not impose any limitation in this regard.

[0050] In step S104, the type of defect to be detected is determined based on the area to be detected. In the embodiment of the present application, the aforementioned defect types to be detected may include but are not limited to broken line defects, missing corner defects, notch defects and linear narrowing defects. Among them, the broken line defect may be a defect in which both ends of the line are missing or the middle of the line is broken; the missing corner defect may be a defect in which the corner position is broken; the notch defect may be a defect in which the edge of the line is broken; the linear narrowing defect may be a defect in which the line is narrowed as a whole and / or partially narrowed.

[0051] In the embodiment of the present application, the type of defect to be detected can be selected according to the set area to be detected. Figure 6 As shown, assuming that the set area to be inspected is a linear inspection area, the defect type to be inspected can be a broken line defect or a linear narrowing defect. In this case, the final defect type to be inspected can be determined by further combining the instructions corresponding to the required defect inspection input by the user.

[0052] In step S105, the defect position is determined in the feature image to be inspected based on the detection strategy corresponding to the defect type to be inspected. In the embodiment of the present application, each defect type is provided with a corresponding detection strategy to meet the defect detection of the defect type, which is conducive to simplifying the detection and parameter adjustment process of different defects and improving the wide range of applications. The defect position can be detected and output in the feature image to be inspected through the corresponding detection strategy.

[0053] The present application sets the area to be detected in a preset template chip to obtain a template chip image, and then transforms the area to be detected to the image of the chip to be detected based on the image of the chip to be detected and the template chip image to obtain a target detection image, so that the detection area can be demarcated in the target detection image. Furthermore, the embodiment of the present application can extract a feature image to be detected based on the area to be detected in the target detection image, and determine the type of defect to be detected based on the area to be detected, wherein the type of defect to be detected includes a broken line defect, a missing corner defect, a notch defect, and a linear narrowing defect, and then determine the defect position in the feature image to be detected based on the detection strategy corresponding to the defect type to be detected. Thereby, efficient and accurate detection of multiple defects is achieved, the detection parameter adjustment process of different defects is simplified, and the application range is wide, which is conducive to improving the quality and efficiency of chip detection. In general, the embodiment of the present application can improve the detection accuracy and detection compatibility of the chip, thereby improving the chip detection efficiency and detection quality.

[0054] In some embodiments, a detection strategy corresponding to a broken wire defect may be further designed. Figure 2 and Figures 10 to 12 The detection strategy corresponding to the broken wire defect is explained in detail. Figure 2 An exemplary flow chart 200 of a chip detection method according to some other embodiments of the present application is shown. Fig.10 An example diagram of the first skeleton diagram in the chip detection method of the present application is shown, Fig.11 An example diagram showing the appearance of step-like endpoints in the first skeleton diagram in the chip detection method of the present application is shown. Fig.12 A schematic diagram showing eight-neighborhood statistics of step-shaped endpoints in the first skeleton diagram of the chip detection method of the present application is shown. Figure 2 Figures 10 to 12 , the chip detection method shown in the embodiment of the present application may include:

[0055] In step S201, if the defect type to be inspected is a broken wire defect, the internal holes in the feature image to be inspected are filled and the first skeleton image is extracted. In the embodiment of the present application, the internal holes in the feature image to be inspected can be filled by redrawing the outline of the feature image to be inspected and setting the drawing mode to fill, and then the zhang-suen skeleton extraction algorithm is used on the filled area to extract the following: Fig.10 A first skeleton diagram is shown as an example.

[0056] In step S202, each endpoint and each intersection point in the first skeleton graph is determined.

[0057] In the embodiment of the present application, when determining each endpoint in the first skeleton image, specifically, eight-neighborhood statistics can be performed on each white pixel in the first skeleton image. If the number of white pixels in the eight-neighborhood of the current target white pixel is less than 3, the current white pixel is determined to be an endpoint. Fig.11 As shown, if the current target white pixel, that is Fig.11 The number of white pixels in the eight neighborhoods of the step-shaped endpoints 101 and 102 in is equal to 3. Fig.12 As shown, eight neighborhood statistics are performed on the remaining pixels except the current target white pixel in the eight neighborhoods of the current target white pixel. If the number of white pixels in the eight neighborhoods of the current statistical pixel among the remaining pixels is equal to 1, the current statistical pixel among the remaining pixels is counted until the statistics of each pixel among the remaining pixels are completed to obtain the target count number. Furthermore, if the target count number is greater than 1, the current target white pixel is determined as the endpoint. Fig.12 In the example, the target count number corresponding to the step-shaped endpoint 101 is 1, and the target count number corresponding to the step-shaped endpoint 102 is 2. Therefore, it can be determined that the step-shaped endpoint 102 is an endpoint, while the step-shaped endpoint 101 is not an endpoint. The above method can reliably find all real endpoints, avoid missing endpoints, and improve detection accuracy.

[0058] In an embodiment of the present application, when determining each intersection point in the first skeleton image, specifically, eight-neighborhood statistics can be performed on each white pixel point in the first skeleton image in the above-mentioned manner, and then if the number of white pixels within the eight-neighborhood of the current target white pixel point is greater than or equal to 4, the current target white pixel point is determined to be an intersection point.

[0059] In step S203, the burr position is determined based on each endpoint and each intersection and the burr position is smoothed to obtain a target skeleton image. In an embodiment of the present application, first, the intersection can be searched along the skeleton path of the first skeleton image from each endpoint, and then if the intersection is found within the preset search length, the burr position is determined to be between the current endpoint and the current intersection, and the white pixels in the burr position are set to black, so that the burrs can be eliminated to achieve a smoothing effect. Exemplarily, the above-mentioned preset search length can be set to a length of 8 pixels. In actual applications, the preset search length needs to be set according to the actual application situation. The present application does not impose any restrictions in this regard.

[0060] In step S204, the number of endpoints in the target skeleton graph is determined, and whether there is a breakpoint is determined based on the number of endpoints. It can be understood that if the number of endpoints is equal to 2, then there is no breakpoint in the target skeleton graph; if the number of endpoints is greater than 2, then there is a breakpoint in the target skeleton graph.

[0061] In step S205, the defect position corresponding to the line break defect is determined based on the breakpoint existence result.

[0062] On the one hand, if there is a breakpoint, the breakpoint distance between adjacent breakpoints is determined, and whether there is a broken line defect is determined based on the breakpoint distance and the first preset distance threshold. The first preset distance threshold can be set to a length of 5 pixels for example. In actual applications, the first preset distance threshold needs to be set according to the actual application situation. The present application does not impose any restrictions in this regard. Furthermore, if there is a broken line defect, the defect position corresponding to the broken line defect is determined based on the breakpoint position. For example, the area between the adjacent breakpoints can be used as the defect position corresponding to the broken line defect.

[0063] On the other hand, if there is no breakpoint, the endpoint distance between the first and last endpoints is determined, and whether there is a broken line defect is determined based on the endpoint distance and the second preset distance threshold. It can be understood that the second preset distance threshold is the standard linear length in the standard chip size, which needs to be set according to the actual application situation, and the present application does not impose any restrictions in this regard. Furthermore, if there is a broken line defect, the defect position corresponding to the broken line defect can be determined based on the endpoint position, for example, the first endpoint and / or the tail endpoint can be used as the starting point of the linear shortage.

[0064] In some embodiments, the detection strategy corresponding to the chipped corner defect can be further designed. Figure 3 The detection strategy corresponding to the chipping defect is explained in detail. Figure 3 An exemplary flow chart 300 of a chip detection method according to some other embodiments of the present application is shown. Figure 3 , the chip detection method shown in the embodiment of the present application may include:

[0065] In step S301, if the defect type to be detected is a missing corner defect, the area to be detected is subtracted from the characteristic image to be detected to obtain a missing corner defect position image. It can be understood that the area to be detected at this time can be a rectangular frame formed by the four edge positions of the chip, and after the rectangular frame is subtracted from the characteristic image to be detected, the pixel point area where the missing corner defect position is located can be left, so that the missing corner defect position image can be obtained.

[0066] In step S302, a connected domain of the missing corner defect is extracted from the image of the missing corner defect position, and the connected domain length and connected domain area of ​​the connected domain are determined. In the embodiment of the present application, the pixel point area where the missing corner defect position is located can be used as the connected domain of the missing corner defect, and the connected domain length and connected domain area can be calculated after it is segmented. For example, the distance between the two farthest pixels can be used as the connected domain length, and the total number of pixels in the connected domain can be used as the connected domain area.

[0067] In step S303, it is determined whether there is a missing corner defect based on the length of the connected domain, the area of ​​the connected domain, the preset length threshold and the preset area threshold. It can be understood that if the length of the connected domain is greater than the preset length threshold, or the area of ​​the connected domain is greater than the preset area threshold, it is determined that there is a missing corner defect. The preset length threshold can be set to a length of 4 pixels, and the preset area threshold can be set to 8. In actual applications, the preset length threshold and the preset area threshold need to be set according to the actual application situation, and this application does not impose any restrictions in this regard.

[0068] In step S304, if there is a missing corner defect, the defect position is determined based on the position of the connected domain of the missing corner defect. In the embodiment of the present application, the regional position of the connected domain can be used as the defect position corresponding to the missing corner defect.

[0069] In some embodiments, the detection strategy corresponding to the notch defect can be further designed. Figure 4 The detection strategy corresponding to the notch defect is explained in detail. Figure 4 An exemplary flow chart 400 showing a chip detection method according to some other embodiments of the present application is shown. Figure 4 , the chip detection method shown in the embodiment of the present application may include:

[0070] In step S401, if the defect type to be inspected is a notch defect, non-edge holes are filled in the feature image to be inspected by a morphological closing operation to obtain a target filled image. The aforementioned morphological closing operation dilates the foreground object in the image using a template called a structure element, and then subtracts the dilation result of the original image to achieve filling of small holes and breaks in the foreground object while keeping the overall shape of the object unchanged.

[0071] In step S402, the target filling image is subtracted from the feature image to be inspected to obtain a notch position image. It is understandable that after the target filling image is subtracted from the feature image to be inspected, the pixel point area where the notch defect position is located can be left, so that the notch position image can be obtained.

[0072] In step S403, the gap area and gap depth are determined based on the gap position image. In the embodiment of the present application, illustratively, the minimum bounding rectangle of the gap can be obtained first, and the center point coordinates of the minimum bounding rectangle are taken as (x, y). First, y is kept unchanged, and the gap position image is traversed in the x direction to obtain the current gap width; then, x is kept unchanged, and the gap position image is traversed in the y direction to obtain the current gap height. If the gap width is greater than the gap height, it is considered to be a horizontal gap area, and the gap depth is the height of the minimum bounding rectangle; if the gap height is greater than the gap width, it is considered to be a vertical gap area, and the gap depth is the width of the minimum bounding rectangle. In addition, the total number of pixels in the gap position image can be used as the gap area.

[0073] In step S404, it is determined whether there is a notch defect based on the notch area, notch depth, preset notch area and preset notch depth. It is understandable that if the notch area is greater than the preset notch area, or the notch depth is greater than the preset notch depth, it is determined that there is a notch defect. The preset notch depth can be set to a length of 4 pixels, and the preset notch area can be set to 8. In actual applications, the preset notch area and preset notch depth need to be set according to actual application conditions, and this application does not impose any restrictions in this regard.

[0074] In step S405, if there is a notch defect, the defect position is determined based on the notch position image. In the embodiment of the present application, the image coordinate position of the notch position image can be used as the defect position corresponding to the notch defect.

[0075] In some embodiments, the detection strategy corresponding to the linear narrowing defect can be further designed. Figure 5 The detection strategy corresponding to the linear narrowing defect is described in detail. Figure 5 An exemplary flow chart 500 of a chip detection method according to some other embodiments of the present application is shown. Fig.13 An example diagram showing a characteristic image to be inspected after internal hole filling when detecting a linear narrowing defect in the chip inspection method of the present application is shown. Fig.14 An example diagram of the second skeleton diagram in the chip detection method of the present application is shown, Fig.15 The edge contour example of the feature image to be inspected after the internal hole is filled when detecting linear narrowing defects in the chip inspection method of the present application is shown. Figure 5 and Figures 13 to 15 , the chip detection method shown in the embodiment of the present application may include:

[0076] In step S501, if the defect type to be inspected is a linear narrowing defect, the internal holes are filled in the feature image to be inspected and the second skeleton image is extracted to determine the coordinates of each skeleton point in the second skeleton image. Fig.13 As shown in FIG. 1 , the internal holes in the feature image to be inspected can be filled by redrawing the contour of the feature image to be inspected and setting the drawing mode to fill, and then the zhang-suen skeleton extraction algorithm is used on the filled area to extract the following Fig.14 The second skeleton graph is shown as an example. Further, the coordinates of each skeleton point corresponding to each skeleton pixel point are determined in the second skeleton graph.

[0077] In step S502, the coordinates of each pair of edge contour points are determined based on the feature image to be detected. Fig.15 As shown, each pair of edge contour point coordinates are symmetrically distributed on both sides of the corresponding skeleton point coordinates.

[0078] In step S503, each linear width corresponding to each skeleton point coordinate is determined based on each pair of edge contour point coordinates and each skeleton point coordinate. In an embodiment of the present application, the horizontal coordinate of each skeleton point coordinate can be used as a reference to calculate the distance from the edge contour point with the same horizontal coordinate to the corresponding skeleton pixel point in the vertical coordinate direction, and the upper and lower distances calculated for each pair of edge contour points are added to obtain the linear width at the current horizontal coordinate. Exemplarily, assuming that the skeleton pixel point coordinates are A (x1, y1), and the pairs of edge contour points with the same horizontal coordinates are B (x1, y2) and C (x1, y3), then the linear width corresponding to the current skeleton pixel point can be (y2- y1) + (y3- y1).

[0079] In step S504, an average linear width is determined based on each linear width, and whether a linear narrowing defect exists is determined based on the average linear width and the preset average width. It is understood that if the average linear width is less than the preset average width, a linear narrowing defect is determined to exist. The preset average width can be set to a width of 4 pixels. In actual applications, the preset average width needs to be set according to actual application conditions, and the present application does not impose any restrictions in this regard.

[0080] In step S505, if there is a linear narrowing defect, the defect position is determined based on each linear width and the linear width threshold. In the embodiment of the present application, each position where the linear width is less than the linear width threshold can be counted based on each linear width. If the position where the linear width is less than the linear width threshold continues for a length greater than a preset continuous length, the area corresponding to the continuous length of the position is considered to be the defect position corresponding to the linear narrowing defect. Exemplarily, the linear width threshold can be set to a width of 4 pixels, and the preset continuous length can be set to a length of 6 pixels. In actual applications, the linear width threshold and the preset continuous length need to be set according to the actual application situation. The present application does not impose any restrictions in this regard.

[0081] Corresponding to the aforementioned application function implementation method embodiment, the present application also provides an electronic device for executing a chip detection method and corresponding embodiments.

[0082] Fig.16 FIG. 1 is a block diagram showing the hardware configuration of an electronic device 1600 that can implement the chip detection method of an embodiment of the present application. Fig.16 As shown, the electronic device 1600 may include a processor 1610 and a memory 1620. Fig.16 In the electronic device 1600, only the components related to this embodiment are shown. Therefore, it is obvious to those skilled in the art that the electronic device 1600 may also include Fig.16 The components shown in the figure are different from the common components. For example: fixed-point arithmetic units.

[0083] The electronic device 1600 may correspond to a computing device having various processing functions, for example, a function for generating a neural network, training or learning a neural network, quantizing a floating-point neural network to a fixed-point neural network, or retraining a neural network. For example, the electronic device 1600 may be implemented as various types of devices, such as a personal computer (PC), a server device, a mobile device, etc.

[0084] The processor 1610 controls all functions of the electronic device 1600. For example, the processor 1610 controls all functions of the electronic device 1600 by executing a program stored in the memory 1620 on the electronic device 1600. The processor 1610 may be implemented by a central processing unit (CPU), a graphics processing unit (GPU), an application processor (AP), an artificial intelligence processor chip (IPU), etc. provided in the electronic device 1600. However, the present application is not limited thereto.

[0085] In some embodiments, the processor 1610 may include an input / output (I / O) unit 1611 and a computing unit 1612. The I / O unit 1611 may be used to receive various data, such as a preset template chip. Exemplarily, the computing unit 1612 may be used to set a region to be detected in a preset template chip received via the I / O unit 1611 to obtain a template chip image; transform the region to be detected to the image of the chip to be detected based on the image of the chip to be detected and the template chip image to obtain a target detection image; extract a feature image to be detected based on the region to be detected in the target detection image; determine the type of defect to be detected based on the region to be detected; wherein the type of defect to be detected includes a broken line defect, a missing corner defect, a notch defect, and a linear narrowing defect; and determine the defect position in the feature image to be detected based on the detection strategy corresponding to the defect type to be detected. This defect position may be output by the I / O unit 1611, for example. The output data may be provided to the memory 1620 for reading and use by other devices (not shown), or may be directly provided to other devices for use.

[0086] The memory 1620 is hardware for storing various data processed in the electronic device 1600. For example, the memory 1620 can store processed data and data to be processed in the electronic device 1600. The memory 1620 can store data sets involved in the chip detection method process that has been processed or to be processed by the processor 1610, for example, preset template chips, etc. In addition, the memory 1620 can store applications, drivers, etc. to be driven by the electronic device 1600. For example: the memory 1620 can store various programs related to the chip detection method to be executed by the processor 1610. The memory 1620 can be a DRAM, but the present application is not limited thereto. The memory 1620 may include at least one of a volatile memory or a non-volatile memory. The non-volatile memory may include a read-only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a phase change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a ferroelectric RAM (FRAM), and the like. The volatile memory may include dynamic RAM (DRAM), static RAM (SRAM), synchronous DRAM (SDRAM), PRAM, MRAM, RRAM, ferroelectric RAM (FeRAM), etc. In an embodiment, the memory 1620 may include at least one of a hard disk drive (HDD), a solid state drive (SSD), a high-density flash memory (CF), a secure digital (SD) card, a micro secure digital (Micro-SD) card, a mini secure digital (Mini-SD) card, an extreme digital (xD) card, caches, or a memory stick.

[0087] In summary, the specific functions implemented by the memory 1620 and the processor 1610 of the electronic device 1600 provided in the implementation manner of this specification can be explained in comparison with the aforementioned implementation manner in this specification, and can achieve the technical effects of the aforementioned implementation manner, and will not be repeated here.

[0088] In this embodiment, the processor 1610 may be implemented in any suitable manner. For example, the processor 1610 may take the form of a microprocessor or processor and a computer-readable medium storing a computer-readable program code (such as software or firmware) executable by the (micro)processor, a logic gate, a switch, an application specific integrated circuit (ASIC), a programmable logic controller, and an embedded microcontroller, etc.

[0089] It should also be understood that any module, unit, component, server, computer, terminal or device that executes instructions exemplified herein may include or otherwise access computer-readable media, such as storage media, computer storage media or data storage devices (removable and / or non-removable) such as disks, optical disks or tapes. Computer storage media may include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable instructions, data structures, program modules or other data.

[0090] Although multiple embodiments of the present application have been shown and described herein, it is obvious to those skilled in the art that such embodiments are provided only by way of example. Those skilled in the art can think of many changes, modifications and alternatives without departing from the thought and spirit of the present application. It should be understood that in the process of practicing the present application, various alternatives to the embodiments of the present application described herein can be adopted. The attached claims are intended to limit the scope of protection of the present application, and therefore cover equivalents or alternatives within the scope of these claims.

Claims

1. A chip detection method, characterized in that: include: Setting a region to be detected in a preset template chip to obtain a template chip image; Based on the chip image to be inspected and the template chip image, the region to be inspected is transformed onto the chip image to be inspected to obtain a target detection image; Extracting a feature image to be detected from the target detection image based on the area to be detected; Determining the type of defect to be inspected based on the area to be inspected; wherein the type of defect to be inspected includes a broken line defect, a missing corner defect, a notch defect, and a linear narrowing defect; as well as Determine the defect position in the feature image to be inspected based on the inspection strategy corresponding to the defect type to be inspected; The determining of the defect position in the feature image to be inspected based on the inspection strategy corresponding to the defect type to be inspected includes: If the defect type to be inspected is the broken wire defect, filling internal holes in the feature image to be inspected and extracting a first skeleton image; Determine each endpoint and each intersection point in the first skeleton graph; Determine the burr position based on each endpoint and each intersection and perform smoothing on the burr position to obtain a target skeleton image; Determining the number of endpoints in the target skeleton graph; determining whether a breakpoint exists based on the number of endpoints; If there are breakpoints, the breakpoint distances between adjacent breakpoints are determined; Determining whether there is a line break defect based on the breakpoint distance and a first preset distance threshold; If the disconnection defect exists, the defect position corresponding to the disconnection defect is determined based on the breakpoint position.

2. The chip detection method according to claim 1, characterized in that: Determining each endpoint and each intersection point in the first skeleton graph comprises: Perform eight-neighborhood statistics on each white pixel in the first skeleton image; If the number of white pixels in the eight neighborhoods of the current target white pixel is less than 3, the current white pixel is determined as the endpoint; If the number of white pixels in the eight neighborhoods of the current target white pixel is equal to 3, eight neighborhood statistics are performed on the remaining pixels in the eight neighborhoods of the current target white pixel except the current target white pixel; If the number of white pixels in the eight neighborhoods of the current statistical pixel among the remaining pixels is equal to 1, the current statistical pixel among the remaining pixels is counted until the statistics of each pixel among the remaining pixels are completed to obtain the target count number; If the target count is greater than 1, the current target white pixel is determined as the endpoint; Perform the eight-neighborhood statistics on each white pixel in the first skeleton image; If the number of white pixels within the eight neighborhoods of the current target white pixel is greater than or equal to 4, the current target white pixel is determined to be a cross point.

3. The chip detection method according to claim 1, characterized in that: The step of determining the burr position based on each endpoint and each intersection point and performing smoothing on the burr position comprises: Searching for the intersection point along the skeleton path of the first skeleton graph from each endpoint respectively; If the intersection is found within the preset search length, the area between the current endpoint and the current intersection is determined to be the burr position, and white pixels in the burr position are set to black.

4. The chip detection method according to claim 1, characterized in that: After determining whether there is a breakpoint based on the number of endpoints, the method further includes: If there is no breakpoint, determine the endpoint distance between the first and last endpoints; Determining whether there is a disconnection defect based on the endpoint distance and a second preset distance threshold; If the disconnection defect exists, the defect position corresponding to the disconnection defect is determined based on the endpoint position.

5. The chip detection method according to claim 1, characterized in that: The determining of the defect position in the feature image to be inspected based on the inspection strategy corresponding to the defect type to be inspected includes: If the defect type to be inspected is the corner-missing defect, subtract the inspected area from the inspected feature image to obtain a corner-missing defect position image; Extracting a connected domain of the chipped corner defect in the chipped corner defect position image, and determining a connected domain length and a connected domain area of ​​the connected domain; Determine whether there is a missing corner defect based on the length of the connected domain, the area of ​​the connected domain, a preset length threshold and a preset area threshold; If the missing corner defect exists, the defect position is determined based on the position of the connected domain of the missing corner defect.

6. The chip detection method according to claim 1, characterized in that: The determining of the defect position in the feature image to be inspected based on the inspection strategy corresponding to the defect type to be inspected includes: If the defect type to be inspected is the notch defect, then filling non-edge holes in the feature image to be inspected by a morphological closing operation to obtain a target filled image; Subtracting the target filling image from the feature image to be detected to obtain a notch position image; Determine the notch area and notch depth based on the notch position image; Determining whether the notch defect exists based on the notch area, the notch depth, a preset notch area, and a preset notch depth; If the notch defect exists, the defect position is determined based on the notch position image.

7. The chip detection method according to claim 1, characterized in that: The determining of the defect position in the feature image to be inspected based on the inspection strategy corresponding to the defect type to be inspected includes: If the defect type to be inspected is the linear narrowing defect, filling internal holes in the feature image to be inspected and extracting a second skeleton image, and determining the coordinates of each skeleton point in the second skeleton image; Determine each pair of edge contour point coordinates based on the feature image to be detected, wherein each pair of edge contour point coordinates are symmetrically distributed on both sides of the corresponding skeleton point coordinates; Determine each linear width corresponding to each skeleton point coordinate based on each pair of edge contour point coordinates and each skeleton point coordinate; determining an average line width based on each line width; determining whether the linear narrowing defect exists based on the average linear width and a preset average width; If the line narrowing defect exists, the defect position is determined based on each line width and a line width threshold.

8. An electronic device, characterized in that: include: processor; as well as A memory having program codes for chip detection stored therein, wherein when the program codes are executed by the processor, the electronic device implements the method as claimed in any one of claims 1 to 7.

9. A non-transitory machine-readable storage medium having stored thereon a program code for chip detection, wherein when the program code is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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