Chip stack communication system

Abstract

The embodiment of the present invention relates to a chip stacking communication system, the system comprising a first chip, a second chip and a control module; the first chip and the second chip are stacked through an interconnection channel; the control module is used to select a communication mode according to the connection state of the interconnection channel. The technical solution provided by the embodiment of the present invention switches different communication modes or interconnection channels according to the fault situation when a fault occurs in the interconnection channel, thereby avoiding the situation where the interconnection channel is permanently replaced due to misjudgment of failure and inability to work, and continues to use the interconnection channel under certain specific faults by switching the communication mode, thereby improving the utilization rate of the interconnection channel and the reliability of chip communication transmission.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of chip communication technology, and in particular to a chip stacking communication system. Background Art

[0002] With the miniaturization of semiconductor integrated circuits, the integration level continues to increase, and chip stacking integration technology has emerged. Two or more chips can achieve vertical communication between chips or multiple chips through the interconnection structure. Therefore, the interconnection between chips is the key to affecting chip performance, and the reliability of the interconnection structure plays a very important role in improving the density of integrated circuits and the number of chip stacking layers.

[0003] Inter-chip interconnection is generally carried out through direct metal contact, which belongs to wired interconnection. Common wired interconnection technologies include hybrid bonding, micro-bumps, etc. In the process of chip manufacturing and use, wired interconnection may have various fault problems, such as micro-cracks caused by manufacturing, contact failure caused by chip bending, contact failure caused by chip working time, environment, temperature, etc. For wired interconnection with faults, if no measures are taken, the failure of one of the multiple interconnection channels may cause the failure of the entire chip. Therefore, when the working interconnection channel fails due to disconnection or short circuit, redundancy technology is often used. By adding redundant interconnection channels as backup interconnection channels, the faulty interconnection channels are switched to redundant interconnection channels to achieve fault repair. However, after this method detects that the wired interconnection has a fault, it determines that the channel is failed and cannot work and replaces it permanently, which will waste a lot of resources, increase chip costs, and affect the transmission performance of the chip. Summary of the invention

[0004] Based on the above situation of the prior art, the purpose of an embodiment of the present invention is to provide a chip stacking communication system, which improves the utilization rate of the interconnection channel and the reliability of chip communication transmission by switching different communication modes or interconnection channels according to the fault situation when a fault occurs in the interconnection channel.

[0005] To achieve the above object, according to one aspect of the present invention, a chip stacking communication system is provided, the system comprising a first chip, a second chip and a control module;

[0006] The first chip and the second chip are stacked via an interconnection channel;

[0007] The control module is used to select a communication mode according to the connection status of the interconnection channel;

[0008] Among them, the connection status includes normal connection, short circuit fault and open circuit fault; the interconnection channel includes at least one first interconnection channel and at least one second interconnection channel; the communication mode includes wired communication based on the first interconnection channel, wireless communication based on the first interconnection channel, wired communication based on the second interconnection channel and wireless communication based on the second interconnection channel.

[0009] Further, the selecting of the communication mode according to the connection status of the interconnection channel includes:

[0010] The first interconnection channel is normally connected, and the first chip and the second chip are controlled to perform wired communication based on the first interconnection channel;

[0011] If the first interconnection channel fails, the first chip and the second chip are controlled to perform wireless communication based on the first interconnection channel;

[0012] If the first interconnection channel fails in a short circuit, controlling the first chip and the second chip to perform wired or wireless communication based on a second interconnection channel;

[0013] Wherein, the second interconnection channel is a redundant interconnection channel.

[0014] Furthermore, when the first interconnection channel fails in a short circuit, controlling the first chip and the second chip to perform wired communication or wireless communication based on the second interconnection channel includes:

[0015] If the first interconnection channel fails in a short circuit, a communication mode is selected according to a connection state of a second interconnection channel;

[0016] The second interconnection channel is normally connected, and the first chip and the second chip are controlled to perform wired communication based on the second interconnection channel;

[0017] If the second interconnection channel fails, the first chip and the second chip are controlled to perform wireless communication based on the second interconnection channel.

[0018] Furthermore, the system also includes a detection module; the detection module is used to detect the connection status of the interconnection channel.

[0019] Furthermore, the detection module detects the connection status of the interconnection channel by detecting the resistance value of the interconnection channel or detecting the transmission function of the interconnection channel.

[0020] Further, the detection module includes a first resistance unit and a second resistance unit;

[0021] The first resistance unit is connected to the first end of the interconnection channel, and the second resistance unit is connected to the second end of the interconnection channel;

[0022] The detection module detects the resistance value of the interconnection channel according to the resistance value of the first end or the second end of the interconnection channel.

[0023] Furthermore, the detection module also includes a detection switch module;

[0024] The detection switch module is used to control the detection module to enter or exit the detection mode.

[0025] Furthermore, the control module is also used to determine the connection state of the interconnection channel according to the resistance value of the interconnection channel, and switch the interconnection channel used for communication according to the connection state of the interconnection channel.

[0026] Further, the system is a one-way communication system;

[0027] The one-way communication system further includes a sending module and a receiving module, wherein the sending module includes several groups of sending channels, and the receiving module includes several groups of receiving channels;

[0028] The sending module is arranged on the first chip, and the receiving module is arranged on the second chip;

[0029] Each group of the sending channel, the receiving channel and the interconnection channel is connected in a one-to-one correspondence, and the sending channel and the receiving channel communicate with each other through the interconnection channel.

[0030] Further, each group of the transmission channels includes a wired transmission circuit and a wireless transmission circuit, and each group of the receiving channels includes a wired receiving circuit and a wireless receiving circuit;

[0031] The wired transmitting circuit and the wireless transmitting circuit are controllably connected to the interconnection channel through a first switch unit, respectively, and the wired receiving circuit and the wireless receiving circuit are controllably connected to the interconnection channel through a second switch unit, respectively, so that the wired transmitting circuit and the wired receiving circuit are controlled to perform wired communication through the interconnection channel or the wireless transmitting circuit and the wireless receiving circuit are controlled to perform wireless communication through the interconnection channel through the first switch unit and the second switch unit.

[0032] Further, the system is a duplex communication system;

[0033] The duplex system further includes a first transceiver module and a second transceiver module, the first transceiver module includes a plurality of groups of first transmission channels and first reception channels, and the second transceiver module includes a plurality of groups of second transmission channels and second reception channels;

[0034] The first transceiver module is disposed on a first chip, and the second transceiver module is disposed on a second chip.

[0035] Furthermore, each group of the first transmitting channels includes a first wired transmitting circuit and a first wireless transmitting circuit, and each group of the first receiving channels includes a first wired receiving circuit and a first wireless receiving circuit; each group of the second transmitting channels includes a second wired transmitting circuit and a second wireless transmitting circuit, and each group of the second receiving channels includes a second wired receiving circuit and a second wireless receiving circuit.

[0036] Further, the system is a half-duplex communication system;

[0037] Each group of the first sending channel and the first receiving channel constitutes a first sending and receiving channel, each group of the second sending channel and the second receiving channel constitutes a second sending and receiving channel, each group of the first sending and receiving channel and the second sending and receiving channel are respectively connected to the interconnection channel in a one-to-one correspondence, and the first sending and receiving channel and the second sending and receiving channel communicate with each other through the interconnection channel;

[0038] The first wired transmitting circuit, the first wireless transmitting circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the third switch unit, respectively; the second wired transmitting circuit, the second wireless transmitting circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the fourth switch unit, respectively, so as to control the first wired transmitting circuit and the second wired receiving circuit, or the second wired transmitting circuit and the first wired receiving circuit to perform wired communication through the interconnection channel, and the first wireless transmitting circuit and the second wireless receiving circuit, or the second wireless transmitting circuit and the first wireless receiving circuit to perform wireless communication through the interconnection channel through the third switch unit and the fourth switch unit.

[0039] Further, the system is a full-duplex communication system;

[0040] Each group of the first sending channel, the first receiving channel, the second sending channel and the second receiving channel is respectively connected to the interconnection channel in a one-to-one correspondence, the first sending channel communicates with the second receiving channel through the interconnection channel therebetween, and the second sending channel communicates with the first receiving channel through the interconnection channel therebetween;

[0041] The first wired transmitting circuit, the first wireless transmitting circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the fifth switch unit, respectively; the second wired transmitting circuit, the second wireless transmitting circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the sixth switch unit, respectively, so that the first wired transmitting circuit and the second wired receiving circuit are controlled by the fifth switch unit and the sixth switch unit, and the second wired transmitting circuit and the first wired receiving circuit respectively perform wired communication through their respective interconnection channels; or the first wireless transmitting circuit and the second wireless receiving circuit, and the second wireless transmitting circuit and the first wireless receiving circuit respectively perform wireless communication through their respective interconnection channels.

[0042] In summary, an embodiment of the present invention provides a chip stacking communication system, the system comprising a first chip, a second chip and a control module; the first chip and the second chip are stacked through an interconnection channel; the control module is used to select a communication mode according to the connection status of the interconnection channel. The technical solution provided by the embodiment of the present invention switches different communication modes or interconnection channels according to the fault situation when a fault occurs in the interconnection channel, thereby avoiding the situation where the interconnection channel is permanently replaced due to misjudgment of failure and inability to work, and continues to use the interconnection channel under certain specific faults by switching the communication mode, thereby improving the utilization rate of the interconnection channel and the reliability of chip communication transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 is a schematic diagram of the overall structure of a chip stacking communication system provided by an embodiment of the present invention;

[0044] Figure 2 is a schematic diagram of the circuit structure of a detection module according to an embodiment of the present invention;

[0045] Figure 3 is a schematic diagram of the circuit structure of a detection module according to another embodiment of the present invention;

[0046] Figure 4 is a schematic diagram of the circuit structure of a detection module according to another embodiment of the present invention;

[0047] Figure 5 is a schematic diagram of the overall structure of a one-way communication system according to an embodiment of the present invention;

[0048] Figure 6 is a schematic diagram of the overall structure of a half-duplex communication system according to an embodiment of the present invention;

[0049] Figure 7 is a schematic diagram of the overall structure of a full-duplex communication system according to an embodiment of the present invention;

[0050] Figure 8is a flow chart of a communication method of a chip stacking communication system provided by an embodiment of the present invention;

[0051] Fig. 9 It is a specific implementation flow chart of the communication method of the chip stacking communication system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. It should be understood that these descriptions are only exemplary and are not intended to limit the scope of the present invention. In addition, in the following description, the description of well-known structures and technologies is omitted to avoid unnecessary confusion of the concept of the present invention.

[0053] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in one or more embodiments of the present invention should be understood by people with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in one or more embodiments of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0054] The technical solution of the present invention is described in detail below with reference to the accompanying drawings. An embodiment of the present invention provides a chip stacking communication system, Figure 1 FIG. 4 shows a schematic diagram of the overall structure of a chip stacking communication system provided by an embodiment of the present invention. Figure 1 As shown, the chip stacking communication system includes a first chip 11, a second chip 12 and a control module. The first chip 11 and the second chip 12 are stacked through interconnection channels. In this embodiment of the present invention, the interconnection channels include at least one first interconnection channel and at least one second interconnection channel. The first interconnection channel is an interconnection channel used when the first chip 11 and the second chip 12 communicate normally, and the second interconnection channel is a redundant interconnection channel set to deal with possible failures of the first interconnection channel. Figure 1As shown, the first interconnection channel is, for example, the interconnection channel AB, the second interconnection channel is, for example, the redundant interconnection channel A5B5, and the interconnection channels A1B1, A2B2, A3B3, and A4B4 respectively represent situations in which the interconnection channel AB may fail during chip manufacturing and use, such as the interconnection channel being completely disconnected due to an open circuit failure (as shown in the interconnection channel A1B1), the interconnection channel being warped due to a short circuit failure (as shown in the interconnection channel A2B2), being poorly soldered (as shown in the interconnection channel A3B3), or being poorly connected (as shown in the interconnection channel A4B4), etc. The control modules can be respectively arranged on the first chip 11 and the second chip 12, for example, Figure 1The control module shown may include a first control circuit 103 disposed on the first chip 11 and a second control circuit 203 disposed on the second chip 12. The control module is used to select a communication mode or switch an interconnection channel for communication according to the connection state of the interconnection channel. In this embodiment of the present invention, the connection state includes normal connection, short circuit fault and open circuit fault of the interconnection channel, and the communication mode includes wired communication based on the first interconnection channel, wireless communication based on the first interconnection channel, wired communication based on the second interconnection channel and wireless communication based on the second interconnection channel. The first interconnection channel is normally connected, and the first chip and the second chip are controlled to perform wired communication based on the first interconnection channel; the first interconnection channel has an open circuit fault, and the first chip and the second chip are controlled to perform wireless communication based on the first interconnection channel; the first interconnection channel has a short circuit fault, and the communication mode is selected according to the connection state of the second interconnection channel: the second interconnection channel is normally connected, and the first chip 11 and the second chip 12 are controlled to perform wired communication based on the second interconnection channel; the second interconnection channel has an open circuit fault, and the first chip and the second chip are controlled to perform wireless communication based on the second interconnection channel. For example, if the first interconnection channel is normally connected, and the interconnection channel AB has good contact and reliable connection, then the interconnection can be considered as ohmic direct contact, which belongs to wired interconnection, and the first chip 11 and the second chip 12 can use the interconnection channel AB for wired communication; if a short circuit fault is detected in the interconnection channel AB, then the two disconnected interconnections can be considered as two plates of a capacitor, and signal transmission is achieved by using the electric field coupling between the capacitors, which belongs to wireless interconnection. At this time, the interconnection channel AB can be controlled to still be used. Different from the above mode, the communication mode at this time is wireless communication based on the first interconnection channel; if a short circuit fault is detected in the interconnection channel AB, then the communication of the interconnection channel is unreliable, and a situation may occur where communication succeeds once and fails the next time, and the interconnection channel is considered to be unavailable. At this time, the redundant interconnection channel A5B5 is used for communication between the first chip 11 and the second chip 12. Further, based on the detected connection state of the redundant interconnection channel A5B5, the first chip 11 and the second chip 12 can choose wired communication based on the redundant interconnection channel A5B5 or wireless communication based on the redundant interconnection channel A5B5, and the specific selection logic is the same as the selection logic based on the connection state of the interconnection channel AB in the above text. According to some optional embodiments, the wired communication and wireless communication mentioned above can be implemented by a communication module, such as Figure 1As shown, the communication module may include a first wired circuit 101, a first wireless circuit 102, a second wired circuit 201 and a second wireless circuit 202 according to the communication mode, wherein the first wired circuit 101 and the first wireless circuit 102 are arranged in the first chip 11, and the second wired circuit 201 and the second wireless circuit 202 are arranged in the first chip 12. In the wired communication mode based on the first interconnection channel, the first chip 11 and the second chip 12 can perform wired communication through the first wired circuit 101, the first interconnection channel (for example, AB) and the second wired circuit 201; in the wireless communication mode based on the first interconnection channel, the first chip 11 and the second chip 12 can perform wireless communication through the first wireless circuit 102, the first interconnection channel (for example, A1B1) and the second wireless circuit 202; in the wired communication mode based on the second interconnection channel, the first chip 11 and the second chip 12 can perform wired communication through the first wired circuit 101, the second interconnection channel (for example, A5B5) and the second wired circuit 201; in the wireless communication mode based on the second interconnection channel, the first chip 11 and the second chip 12 can perform wireless communication through the first wireless circuit 102, the second interconnection channel (for example, A5B5 in an open circuit state) and the second wireless circuit 202.

[0055] This embodiment of the present invention detects the connection status of the interconnection channel and switches different communication modes (including interconnection channels and communication methods) according to the connection status. Specifically, if the interconnection channel is in good contact, the interconnection channel + wired communication is selected; if the interconnection channel has a circuit break fault, the interconnection channel + wireless communication is selected; if the interconnection channel has a short circuit fault, the redundant interconnection channel is selected. Based on the detected redundant interconnection channel status, the corresponding wired communication or wireless communication is selected, which can avoid the situation where the interconnection channel is permanently replaced due to misjudgment of failure and inability to work. By switching the communication mode, the interconnection channel under certain specific faults can continue to be used, thereby improving the utilization rate of the interconnection channel and the reliability of chip transmission.

[0056] According to some optional embodiments, the chip stack communication system further includes a detection module, which is used to detect the connection status of the interconnection channel, so that the control module can select a communication mode or switch the interconnection channel used for communication according to the connection status of the interconnection channel detected by the detection module. Figure 1 As shown, the detection module includes, for example, a first detection circuit 104 and a second detection circuit 204 . The first detection circuit 104 is disposed on the first chip 11 , and the second detection circuit 204 is disposed on the second chip 12 .

[0057] The detection module can obtain the connection status of the interconnection channel through functional detection, and the functional detection can obtain the connection status of the interconnection channel by detecting whether the communication of the interconnection channel is normal. For example, a fixed digital sequence can be transmitted between the first chip 11 and the second chip 12 through the interconnection channel, the first chip 11 sends the fixed digital sequence, the second chip 12 receives the fixed digital sequence and compares and analyzes the received fixed digital sequence, if the fixed digital sequence is received and corresponds to the fixed digital sequence sent, it means that the connection status of the interconnection channel is a normal connection; if the fixed digital sequence is not received within a predetermined time, it means that the connection status of the interconnection channel is an open circuit fault; if the fixed digital sequence is received but distorted compared with the fixed digital sequence sent, it means that the connection status of the interconnection channel is a short circuit fault. According to some optional embodiments, the detection module can also perform functional detection by transmitting a clock signal or a coded signal agreed by both parties. Among them, the fixed digital sequence can be generated by a pulse generator, the clock signal can be generated by a clock generator, and the coded signal can be generated by a transmitting circuit, etc.

[0058] The detection module can also obtain the connection state of the interconnection channel through resistance detection, and can obtain the resistance value of the interconnection channel by detecting the resistance value of the first end or the second end of the interconnection channel, and then determine the connection state of the interconnection channel. Figure 2 FIG. 4 shows a schematic diagram of a circuit structure of a detection module according to an embodiment of the present invention. Figure 2 As shown, the detection module includes a first resistance unit and a second resistance unit. The first resistance unit includes, for example, a first resistor R A The second resistor unit, for example, includes a second resistor R B , the first resistor R A The first chip 11 is provided with one end connected to the first end of the interconnection channel, the connection point is the first connection point A, and the other end is grounded. B It is arranged on the second chip 12, one end of which is connected to the second end of the interconnection channel, the connection point is the second connection point B, and the other end is grounded. The detection module can obtain the resistance value of the interconnection channel by detecting the resistance value of the first connection point A or the resistance value of the second connection point B. Taking the detection of the resistance value of the first connection point A as an example, if the interconnection channel is in good contact during the detection, such as Figure 1 As shown in AB, the resistance value of point A is R A and R B The resistance of the parallel connection, R A ‖R B ; If the interconnection channel is completely disconnected, such as Figure 1 As shown in A1B1, the resistance value of point A is R A ; If the interconnection channel is short-circuited (including warping, cold soldering, cold connection, etc.), such as Figure 1As shown in A2B2, A3B3, A4B4, the resistance value at point A is R A and (R T +R B ) in parallel, i.e. R A ‖(R T +R B ). When the interconnection channel is in good contact, the resistance is small and can be ignored for calculation convenience; when the interconnection channel is short-circuited, the resistance becomes larger, and the resistance of the interconnection channel is recorded as R T In this embodiment, a detection switch module may also be provided, and the detection switch module is used to control the detection module to enter or exit the detection mode. Figure 2 As shown, the switch module may include a first switch S A and the second switch S B , the first switch S A Set at the first resistor R A Between the first connection point A, the second switch S B Set the second resistor R B Between the first connection point and the second connection point B, the switch module is used to control whether the detection module works. A and the second switch S B The detection module is in detection mode; the first switch S A and the second switch S B The detection module is disconnected and the detection mode is turned off. The resistance value detection method of the second connection point B is the same as the resistance value detection method of the first connection point A.

[0059] According to some optional embodiments, the resistance value of the interconnection channel may be obtained by detecting the voltage value of the first end or the second end of the interconnection channel, thereby determining the connection state of the interconnection channel. Figure 3 FIG. 4 shows a schematic diagram of a circuit structure of a detection module according to another embodiment of the present invention. Figure 3 As shown, the detection module includes a first resistance unit and a second resistance unit, and the first resistance unit includes, for example, a third resistor R A1 and the fourth resistor R A2 The second resistor unit includes, for example, a fifth resistor R B1 and the sixth resistor R B2 The detection module also includes a first reference voltage source and a second reference voltage source. In this embodiment, the first reference voltage source is a first bandgap reference BandgapA, the second reference voltage source is a second bandgap reference BandgapB, the first bandgap reference BandgapA, the third resistor R A1 and the fourth resistor R A2 Set on the first chip 11, the first bandgap reference BandgapA, the third resistor R A1 and the fourth resistor RA2 Connect in series and then ground, the third resistor R A1 and the fourth resistor R A2 The connection point is connected to the first end of the interconnection channel, the connection point is the first connection point A, the second bandgap reference BandgapB, the fifth resistor R B1 and the sixth resistor R B2 The second bandgap reference BandgapB and the fifth resistor R B1 and the sixth resistor R B2 Connect in series and then ground, the fifth resistor R B1 and the sixth resistor R B2 The connection point of is connected to the second end of the interconnection channel, and the connection point is the second connection point B. The detection module can obtain the resistance value of the interconnection channel by detecting the voltage value of the first connection point A or the voltage value of the second connection point B. Taking the detection of the resistance value of the first connection point A as an example, according to the circuit structure, the voltage at point A can be expressed as:

[0060]

[0061] To simplify the calculation, assume that R A1 , R A2 , R B1 , R B2 The resistance is equal to R. If the interconnection channel has good contact, R T is equal to zero, and the voltage at point A is:

[0062] V A =1 / 3×V BGA

[0063] If the interconnection channel is completely disconnected, R T Infinity, the voltage at point A is:

[0064] V A =1 / 2×V BGA

[0065] If the interconnection channel is short-circuited, R T With a certain resistance, the voltage at point A is:

[0066] 1 / 3×V BGA <V A <1 / 2×V BGA

[0067] Among them, V BGA represents the first bandgap reference voltage.

[0068] like Figure 3 As shown, the voltage V at point A obtained by detection can be AThe input is sent to the comparison unit composed of two comparators for comparison. The positive input terminal and negative input terminal of the first comparator comp1 are connected to V ref1 and V A , the output is V1, the positive input and negative input of the second comparator comp2 are connected to V A and V ref2 , the output is V2, where the reference voltage of the first comparator is:

[0069] V ref1 =1 / 3×V BGA +V T

[0070] The reference voltage of the second comparator is:

[0071] V ref2 =1 / 2×V BGA -V T

[0072] V T is a preset threshold voltage. According to the output result of the comparison unit, the connection state of the interconnection channel can be obtained, as shown in Table 1.

[0073] Table 1

[0074] <![CDATA[V A ]]> <![CDATA[V1]]> <![CDATA[V2]]> Connection Status <![CDATA[1 / 3*V BGA ]]> 1 0 Normal connection <![CDATA[1 / 2*V BGA ]]> 0 1 Circuit Breaker <![CDATA[1 / 3*V BGA <V A <1 / 2*V BGA ]]> 0 0 Short Circuit

[0075] In this embodiment, a detection switch module may also be provided, and the detection switch module is used to control the detection module to enter or exit the detection mode. Figure 3 As shown, the switch module may include a third switch S A1 , the fourth switch S A2 , the fifth switch S B1 and the sixth switch S B2 , the third switch S A1 Set the third resistor R A1 Between the first connection point A, the fourth switch S A2 Set at the fourth resistor R A2 Between the first connection point A, the fifth switch S B1 Set the fifth resistor R B1 Between the second connection point B, the sixth switch S B2 Set the sixth resistor R B2 and the second connection point B. The switch module is used to control the detection module to select different detection paths. The third switch S A1 , the fourth switch S A2 and the fifth switch S B1 The detection module is in the detection mode for the first connection point A. The resistance value detection method of the second connection point B is the same as the resistance value detection method of the first connection point A.

[0076] According to some optional embodiments, the resistance value of the interconnection channel may be obtained by detecting the voltage value of the first end or the second end of the interconnection channel, thereby determining the connection state of the interconnection channel. Figure 4 FIG. 4 shows a schematic diagram of a circuit structure of a detection module according to another embodiment of the present invention. Figure 4 As shown, the detection module includes a first resistance unit and a second resistance unit. The first resistance unit includes, for example, a first resistor R A The second resistor unit, for example, includes a second resistor R B The detection module also includes a first current source I A and the second current source I B , the first current source I A and the first resistor R A The first chip 11 is provided, connected in series and then grounded, the series connection point is connected to the first end of the interconnection channel, the connection point is the first connection point A, and the second current source I B and the second resistor R B The first connection point is connected to the second end of the interconnection channel, and the connection point is the second connection point B. The detection module can obtain the resistance value of the interconnection channel by detecting the voltage value of the first connection point A or the voltage value of the second connection point B. Taking the detection of the resistance value of the first connection point A as an example, according to the circuit structure, the voltage at point A can be expressed as:

[0077] V A =I A ×(R A ||(R T +R B ))

[0078] To simplify the calculation, assume that R A , R B The resistance is equal to R. If the interconnection channel has good contact, R T is equal to zero, and the voltage at point A is:

[0079] V A =1 / 2×R×I A

[0080] If the interconnection channel is completely disconnected, R T Infinity, the voltage at point A is:

[0081] V A =R×I A

[0082] If the interconnection channel is short-circuited, R T With a certain resistance, the voltage at point A is:

[0083] 1 / 2×R×IA <V A <R×I A

[0084] Among them, I A Indicates the current value of the first current source.

[0085] Detect the voltage V at point A A You can Figure 3 As shown, the input is compared to a comparison unit composed of two comparators, and the connection state of the interconnection channel can be obtained according to the output result of the comparison unit, as shown in Table 1. The resistance value detection method of the second connection point B is the same as the resistance value detection method of the first connection point A.

[0086] According to some optional embodiments, the system is a one-way communication system, Figure 5 The overall structure diagram of the one-way communication system is shown in FIG. Figure 5 As shown, the one-way communication system further includes a sending module 105 and a receiving module 205, the sending module 105 includes a plurality of sending channels (for example, a first sending channel 101 ... an Nth sending channel 10N, and a redundant sending channel 10R), the receiving module 205 includes a plurality of receiving channels (for example, a first receiving channel 201 ... an Nth receiving channel 20N, and a redundant receiving channel 20R), the sending module 105 is arranged on the first chip 11, and the receiving module 205 is arranged on the second chip 12; each group of sending channels and receiving channels is connected to the interconnection channels in a one-to-one correspondence (for example, the first sending channel 101 ... the Nth sending channel 10N respectively corresponds to the first interconnection channel 1 ... the first interconnection channel N, the first receiving channel 201 ... the Nth receiving channel 20N respectively corresponds to the first interconnection channel 1 ... the first interconnection channel N, the redundant sending channel 10R and the redundant receiving channel 20R correspond to the second interconnection channel, Figure 5 A second interconnection channel (i.e., a redundant interconnection channel) is shown as an example. When applied, the number of redundant interconnection channels can be selected according to actual needs. The sending channel and the receiving channel can communicate through the interconnection channel (including the first interconnection channel and the second interconnection channel).

[0087] In this embodiment, each group of transmission channels includes a wired transmission circuit and a wireless transmission circuit, and each group of receiving channels includes a wired receiving circuit and a wireless receiving circuit. The wired transmission circuit and the wireless transmission circuit are controllably connected to the interconnection channel through a first switch unit, and the wired receiving circuit and the wireless receiving circuit are controllably connected to the interconnection channel through a second switch unit, so that the first switch unit and the second switch unit control the wired transmission circuit and the wired receiving circuit to perform wired communication through the interconnection channel or the wireless transmission circuit and the wireless receiving circuit to perform wireless communication through the interconnection channel. Figure 5As shown, the first switch unit includes a plurality of analog switches, one analog switch is connected between each wired transmission circuit and the interconnection channel, and one analog switch is connected between each wireless transmission circuit and the interconnection channel. The second switch unit includes a plurality of analog switches, one analog switch is connected between each wired receiving circuit and the interconnection channel, and one analog switch is connected between each wireless receiving circuit and the interconnection channel, so that the corresponding wired transmission circuit and wired receiving circuit, or the corresponding wireless transmission circuit and wireless receiving circuit can be selected by controlling the connection and disconnection of the analog switches to connect to the corresponding interconnection channel for wired communication or wireless communication. The analog switch of the first switch unit is set in each transmission channel, and the analog switch of the second switch unit is set in each receiving channel. For example, the first transmission channel 101 is provided with a first wired transmission switch S1011 and a first wireless transmission switch S1012, and the wired transmission circuit and the wireless transmission circuit in the first transmission channel 101 are connected to the first interconnection channel 1 through the first wired transmission switch S1011 and the first wireless transmission switch S1012 respectively; the first receiving channel 201 is provided with a first wired reception switch S2011 and a first wireless reception switch S2012, and the wired reception circuit and the wireless reception circuit in the first receiving channel 201 are connected to the first interconnection channel 1 through the first wired reception switch S2011 and the first wireless reception switch S2012 respectively. The connection conditions of the analog switches in other transmission channels and receiving channels are similar to those of the first transmission channel 101 and the first receiving channel 201.

[0088] In addition to the analog switch, other devices or circuit structures with selection functions may also be used to implement the functions of the first switch unit and the second switch unit.

[0089] In various embodiments of the present invention, each group of transmission channels may share a detection circuit, or each transmission channel may be provided with a detection circuit, and the same applies to the receiving channel.

[0090] According to some optional embodiments, the system is a half-duplex communication system. Half-duplex communication means that data can be transmitted in both directions of the interconnection channel, from chip 11 to chip 12 or from chip 12 to chip 11, but not simultaneously. Figure 6 The overall structure diagram of the half-duplex communication system is shown in FIG. Figure 6As shown, the half-duplex communication system further includes a first transceiver module 106 and a second transceiver module 206. The first transceiver module 106 includes a plurality of groups of first transmission channels and first receiving channels, and the second transceiver module 206 includes a plurality of groups of second transmission channels and second receiving channels. The first transceiver module 106 is disposed on the first chip 11, and the second transceiver module 206 is disposed on the second chip 12. Each group of first transmission channels and first receiving channels constitutes a first transceiver channel (first transceiver channels 1101 ... 110N, and 110R), and each group of second transmission channels and second receiving channels constitutes a second transceiver channel (second transceiver channels 1201 ... 120N, and 120R). Each group of first transceiver channels and second transceiver channels are respectively connected to the interconnection channel in a one-to-one correspondence, and the first transceiver channel and the second transceiver channel communicate with each other through the interconnection channel. Each group of first transmitting channels includes a first wired transmitting circuit and a first wireless transmitting circuit, and each group of first receiving channels includes a first wired receiving circuit and a first wireless receiving circuit; each group of second transmitting channels includes a second wired transmitting circuit and a second wireless transmitting circuit, and each group of second receiving channels includes a second wired receiving circuit and a second wireless receiving circuit.

[0091] In this embodiment, the first wired transmission circuit, the first wireless transmission circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the third switch unit, respectively, and the second wired transmission circuit, the second wireless transmission circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the fourth switch unit, respectively, so as to control the first wired transmission circuit and the second wired receiving circuit, the second wired transmission circuit and the first wired receiving circuit to perform wired communication through the interconnection channel, and the first wireless transmission circuit and the second wireless receiving circuit, or the second wireless transmission circuit and the first wireless receiving circuit to perform wireless communication through the interconnection channel through the third switch unit and the fourth switch unit. For example, for communication of any interconnection channel, any one of the four modes of the first wired transmission circuit-interconnection channel-second wired receiving circuit, the second wired transmission circuit-interconnection channel-first wired receiving circuit, the first wireless transmission circuit-interconnection channel-second wireless receiving circuit, and the second wireless transmission circuit-interconnection channel-first wireless receiving circuit can be selected through the third switch unit and the fourth switch unit for communication. Figure 6 FIG. 4 shows a circuit structure according to the embodiment that uses analog switches to implement the functions of the third switch unit and the fourth switch unit, including an analog switch for selecting a transmission direction (eg Figure 6The analog switches SD3011, SD3012, SD30N1, SD30N2, SD30R1 and SD30R2, and SD4011, SD4012, SD40N1, SD40N2, SD40R1 and SD40R2) directly connected to the interconnection channel and the analog switches for selecting wired communication or wireless communication (for example Figure 6Analog switches S3011-S3014, S30N1-S30N4, S30R1-S30R4, and S4011-S4014, S40N1-S40N4, S40R1-S40R4) directly connected to the transmitting circuit and the receiving circuit. The analog switch of the third switch unit is arranged in each first transceiver channel of the first transceiver module 106, and the analog switch of the fourth switch unit is arranged in each second transceiver channel of the second transceiver module 206. For example, the first transceiver channel 1101 is provided with a first transmission direction selection switch SD3011 and a first reception direction selection switch SD3012, as well as a third wired transmission switch S3011, a third wireless transmission switch S3012, a third wired reception switch S3013 and a third wireless reception switch S3014. The first wired transmission circuit and the first wireless transmission circuit in the first transceiver channel 1101 are respectively connected to the first transmission direction selection switch SD3011 through the third wired transmission switch S3011 and the third wireless transmission switch S3012, and are connected to the first interconnection channel 1 through the first transmission direction selection switch SD3011. The first wired reception circuit and the first wireless reception circuit in the first transceiver channel 1101 are respectively connected to the first reception direction selection switch SD3011 through the third wired reception switch S3013 and the third wireless reception switch S3014. 3012, connected to the first interconnection channel 1 through the first receiving direction selection switch SD3012; the second transceiver channel 1201 is provided with a second receiving direction selection switch SD4011 and a second sending direction selection switch SD4012, as well as a fourth wired receiving switch S4011, a fourth wireless receiving switch S4012, a fourth wired transmitting switch S4013 and a fourth wireless transmitting switch S4014, the second wired transmitting circuit and the second wireless transmitting circuit in the second transceiver channel 1201 are respectively connected to the second transmitting direction selection switch SD4012 through the fourth wired transmitting switch S4013 and the fourth wireless transmitting switch S4014, and are connected to the first interconnection channel 1 through the second transmitting direction selection switch SD4012, the second wired receiving circuit and the second wireless receiving circuit in the second transceiver channel 1201 are respectively connected to the second receiving direction selection switch SD4011 through the fourth wired receiving switch S4011 and the fourth wireless receiving switch S4012, and are connected to the first interconnection channel 1 through the second receiving direction selection switch SD4011.When in use, the transmission direction of the first chip 11 is selected through the first transmission direction selection switch SD3011 and the first receiving direction selection switch SD3012, and the transmission direction of the second chip 12 is selected through the second receiving direction selection switch SD4011 and the second transmission direction selection switch SD4012; the first chip 11 is selected as wired communication or wireless communication through the third wired transmission switch S3011, the third wireless transmission switch S3012, the third wired reception switch S3013 and the third wireless reception switch S3014, and the second chip 12 is selected as wired communication or wireless communication through the fourth wired reception switch S4011, the fourth wireless reception switch S4012, the fourth wired transmission switch S4013 and the fourth wireless transmission switch S4014. The connection of the analog switches in other transceiver channels is similar to that of the first transceiver channel 1101 and the second transceiver channel 1201.

[0092] In addition to analog switches and Figure 6 The analog switch arrangement in the embodiment may also use other devices or circuit structures with selection functions to implement the functions of the third switch unit and the fourth switch unit.

[0093] According to some optional embodiments, the system is a full-duplex communication system. Full-duplex communication means allowing data to be transmitted simultaneously in both directions of the interconnection channel, that is, signals are transmitted in both directions at the same time. Compared with the above-mentioned half-duplex communication system embodiment, there is no need to select the transmission direction, only wired communication or wireless communication needs to be selected. Due to the bidirectional transmission, one channel is added to each interconnection channel. Figure 7 The overall structure diagram of the full-duplex communication system is shown in FIG. Figure 7As shown, the full-duplex communication system further includes a first transceiver module 106 and a second transceiver module 206, the first transceiver module 106 includes a plurality of groups of first transmission channels (first transmission channels 2011 ... 20N1, and 20R1) and first receiving channels (first receiving channels 2012 ... 20N2, and 20R2), and the second transceiver module 206 includes a plurality of groups of second transmission channels (second transmission channels 2111 ... 21N1, and 21R1) and second receiving channels (second receiving channels 2112 ... 21N2, and 21R2). The first transceiver module 106 is disposed on the first chip 11, and the second transceiver module 206 is disposed on the second chip 12, and each group of the first transmission channel, the first receiving channel, the second transmission channel, and the second receiving channel are respectively connected to the interconnection channel in a one-to-one correspondence, and the first transmission channel communicates with the second receiving channel through the interconnection channel therebetween, and the second transmission channel communicates with the first receiving channel through the interconnection channel therebetween. The first wired transmitting circuit, the first wireless transmitting circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the fifth switch unit, respectively; the second wired transmitting circuit, the second wireless transmitting circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the sixth switch unit, respectively, so that the first wired transmitting circuit and the second wired receiving circuit are controlled by the fifth switch unit and the sixth switch unit, and the second wired transmitting circuit and the first wired receiving circuit respectively perform wired communication through their respective interconnection channels; or the first wireless transmitting circuit and the second wireless receiving circuit, and the second wireless transmitting circuit and the first wireless receiving circuit respectively perform wireless communication through their respective interconnection channels. Figure 7, a circuit structure using analog switches to implement the functions of the fifth switch unit and the sixth switch unit according to the embodiment is shown. The analog switches of the fifth switch unit are arranged in each first sending channel and the first receiving channel of the first transceiver module 106, and the analog switches of the sixth switch unit are arranged in each second sending channel and the second receiving channel of the second transceiver module 206. Different from the above-mentioned single-duplex and duplex communication system embodiments, in the full-duplex communication system embodiment, since bidirectional communication can be carried out simultaneously, there is no need to set a switch for selecting the communication transmission direction. However, in order to realize bidirectional communication simultaneously, a sending interconnection channel (sending interconnection channel 11...N1, and R1) and a receiving interconnection channel (receiving interconnection channel 12...N12, and R2) are respectively provided for each group of sending channels and receiving channels. For example, the first transmission channel 2011 is provided with a fifth wired transmission switch S5011 and a fifth wireless transmission switch S5012, and the first receiving channel 2012 is provided with a fifth wired reception switch S5013 and a fifth wireless reception switch S5014; the second transmission channel 2112 is provided with a sixth wired transmission switch S6013 and a sixth wireless transmission switch S6014, and the second receiving channel 2111 is provided with a sixth wired reception switch S6011 and a sixth wireless reception switch S6012. The first wired transmission circuit and the first wireless transmission circuit in the first transmission channel 2011 are connected to the first transmission interconnection channel 11 through the fifth wired transmission switch S5011 and the fifth wireless transmission switch S5012, respectively, and the first wired reception circuit and the first wireless reception circuit in the first reception channel 2012 are connected to the first reception interconnection channel 12 through the fifth wired reception switch S5013 and the fifth wireless reception switch S5014, respectively. The second wired transmission circuit and the second wireless transmission circuit in the second transmission channel 2112 are connected to the first receiving interconnection channel 12 through the sixth wired transmission switch S6013 and the sixth wireless transmission switch S6014, respectively. The second wired receiving circuit and the second wireless receiving circuit in the second receiving channel 2111 are connected to the first transmission interconnection channel 11 through the sixth wired receiving switch S6011 and the sixth wireless receiving switch S6012, respectively. The connection conditions of the analog switches in other transmission channels and receiving channels are similar to those of the first transmission channel 2011, the first receiving channel 2012, the second transmission channel 2112, and the second receiving channel 2111.

[0094] In addition to analog switches and Figure 7 The analog switch arrangement in the embodiment may also use other devices or circuit structures with selection functions to implement the functions of the fifth switch unit and the sixth switch unit.

[0095] An embodiment of the present invention further provides a communication method of a chip stacking communication system. The chip stacking communication system is the system as described in the above embodiment of the present invention. Figure 8The flowchart of the method is shown in FIG. 1 , and the method comprises the following steps:

[0096] S801, detecting a connection state of a first interconnection channel, wherein the connection state includes a normal connection, a short circuit fault, and an open circuit fault. The method for detecting the connection state of the first interconnection channel can be implemented by using the detection module involved in the above embodiments of the present invention.

[0097] S802: Selecting a communication mode of the system according to the connection state, wherein the communication mode includes wired communication based on the first interconnection channel, wireless communication based on the first interconnection channel, wired communication based on the second interconnection channel, and wireless communication based on the second interconnection channel. Selecting a communication mode of the system according to the connection state may include the following steps:

[0098] S8021. If the first interconnection channel is normally connected, control the first chip and the second chip to perform wired communication based on the first interconnection channel;

[0099] S8022: If the first interconnection channel fails to be disconnected, control the first chip and the second chip to perform wireless communication based on the first interconnection channel;

[0100] S8023: If the first interconnection channel is short-circuited, select a communication mode according to the connection state of the second interconnection channel, including: if the second interconnection channel is normally connected, control the first chip and the second chip to perform wired communication based on the second interconnection channel; if the second interconnection channel is open-circuited, control the first chip and the second chip to perform wireless communication based on the second interconnection channel.

[0101] Wherein, the second interconnection channel is a redundant interconnection channel.

[0102] According to some optional embodiments, the method further comprises the steps of:

[0103] It is determined whether all first interconnection channels have been detected; if not, the next first interconnection channel to be detected is detected.

[0104] Fig. 9 The specific implementation flow chart of the communication method provided by the embodiment of the present invention is shown in FIG. Figure 8 As shown, the specific implementation includes the following steps:

[0105] Step 101, the circuit starts to power on;

[0106] Step 102, check whether all channels to be tested have been tested. If they have been completed, proceed to step 103; if not, proceed to step 107;

[0107] Step 103, after all interconnection channels are detected, obtain an interconnection channel status information table;

[0108] Step 104, performing channel mode configuration, including configuration of each channel working mode and working switch state, configuration of control circuit working mode, etc.;

[0109] Step 105, the system enters working mode;

[0110] Step 106, check whether the system is reset? If the system is reset, go to step 101, if the system is not reset, go to step 105;

[0111] Step 107, selecting the channel number of the next interconnection channel to be tested, wherein the channel numbering starts from the first channel;

[0112] Step 108, detecting the interconnection channel status;

[0113] Step 109, detect whether the interconnection channel belongs to wired interconnection? If yes, proceed to step 110; if not, proceed to step 111;

[0114] Step 110, the interconnection channel state is recorded as OK1, and the process goes to step 102, wherein OK1 indicates that the interconnection channel has good contact and reliable connection, and belongs to wired interconnection;

[0115] Step 111, detect whether the interconnection channel is wireless interconnection? If yes, proceed to step 112; if no, proceed to step 113, wherein the order of steps 109 and 111 can be interchanged;

[0116] Step 112, the interconnection channel state is recorded as OK2, and the process goes to step 102, wherein OK2 indicates that the interconnection channel is completely disconnected, which is wireless interconnection;

[0117] Step 113, the interconnection channel state is recorded as fail;

[0118] Step 114, check whether the redundant channel is available. If it is available, proceed to step 108; if it is not available, proceed to step 115;

[0119] Step 115 , the interconnection channel state is recorded as fail, and the process goes to step 102 .

[0120] The following description applies this specific implementation process to Figure 5 The process of the example shown in:

[0121] The circuit starts to power on (step 101);

[0122] Check whether all channels to be tested have been tested (step 102).

[0123] If not completed, select the channel number of the next interconnection channel to be tested (step 107), starting from the first interconnection channel 1; detect the state of the first interconnection channel 1 (step 108); detect whether the first interconnection channel 1 belongs to a wired interconnection (step 109).

[0124] If the first interconnection channel 1 is a wired interconnection, the state of the first interconnection channel 1 is recorded as OK1 (step 110), where OK1 indicates that the first interconnection channel 1 has good contact and reliable connection, and is a wired interconnection. Then, the next interconnection channel, i.e., the first interconnection channel 2, is detected. If the first interconnection channel 2 is not a wired interconnection, it is detected whether the first interconnection channel 2 is a wireless interconnection (step 111).

[0125] If the first interconnection channel 2 is a wireless interconnection, the state of the first interconnection channel 2 is recorded as OK2 (step 112), where OK2 indicates that the interconnection channel is completely disconnected and belongs to a wireless interconnection, and then the next interconnection channel, i.e., the first interconnection channel 3, is detected; if the first interconnection channel 3 is neither a wired interconnection nor a wireless interconnection, the state of the first interconnection channel 3 is recorded as fail (step 113); and it is detected whether the second interconnection channel (redundant interconnection channel) is available (step 114).

[0126] If the second interconnection channel (redundant interconnection channel) is available, then the state of the second interconnection channel (redundant interconnection channel) is detected, whether it is wired interconnection or wireless interconnection, and the interconnection state of the second interconnection channel (redundant interconnection channel) is marked; if the second interconnection channel (redundant interconnection channel) is unavailable, the interconnection channel state is recorded as fail (step 115), and then the next interconnection channel, i.e., the first interconnection channel 4, is detected; after all interconnection channels 1-N are detected, an interconnection channel state information table is obtained (step 103); then the channel mode configuration is performed (step 104), and the configuration includes the configuration of each channel working mode and working switch state, Configuration of the working mode of the control circuit, etc. Specifically, according to the interconnection channel status information table, if the interconnection channel status is OK1, the wired transmission circuit and the wired reception circuit are selected by the switch of the transmission channel 1 and the switch of the reception channel 1 respectively; if the interconnection channel status is OK2, the wireless transmission circuit and the wireless reception circuit are selected respectively; if the interconnection channel status is fail, a redundant interconnection channel is selected and tested, and then the corresponding circuit is selected for communication according to the channel status; after waiting for all channel mode configurations to be completed, the system enters the working mode (step 105); if it is detected that the system is reset (step 106), the system restarts to power on, otherwise the system works.

[0127] In summary, the embodiments of the present invention relate to a chip stacking communication system and a communication method, wherein the system comprises a first chip, a second chip and a control module; the first chip and the second chip are stacked via an interconnection channel; and the control module is used to select a communication mode according to the connection status of the interconnection channel. The technical solution provided by the embodiments of the present invention switches different communication modes or interconnection channels according to the fault situation when a fault occurs in the interconnection channel, thereby avoiding the situation where the interconnection channel is permanently replaced due to misjudgment that the interconnection channel fails and cannot work, and continues to use the interconnection channel under certain specific faults by switching the communication mode, thereby improving the utilization rate of the interconnection channel and the reliability of chip communication transmission.

[0128] It should be understood that the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the present invention (including claims) is limited to these examples; under the idea of ​​the present invention, the technical features in the above embodiments or different embodiments may also be combined, the steps may be implemented in any order, and there are many other changes in different aspects of one or more embodiments of the present invention as described above, which are not provided in detail for the sake of simplicity. The above specific embodiments of the present invention are only used to illustrate or explain the principles of the present invention, and do not constitute a limitation of the present invention. Therefore, any modifications, equivalent substitutions, improvements, etc. made without departing from the spirit and scope of the present invention should be included in the scope of protection of the present invention. In addition, the claims attached to the present invention are intended to cover all changes and modifications that fall within the scope and boundaries of the attached claims, or the equivalent forms of such scope and boundaries.

Claims

1. A chip stacking communication system, characterized in that: The system includes a first chip, a second chip and a control module; The first chip and the second chip are stacked via an interconnection channel; The control module is used to select a communication mode according to the connection state of the interconnection channel, including: The first interconnection channel is normally connected, and the first chip and the second chip are controlled to perform wired communication based on the first interconnection channel; If the first interconnection channel fails, the first chip and the second chip are controlled to perform wireless communication based on the first interconnection channel; If the first interconnection channel fails in a short circuit, controlling the first chip and the second chip to perform wired or wireless communication based on a second interconnection channel; Wherein, the connection status includes normal connection, short circuit fault and open circuit fault; the interconnection channel includes at least one first interconnection channel and at least one second interconnection channel; the communication mode includes wired communication based on the first interconnection channel, wireless communication based on the first interconnection channel, wired communication based on the second interconnection channel and wireless communication based on the second interconnection channel; the second interconnection channel is a redundant interconnection channel.

2. The system according to claim 1, characterized in that When the first interconnection channel fails in a short circuit, controlling the first chip and the second chip to perform wired communication or wireless communication based on the second interconnection channel includes: If the first interconnection channel fails in a short circuit, a communication mode is selected according to a connection state of a second interconnection channel; The second interconnection channel is normally connected, and the first chip and the second chip are controlled to perform wired communication based on the second interconnection channel; If the second interconnection channel fails, the first chip and the second chip are controlled to perform wireless communication based on the second interconnection channel.

3. The system according to claim 2, characterized in that The system further comprises a detection module; the detection module is used to detect the connection status of the interconnection channel.

4. The system according to claim 3, characterized in that The detection module detects the connection state of the interconnection channel by detecting the resistance value of the interconnection channel or detecting the transmission function of the interconnection channel.

5. The system according to claim 4, characterized in that The detection module includes a first resistance unit and a second resistance unit; The first resistance unit is connected to the first end of the interconnection channel, and the second resistance unit is connected to the second end of the interconnection channel; The detection module detects the resistance value of the interconnection channel according to the resistance value of the first end or the second end of the interconnection channel.

6. The system according to claim 4, characterized in that The detection module also includes a detection switch module; The detection switch module is used to control the detection module to enter or exit the detection mode.

7. The system according to claim 4, characterized in that The control module is further used to determine a connection state of the interconnection channel according to the resistance value of the interconnection channel, and to switch the interconnection channel used for communication according to the connection state of the interconnection channel.

8. The system according to any one of claims 2 to 7, characterized in that: The system is a one-way communication system; The one-way communication system further includes a sending module and a receiving module, wherein the sending module includes several groups of sending channels, and the receiving module includes several groups of receiving channels; The sending module is arranged on the first chip, and the receiving module is arranged on the second chip; Each group of the sending channel, the receiving channel and the interconnection channel is connected in a one-to-one correspondence, and the sending channel and the receiving channel communicate with each other through the interconnection channel.

9. The system according to claim 8, characterized in that Each group of the transmission channels includes a wired transmission circuit and a wireless transmission circuit, and each group of the receiving channels includes a wired receiving circuit and a wireless receiving circuit; The wired transmitting circuit and the wireless transmitting circuit are controllably connected to the interconnection channel through a first switch unit, respectively, and the wired receiving circuit and the wireless receiving circuit are controllably connected to the interconnection channel through a second switch unit, respectively, so that the wired transmitting circuit and the wired receiving circuit are controlled to perform wired communication through the interconnection channel or the wireless transmitting circuit and the wireless receiving circuit are controlled to perform wireless communication through the interconnection channel through the first switch unit and the second switch unit.

10. The system according to any one of claims 2 to 7, characterized in that: The system is a duplex communication system; The duplex communication system further includes a first transceiver module and a second transceiver module, the first transceiver module includes a plurality of groups of first transmission channels and first reception channels, and the second transceiver module includes a plurality of groups of second transmission channels and second reception channels; The first transceiver module is disposed on a first chip, and the second transceiver module is disposed on a second chip.

11. The system according to claim 10, characterized in that Each group of the first transmitting channels includes a first wired transmitting circuit and a first wireless transmitting circuit, and each group of the first receiving channels includes a first wired receiving circuit and a first wireless receiving circuit; each group of the second transmitting channels includes a second wired transmitting circuit and a second wireless transmitting circuit, and each group of the second receiving channels includes a second wired receiving circuit and a second wireless receiving circuit.

12. The system according to claim 11, characterized in that The system is a half-duplex communication system; Each group of the first sending channel and the first receiving channel constitutes a first sending and receiving channel, each group of the second sending channel and the second receiving channel constitutes a second sending and receiving channel, each group of the first sending and receiving channel and the second sending and receiving channel are respectively connected to the interconnection channel in a one-to-one correspondence, and the first sending and receiving channel and the second sending and receiving channel communicate with each other through the interconnection channel; The first wired transmitting circuit, the first wireless transmitting circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the third switch unit, respectively; the second wired transmitting circuit, the second wireless transmitting circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the fourth switch unit, respectively, so as to control the first wired transmitting circuit and the second wired receiving circuit, or the second wired transmitting circuit and the first wired receiving circuit to perform wired communication through the interconnection channel, and the first wireless transmitting circuit and the second wireless receiving circuit, or the second wireless transmitting circuit and the first wireless receiving circuit to perform wireless communication through the interconnection channel through the third switch unit and the fourth switch unit.

13. The system according to claim 11, characterized in that The system is a full-duplex communication system; Each group of the first sending channel, the first receiving channel, the second sending channel and the second receiving channel is respectively connected to the interconnection channel in a one-to-one correspondence, the first sending channel communicates with the second receiving channel through the interconnection channel therebetween, and the second sending channel communicates with the first receiving channel through the interconnection channel therebetween; The first wired transmitting circuit, the first wireless transmitting circuit, the first wired receiving circuit and the first wireless receiving circuit are controllably connected to the interconnection channel through the fifth switch unit, respectively; the second wired transmitting circuit, the second wireless transmitting circuit, the second wired receiving circuit and the second wireless receiving circuit are controllably connected to the interconnection channel through the sixth switch unit, respectively, so that the first wired transmitting circuit and the second wired receiving circuit are controlled by the fifth switch unit and the sixth switch unit, and the second wired transmitting circuit and the first wired receiving circuit respectively perform wired communication through their respective interconnection channels; or the first wireless transmitting circuit and the second wireless receiving circuit, and the second wireless transmitting circuit and the first wireless receiving circuit respectively perform wireless communication through their respective interconnection channels.

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