Epitaxial structure for Micro-LED and preparation method thereof, Micro-LED

Abstract

The present invention discloses an epitaxial structure for Micro-LED and a preparation method thereof, and Micro-LED, which relates to the field of semiconductor optoelectronic devices. The epitaxial structure includes a substrate, a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer, and a P-type GaN layer in sequence; the multi-quantum well layer includes an alternately stacked quantum well layer and a quantum barrier layer; the quantum well layer is In x Ga 1‑x N layer, the quantum barrier layer includes In y Ga 1‑y N layer, Al z Ga 1‑z N layer and B w Ga 1‑w N layer; x>y; the thickness of the quantum barrier layer is less than 10nm; the hole transport layer comprises Al α Ga 1‑α N layer, B β Ga 1‑β N layer and AlN layer; w>α>β. The implementation of the present invention can improve the light efficiency of Micro-LED at low current density and improve its display effect.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optoelectronic devices, and in particular to an epitaxial structure for Micro-LED and a preparation method thereof, and Micro-LED. Background Art

[0002] Micro-LED generally refers to chips with a size of less than 100μm. It has excellent performance and low power consumption. It is the latest and best application technology in the foreseeable multi-display scenarios at the current stage. However, due to its small size, Micro-LED has higher requirements than ordinary LED chips in terms of stress, defect control, wavelength control, etc. On the other hand, the operating current density of Micro-LED used for display is generally 0.1~2A / cm 2 At this low current density, the compressive stress field in the multi-quantum well will greatly reduce the recombination probability of electron and hole wave functions and reduce the luminous efficiency. Therefore, improving the luminous efficiency at low current density is one of the core issues to be solved. In addition, as the size decreases, the impact of sidewall defects on luminous efficiency increases significantly. Specifically, in the chip manufacturing process, due to the need to perform sidewall etching and expose the sidewalls of the multi-quantum well layer, more defects are often generated. These defects are prone to cause non-radiative recombination, which greatly reduces the luminous efficiency of Micro-LED. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide an epitaxial structure for Micro-LED and a preparation method thereof, which can improve the light efficiency under low current density.

[0004] Another technical problem to be solved by the present invention is to provide a Micro-LED.

[0005] In order to solve the above problems, the present invention discloses an epitaxial structure for Micro-LED, which includes a substrate, a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer stacked on the substrate in sequence;

[0006] The multi-quantum well layer includes quantum well layers and quantum barrier layers stacked alternately; the quantum well layer is In x Ga 1- x N layers, the quantum barrier layer includes In y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers; x>y; the thickness of the quantum barrier layer is less than 10 nm;

[0007] The hole transport layer includes Al α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer; w>α>β.

[0008] As an improvement of the above technical solution, the In x Ga 1-x The thickness of the N layer is 2nm~3.5nm, and the value of x ranges from 0.18~0.3; and / or

[0009] In y Ga 1-y The thickness of the N layer is 2nm~4nm, and the value of y ranges from 0.05~0.13; and / or

[0010] The Al z Ga 1-z The thickness of the N layer is 2nm~5nm, and the value of z ranges from 0.1 to 0.3; and / or

[0011] The B w Ga 1-w The thickness of the N layer is 1 nm to 4 nm, and the value of w is in the range of 0.1 to 0.3; and / or

[0012] The period number of the multi-quantum well layer is 3-10.

[0013] As an improvement of the above technical solution, the Al α Ga 1-α The thickness of the N layer is 5 nm to 10 nm, and the value of α is in the range of 0.08 to 0.2; and / or

[0014] The B β Ga 1-β The thickness of the N layer is 5nm~15nm, and the value range of β is 0.02~0.1; and / or

[0015] The thickness of the AlN layer is 2nm-5nm.

[0016] As an improvement of the above technical solution, x>2y, z>0.2, w>0.15, and the thickness of the quantum barrier layer is 7nm~9nm.

[0017] As an improvement of the above technical solution, the thickness of the AlN layer is less than 8 nm.

[0018] As an improvement of the above technical solution, the B β Ga 1-β The N layer is doped with Mg, and its doping concentration is 1×10 18 cm -3 ~1×1019 cm -3 .

[0019] Correspondingly, the present invention also discloses a method for preparing an epitaxial structure of a Micro-LED, which is used to prepare the above-mentioned epitaxial structure of a Micro-LED, and comprises:

[0020] Providing a substrate, and sequentially growing a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer on the substrate;

[0021] The multi-quantum well layer includes quantum well layers and quantum barrier layers stacked alternately; the quantum well layer is In x Ga 1- x N layers, the quantum barrier layer includes In y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers; x>y; the thickness of the quantum barrier layer is less than 10 nm;

[0022] The hole transport layer includes Al α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer; w>α>β.

[0023] As an improvement of the above technical solution, the In x Ga 1-x The growth temperature of the N layer is 730°C to 800°C, and the growth pressure is 100 torr to 300 torr; and / or

[0024] In y Ga 1-y The growth temperature of the N layer is 820°C to 950°C and the growth pressure is 100 torr to 300 torr; and / or

[0025] The Al z Ga 1-z The growth temperature of the N layer is 920°C to 1000°C, and the growth pressure is 100 torr to 300 torr; and / or

[0026] B w Ga 1-w The growth temperature of the N layer is 950℃~1100℃, and the growth pressure is 100torr~300torr.

[0027] As an improvement of the above technical solution, the Alα Ga 1-α The growth temperature of the N layer is 900°C to 1000°C, and the growth pressure is 100 torr to 500 torr; and / or

[0028] The B β Ga 1-β The growth temperature of the N layer is 900°C to 1000°C, and the growth pressure is 100 torr to 500 torr; and / or

[0029] The growth temperature of the AlN layer is 1000° C. to 1200° C., and the growth pressure is 100 torr to 500 torr.

[0030] Correspondingly, the present invention also discloses a Micro-LED, which includes the above-mentioned epitaxial structure for Micro-LED.

[0031] The implementation of the present invention has the following beneficial effects:

[0032] In an epitaxial structure for Micro-LED in one embodiment of the present invention, In y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers are used as quantum barriers. On the one hand, In y Ga 1-y N layer and quantum well layer (In x Ga 1-x N layer), which effectively weakens the polarization electric field caused by the compressive stress caused by the lattice mismatch, greatly improves the efficiency of electron and hole radiation recombination, and improves the light efficiency. z Ga 1-z The N layer can further relax stress, weaken the polarization electric field, and limit the movement of holes and electrons in the quantum well layer, thereby increasing the probability of their recombination and improving the light efficiency. w Ga 1-w The introduction of the N layer can not only further increase the recombination probability of holes and electrons in the quantum well layer, but also increase the growth temperature of the overall barrier layer, improve the overall quality of the quantum barrier layer, and reduce the damage to the sidewalls of the multi-quantum well layer caused by sidewall etching in the later chip manufacturing process, so that the current diffuses less laterally to the sidewall defects, reduces non-radiative recombination, and improves light efficiency. Fourthly, based on the quantum barrier layer of the above embodiment, the overall thickness of the quantum barrier layer can be reduced to less than 10nm, which reduces the vertical resistivity of the quantum barrier layer, further reduces the lateral diffusion of current to the sidewall defects, and improves light efficiency. In addition, in one embodiment of the present invention, the hole transport layer includes Al α Ga1-α N layer, B β Ga 1-β N layer and AlN layer; by controlling w>α>β, the quantum barrier layer, Al α Ga 1-α N layer, B β Ga 1-β The N layer forms a structure that gathers negative polarization charges, which effectively promotes the transport of holes in the hole transport layer and improves the efficiency of hole injection into the multi-quantum well layer. Furthermore, by introducing the AlN layer, it can also promote the hole injection into the B β Ga 1-β Aggregation occurs at the interface of the N layer and the AlN layer, which accelerates the holes to a certain extent, making it easier for them to tunnel through the hole input layer, thereby effectively improving the matching degree of electrons and holes in the multi-quantum well layer, and greatly improving the luminous efficiency of Micro-LED at low current density. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a schematic structural diagram of an epitaxial structure for Micro-LED in one embodiment of the present invention;

[0034] Figure 2 is a flow chart of a method for preparing an epitaxial structure for Micro-LED in one embodiment of the present invention;

[0035] In the figure, 100 is a substrate, 200 is a buffer layer, 300 is an undoped GaN layer, 400 is an N-type GaN layer, 500 is a multi-quantum well layer, 510 is a quantum well layer, 520 is a quantum barrier layer, and 521 is an In y Ga 1-y N layer, 522 is Al z Ga 1-z N layer, 523 is B w Ga 1-w N layer, 600 is the hole transport layer, 610 is Al α Ga 1-α N layer, 620 for B β Ga 1-β N layer, 630 is an AlN layer, and 700 is a P-type GaN layer. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0037] See also Figure 1The present invention discloses an epitaxial structure for Micro-LED, which includes a substrate 100, a buffer layer 200, a non-doped GaN layer 300, an N-type GaN layer 400, a multi-quantum well layer 500, a hole transport layer 600 and a P-type GaN layer 700 stacked on the substrate 100 in sequence.

[0038] The multi-quantum well layer 500 includes quantum well layers 510 and quantum barrier layers 520 that are alternately stacked. The quantum well layer 510 is In x Ga 1-x N layers, the quantum barrier layer 520 includes In y Ga 1-y N layer 521, Al z Ga 1-z N layer 522 and B w Ga 1-w N layer 523; and x>y, based on the above-mentioned quantum barrier layer 520, not only the polarization electric field caused by the compressive stress in the traditional multi-quantum well layer 500 is weakened, but also the quantum barrier layer 520 is ensured to be able to well confine electrons and holes in the quantum well layer 510, thereby increasing the recombination probability of the two and improving the luminous efficiency. In addition, the crystal quality of the quantum barrier layer 520 can also be improved, the number of recombination centers generated in the later etching process can be reduced, non-radiative recombination can be reduced, and the luminous efficiency can be improved. Specifically, based on the above-mentioned quantum barrier layer 520 structure, its thickness can be reduced to less than 10nm, effectively reducing Schottky-Reed-Hall (SRH) recombination and Auger recombination, increasing the probability of radiative recombination, and improving the luminous efficiency.

[0039] Among them, the number of periods of the multi-quantum well layer 500 is 1 to 12. Based on the quantum barrier structure of the above embodiment, the number of periods of the multi-quantum well layer 500 can be reduced. Generally speaking, when the number of periods of the multi-quantum well layer 500 increases, the average electron concentration decreases, the Auger recombination decreases significantly, and the luminous efficiency increases. However, for Micro-LED, its current density is very low, SRH recombination plays a completely dominant role, and it is insensitive to Auger recombination. Moreover, when a multi-quantum well structure with fewer periods is adopted, the compressive stress accumulates less, which is more conducive to improving the luminous efficiency. Exemplarily, the number of periods of the multi-quantum well layer 500 is 2, 3, 5, 8, 10 or 11, but is not limited thereto. Preferably it is 3 to 10.

[0040] Among them, x Ga 1-x The thickness of the N layer is 2nm~5nm. When its thickness is less than 2nm, the dispersion uniformity of the In component is very poor, which easily causes carrier localization and reduces the luminous efficiency. When its thickness is greater than 5nm, the spatial distance between the electron and hole wave functions increases, the overlap degree decreases, and the luminous efficiency decreases. For example, In x Ga 1-xThe thickness of the N layer is 2.5 nm, 3 nm, 3.5 nm, 4 nm or 4.5 nm, but is not limited thereto, preferably 2 nm to 3.5 nm.

[0041] Among them, x Ga 1-x The proportion of In component in the N layer (i.e., x) is 0.18-0.35, and is 0.2, 0.22, 0.24, 0.26, 0.28, 0.32 or 0.34, but is not limited thereto. Preferably, it is 0.18-0.3. The epitaxial structure in this embodiment is more suitable for blue light Micro-LED.

[0042] Among them, y Ga 1-y The thickness of the N layer 521 is 2nm to 5nm. If the thickness is too large, it is difficult to effectively confine electrons and holes in the quantum well layer 510. If the thickness is too small, it will introduce a large compressive stress and it is difficult to effectively improve the luminous efficiency. y Ga 1-y The thickness of the N layer 521 is 2.5 nm, 3 nm, 3.5 nm, 4 nm or 4.5 nm, but is not limited thereto, preferably 2 nm to 3.5 nm.

[0043] Among them, y Ga 1-y The proportion of In component in N layer 521 (i.e., y) is 0.05-0.15. If y is too large, it is difficult to effectively confine electrons and holes in quantum well layer 510; if y is too small, a large compressive stress will be introduced, and it is difficult to effectively improve the luminous efficiency. Exemplarily, y is 0.08, 0.1, 0.12 or 0.14, but not limited thereto. Preferably, it is 0.05-0.13.

[0044] Among them, Al z Ga 1-z The thickness of the N layer 522 is 2 nm to 6 nm, and is exemplarily 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, 5 nm or 5.5 nm, but is not limited thereto. Preferably, it is 2 nm to 5 nm.

[0045] Among them, Al z Ga 1-z The ratio of Al component in the N layer 522 (ie, z) is 0.1-0.4, exemplarily 0.12, 0.18, 0.24, 0.3 or 0.35, but not limited thereto, and preferably 0.1-0.3.

[0046] Among them, B w Ga 1-wThe thickness of the N layer 523 is 1 nm to 5 nm, and is exemplarily 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm or 4 nm, but is not limited thereto. Preferably, it is 1 nm to 4 nm.

[0047] Among them, B w Ga 1-w The proportion of B component in N layer 523 (i.e., w) is 0.05-0.3. If w>0.3, the lattice constant of the layer is too small, which will introduce a new polarization electric field and is not conducive to improving the luminous efficiency. If w<0.05, the B content is too low, the lattice quality is poor, and it is difficult to effectively weaken the adverse effects of etching. For example, B w Ga 1-w The proportion of the B component in the N layer 523 is 0.08, 0.12, 0.16, 0.2 or 0.24, but not limited thereto, and preferably 0.1-0.3.

[0048] The hole transport layer 600 includes Al2O3 sequentially stacked on the multi-quantum well layer 500. α Ga 1-α N layer 610, B β Ga 1-β N layer 620 and AlN layer 630; and w>α>β. Based on the above hole transport layer 600, the last quantum barrier layer 520, Al α Ga 1-α N layer 610, B β Ga 1-β The N layer 620 forms a structure that gathers negative polarization charges, which effectively promotes the transport of holes in the hole transport layer 600 and improves the efficiency of hole injection into the multi-quantum well layer 500. Furthermore, by introducing the AlN layer 630, the hole injection into the B β Ga 1-β Aggregation occurs at the interface of the N layer 620 and the AlN layer 630, which accelerates the holes to a certain extent, making it easier for them to tunnel through the hole input layer, thereby effectively improving the matching degree of electrons and holes in the multi-quantum well layer 500, and greatly improving the luminous efficiency of Micro-LED at low current density.

[0049] Among them, Al α Ga 1-α The thickness of the N layer 610 is 5 nm to 15 nm, and is exemplarily 6 nm, 8 nm, 10 nm, 12 nm or 14 nm, but is not limited thereto. Preferably, it is 5 nm to 10 nm.

[0050] Among them, Al α Ga 1-αThe proportion of Al component in N layer 610 (i.e., α) is 0.05-0.2. If α>0.2, holes will be blocked, reducing the probability of holes entering multi-quantum well layer 500. If α<0.05, the interface polarization positive charge is small, and it is difficult to effectively accelerate holes. Exemplarily, α is 0.08, 0.11, 0.14, 0.16 or 0.18, but not limited thereto. Preferably, it is 0.08-0.2.

[0051] Among them, B β Ga 1-β The thickness of the N layer 620 is 5 nm to 20 nm, exemplarily 8 nm, 10 nm, 12 nm, 14 nm, 16 nm or 18 nm, but not limited thereto, preferably 5 nm to 15 nm.

[0052] Among them, B β Ga 1-β The proportion of the B component in the N layer 620 (ie, β) is 0.02-0.12, exemplarily 0.04, 0.06, 0.1 or 0.11, but not limited thereto, preferably 0.02-0.1.

[0053] The thickness of the AlN layer 630 is less than 8 nm to prevent it from causing hole blocking. Preferably, in one embodiment, the thickness of the AlN layer 630 is 2 nm to 6 nm, and is exemplarily 3 nm, 4 nm, 5 nm or 5.5 nm, but is not limited thereto. Preferably, it is 2 nm to 5 nm.

[0054] The substrate 100 is a sapphire substrate or a silicon substrate, but is not limited thereto.

[0055] The buffer layer 200 is an AlN layer or an AlGaN layer, but is not limited thereto. The buffer layer 200 has a thickness of 30 nm to 80 nm.

[0056] The thickness of the non-doped GaN layer 300 is 1 μm-3 μm.

[0057] The doping element of the N-type GaN layer 400 is Si, but not limited thereto. The doping concentration of Si in the N-type GaN layer 400 is 1×10 18 cm -3 ~5×10 19 cm -3 , and its thickness is 1μm~5μm.

[0058] The doping element of the P-type GaN layer 700 is Mg, but not limited thereto. The doping concentration of Mg in the P-type GaN layer 700 is 1×10 19 cm -3 ~5×10 20 cm -3 , and its thickness is 80nm~200nm.

[0059] Preferably, in an embodiment of the present invention, x>2y, z>0.2, w>0.15. Based on this embodiment, the overall thickness of the quantum barrier layer 520 can be further reduced, its vertical resistance can be reduced, and the luminous efficiency can be improved. Specifically, the thickness of the quantum barrier layer 520 is 7nm~9nm. More preferably, x=(2.3~2.8)y, the value range of z is 0.22~0.3, and the value range of w is 0.15~0.24.

[0060] Preferably, in one embodiment, B β Ga 1-β The N layer 620 is doped with Mg, and the doping concentration is 1×10 18 cm -3 ~1×10 19 cm -3 , which can serve as a hole source to provide some holes, thereby improving the luminescence efficiency.

[0061] Accordingly, see Figure 2 The present invention also provides a method for preparing an epitaxial structure for Micro-LED, which is used to prepare the above-mentioned epitaxial structure for Micro-LED, and specifically comprises the following steps:

[0062] S1: providing a substrate;

[0063] S2: sequentially growing a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer on the substrate;

[0064] Specifically, in some embodiments of the present invention, step S2 includes:

[0065] S21: growing a buffer layer on the substrate;

[0066] The buffer layer may be grown by PVD, MOCVD, MBE or VPE, but is not limited thereto.

[0067] Preferably, in one embodiment of the present invention, an AlN layer is grown by PVD as a buffer layer.

[0068] S22: growing a non-doped GaN layer on the buffer layer;

[0069] Specifically, in one embodiment of the present invention, the undoped GaN layer is grown by MOCVD, the growth temperature is 1000° C. to 1200° C., and the growth pressure is 100 torr to 500 torr.

[0070] S23: growing an N-type GaN layer on the non-doped GaN layer;

[0071] Specifically, in one embodiment of the present invention, MOCVD is used to grow the N-type GaN layer, the growth temperature is 1100° C. to 1200° C., and the growth pressure is 100 torr to 500 torr.

[0072] S24: growing a multi-quantum well layer on the N-type GaN layer;

[0073] Specifically, in one embodiment, quantum well layers and quantum barrier layers are periodically grown on an N-type GaN layer by MOCVD until a multi-quantum well layer is obtained.

[0074] Among them, the quantum well layer (In x Ga 1-x The growth temperature of the N layer is 730℃~800℃, and the growth pressure is 100torr~300torr.

[0075] Each quantum barrier layer includes In sequentially stacked on the quantum well layer. y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers. y Ga 1-y The growth temperature of the N layer is 820℃~950℃, and the growth pressure is 100torr~300torr; Al z Ga 1-z The growth temperature of the N layer is 920℃~1000℃, and the growth pressure is 100torr~300torr; B w Ga 1-w The growth temperature of the N layer is 950℃~1100℃, and the growth pressure is 100torr~300torr.

[0076] S25: growing a hole transport layer on the multi-quantum well layer;

[0077] Specifically, in one embodiment, Al is sequentially grown on the multi-quantum well layer by MOCVD. α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer, that is, the hole transport layer is obtained. α Ga 1-α The growth temperature of the N layer is 900℃~1000℃, and the growth pressure is 100torr~500torr; B β Ga 1-βThe growth temperature of the N layer is 900°C~1000°C, and the growth pressure is 100torr~500torr; the growth temperature of the AlN layer is 1000°C~1200°C, and the growth pressure is 100torr~500torr.

[0078] S26: growing a P-type GaN layer on the hole transport layer;

[0079] Specifically, in one embodiment of the present invention, MOCVD is used to grow the P-type GaN layer, the growth temperature is 950° C. to 1000° C., and the growth pressure is 100 torr to 300 torr.

[0080] The present invention will be further described below with specific embodiments:

[0081] Example 1

[0082] The present embodiment provides an epitaxial structure for Micro-LED, which includes a substrate, a buffer layer, an undoped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer stacked in sequence on the substrate.

[0083] The substrate is a sapphire substrate, the buffer layer is an AlN layer with a thickness of 50 nm, and the thickness of the undoped GaN layer is 1.5 μm. The Si doping concentration in the N-type GaN layer is 8.5×10 18 cm -3 , and its thickness is 3μm.

[0084] The multi-quantum well layer includes quantum well layers and quantum barrier layers that are alternately stacked, and the number of cycles is 10. The quantum well layer is In x Ga 1-x The N layer (x=0.22) has a thickness of 3nm. The quantum barrier layer includes In y Ga 1-y N layer (y=0.12), Al z Ga 1-z N layer (z=0.15) and B w Ga 1-w N layers (w=0.2); y Ga 1-y The thickness of the N layer is 3nm, and the Al z Ga 1-z The thickness of the N layer is 3.5nm, and the B w Ga 1-w The thickness of the N layer is 3 nm.

[0085] The hole transport layer includes Al2O3 layer stacked on the multi-quantum well layer. α Ga 1-α N layers (α=0.1), Bβ Ga 1-β N layer (β=0.05) and AlN layer; Al α Ga 1-α The thickness of the N layer is 8nm, and the B β Ga 1-β The thickness of the N layer is 12 nm, and the thickness of the AlN layer is 4 nm.

[0086] Among them, the Mg doping concentration in the P-type GaN layer is 8×10 19 cm -3 , and its thickness is 100nm.

[0087] The method for preparing the epitaxial structure of Micro-LED in this embodiment includes the following steps:

[0088] (1) Providing a substrate;

[0089] (2) growing a buffer layer on the substrate;

[0090] Specifically, an AlN layer is grown by PVD to serve as a buffer layer.

[0091] (3) growing a non-doped GaN layer on the buffer layer;

[0092] Specifically, the non-doped GaN layer is grown by MOCVD, with a growth temperature of 1100° C. and a growth pressure of 300 torr.

[0093] (4) growing an N-type GaN layer on the undoped GaN layer;

[0094] Specifically, MOCVD is used to grow the N-type GaN layer, with a growth temperature of 1150° C. and a growth pressure of 300 torr.

[0095] (5) Growing a multi-quantum well layer on the N-type GaN layer;

[0096] Specifically, quantum well layers and quantum barrier layers are alternately grown on the N-type GaN layer by MOCVD until a multi-quantum well layer is obtained. x Ga 1-x The growth temperature of the N layer is 760°C and the growth pressure is 200 torr.

[0097] Each quantum barrier layer includes In sequentially stacked on the quantum well layer. y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers. y Ga 1-yThe growth temperature of the N layer is 860°C and the growth pressure is 200 torr; the Al z Ga 1-z The growth temperature of the N layer is 960°C and the growth pressure is 200 torr; w Ga 1-w The growth temperature of the N layer is 1050°C and the growth pressure is 200 torr.

[0098] (6) growing a hole transport layer on the multi-quantum well layer;

[0099] Specifically, Al was grown sequentially by MOCVD. α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer, that is, the hole transport layer is obtained. α Ga 1-α The growth temperature of the N layer is 950°C and the growth pressure is 300 torr; β Ga 1-β The growth temperature of the N layer is 950°C and the growth pressure is 300 torr; the growth temperature of the AlN layer is 1100°C and the growth pressure is 300 torr.

[0100] (7) Growing a P-type GaN layer on the hole transport layer;

[0101] Specifically, P-type GaN is grown by MOCVD at a growth temperature of 980° C. and a growth pressure of 200 torr.

[0102] Example 2

[0103] This embodiment provides an epitaxial structure for Micro-LED, which is different from Embodiment 1 in that:

[0104] B β Ga 1-β The N layer is doped with Mg, and its doping concentration is 3×10 18 cm -3 .

[0105] The rest are the same as in Example 1.

[0106] Example 3

[0107] This embodiment provides an epitaxial structure for Micro-LED, which differs from Embodiment 2 in that:

[0108] The quantum barrier layer includes sequentially stacked In y Ga 1-y N layer (y=0.1), Al z Ga 1-zN layer (z=0.21) and B w Ga 1-w N layers (w=0.25); y Ga 1-y The thickness of the N layer is 3nm, and the Al z Ga 1-z The thickness of the N layer is 3nm, and the B w Ga 1-w The thickness of the N layer is 3 nm.

[0109] The rest is the same as Example 2.

[0110] Example 4

[0111] This embodiment provides an epitaxial structure for Micro-LED, which is different from Embodiment 3 in that:

[0112] The quantum barrier layer includes sequentially stacked In y Ga 1-y N layer (y=0.08), Al z Ga 1-z N layer (z=0.25) and B w Ga 1-w N layers (w=0.18); In y Ga 1-y The thickness of the N layer is 3nm, and the Al z Ga 1-z The thickness of the N layer is 2.5 nm, and the B w Ga 1-w The thickness of the N layer is 2 nm.

[0113] The rest is the same as Example 3.

[0114] Comparative Example 1

[0115] This comparative example provides an epitaxial structure, which differs from Example 1 in that:

[0116] The quantum barrier layer is a GaN layer with a thickness of 12 nm, a growth temperature of 880° C., and a growth pressure of 200 torr.

[0117] The hole input layer is replaced by an electron blocking layer, and the electron blocking layer is Al 0.4 Ga 0.6 N layer, with a thickness of 30nm; its growth temperature is 1120℃ and the growth pressure is 300torr.

[0118] Comparative Example 2

[0119] This comparative example provides an epitaxial structure, which differs from comparative example 1 in that:

[0120] No electron blocking layer is included.

[0121] The rest are the same as Comparative Example 1.

[0122] Comparative Example 3

[0123] This comparative example provides an epitaxial structure, which differs from Example 1 in that:

[0124] The quantum barrier layer is a GaN layer with a thickness of 12 nm, a growth temperature of 880° C., and a growth pressure of 200 torr.

[0125] The rest are the same as in Example 1.

[0126] Comparative Example 4

[0127] This comparative example provides an epitaxial structure, which differs from Example 1 in that:

[0128] The hole input layer is replaced by an electron blocking layer, and the electron blocking layer is Al 0.4 Ga 0.6 N layer, with a thickness of 30nm; its growth temperature is 1120℃ and the growth pressure is 300torr.

[0129] The rest are the same as in Example 1.

[0130] Comparative Example 5

[0131] This comparative example provides an epitaxial structure, which differs from Example 1 in that:

[0132] The hole transport layer is not included, and accordingly, the preparation method does not include the step of preparing the layer.

[0133] The rest are the same as in Example 1.

[0134] The epitaxial structures obtained in Examples 1 to 4 and Comparative Examples 1 to 5 were prepared into Micro-LEDs with a size of 50 μm×50 μm and a horizontal structure, and the 2 , 1A / cm 2 The luminous power was tested at a current density of , and the luminous power improvement rate was calculated based on the data of comparative example 1. The specific results are shown in the following table:

[0135]

[0136] It can be seen from the table that when the epitaxial structure of the present invention is used, the luminous efficiency of Micro-LED at low current density can be greatly improved. By comparing Example 1 with Comparative Examples 3 to 5, it can be clearly seen that the quantum barrier layer and the hole transport layer of the present invention have a synergistic effect.

[0137] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. An epitaxial structure for Micro-LED, characterized in that: It includes a substrate, a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer stacked in sequence on the substrate; The multi-quantum well layer includes alternately stacked quantum well layers and quantum barrier layers, and the number of cycles is 3 to 10; the quantum well layer is In x Ga 1-x N layers, the quantum barrier layer includes In y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layer; the thickness of the quantum barrier layer is less than 10nm; the In x Ga 1-x The thickness of the N layer is 2nm~3.5nm, and the value range of x is 0.18~0.3; y Ga 1-y The thickness of the N layer is 2nm~4nm, and the value range of y is 0.05~0.13; z Ga 1-z The thickness of the N layer is 2nm~5nm, and the value range of z is 0.1~0.3; w Ga 1-w The thickness of the N layer is 1nm~4nm, and the value of w ranges from 0.1 to 0.3; The hole transport layer includes Al α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer; w>α>β; the Al α Ga 1-α The thickness of the N layer is 5nm~10nm, the value range of α is 0.08~0.2, and the B β Ga 1-β The thickness of the N layer is 5nm-15nm, the value range of β is 0.02-0.1, and the thickness of the AlN layer is 2nm-5nm.

2. The epitaxial structure for Micro-LED according to claim 1, characterized in that: x>2y, z>0.2, w>0.15, and the thickness of the quantum barrier layer is 7nm~9nm.

3. The epitaxial structure for Micro-LED according to claim 1, characterized in that: B β Ga 1-β The N layer is doped with Mg, and its doping concentration is 1×10 18 cm -3 ~1×10 19 cm -3 .

4. A method for preparing an epitaxial structure for a Micro-LED, for preparing the epitaxial structure of a Micro-LED as claimed in any one of claims 1 to 3, characterized in that: include: Providing a substrate, and sequentially growing a buffer layer, a non-doped GaN layer, an N-type GaN layer, a multi-quantum well layer, a hole transport layer and a P-type GaN layer on the substrate; The multi-quantum well layer includes quantum well layers and quantum barrier layers stacked alternately; the quantum well layer is In x Ga 1-x N layers, the quantum barrier layer includes In y Ga 1-y N layer, Al z Ga 1-z N layer and B w Ga 1-w N layers; x>y; the thickness of the quantum barrier layer is less than 10 nm; The hole transport layer includes Al α Ga 1-α N layer, B β Ga 1-β N layer and AlN layer; w>α>β.

5. The method for preparing an epitaxial structure for Micro-LED according to claim 4, characterized in that: In x Ga 1-x The growth temperature of the N layer is 730°C to 800°C, and the growth pressure is 100 torr to 300 torr; and / or In y Ga 1-y The growth temperature of the N layer is 820°C to 950°C and the growth pressure is 100 torr to 300 torr; and / or The Al z Ga 1-z The growth temperature of the N layer is 920°C to 1000°C, and the growth pressure is 100 torr to 300 torr; and / or B w Ga 1-w The growth temperature of the N layer is 950℃~1100℃, and the growth pressure is 100torr~300torr.

6. The method for preparing an epitaxial structure for Micro-LED according to claim 4, characterized in that: The Al α Ga 1-α The growth temperature of the N layer is 900°C to 1000°C, and the growth pressure is 100 torr to 500 torr; and / or B β Ga 1-β The growth temperature of the N layer is 900°C to 1000°C, and the growth pressure is 100 torr to 500 torr; and / or The growth temperature of the AlN layer is 1000° C. to 1200° C., and the growth pressure is 100 torr to 500 torr.

7. A Micro-LED, characterized in that: It comprises the epitaxial structure for Micro-LED as described in any one of claims 1 to 3.

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