Vertical cavity surface emitting laser and preparation method thereof
By designing a vertical cavity surface emitting laser in the VCSEL array chip, connecting the VCSEL light emitting unit using the isolation layer and the electrode connection layer, adjusting the position and spacing of the electrode wiring area, the problem of luminescence inequality of the VCSEL array chip is solved, and a more uniform Laser output and higher stability.
Patent Information
- Application Number
- CN202411211778.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2024-12-06
AI Technical Summary
The near-field luminescence uniformity of existing VCSEL array chips is affected by the device thermal inhomogeneity and electrical injection inhomogeneity, resulting in luminescence inhomogeneity. When trying to adjust the luminescence aperture to achieve uniformity, the threshold value increases and the luminescence power decreases. Can't be effectively resolved.
A vertical cavity surface emitting laser is designed to achieve current uniformity and luminous uniformity by stacking independent VCSEL light emitting units on the substrate layer and connecting adjacent VCSEL light emitting units through isolation layer and electrode connection layer. , and by adjusting the VCSEL light emitting unit spacing and electrode wiring area position, the luminescence uniformity of the laser is optimized.
The luminescence uniformity of the VCSEL array chip is achieved, the luminescence energy difference is reduced, and the stability and reliability of the device are improved through the protective layer, making the process simple and convenient.
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Figure CN119093158A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of light emitting diodes, and in particular to a vertical cavity surface emitting laser and a preparation method thereof. Background Art
[0002] Vertical cavity surface emitting laser is a kind of semiconductor microcavity laser. Compared with traditional edge emitting lasers, vertical cavity surface emitting lasers have the advantages of low threshold current, small size, circularly symmetric spot easy fiber coupling, high beam quality, single longitudinal mode, and surface emission easy integration. As a result, it has been rapidly developed in recent years and is widely used in three-dimensional sensing, optical communication, lidar, unmanned driving and other fields such as face recognition.
[0003] In order to improve the light output density of VCSEL chips, it is necessary to produce VCSELs with an array structure; currently, when designing VCSEL array chips, multiple VCSEL elements with the same light-emitting point aperture size and consistent center distance are usually arranged in an array. However, for VCSEL array chips formed in this way, the near-field light emission uniformity of the VCSEL array is affected by the thermal non-uniformity of the device and the non-uniformity of electrical injection, resulting in most conventional VCSEL arrays being unable to achieve their near-field light emission uniformity. In order to improve the light emission uniformity of the VCSEL array, a variety of methods have been used, such as fine-tuning the epitaxial structure (to reduce thermal sensitivity) and thickening the metal layer (to remove excess heat) to alleviate the problem, but these methods cannot achieve good results, and are difficult to implement and costly.
[0004] Of course, there is also a method of adjusting the resistance of the VCSEL element by adjusting the light-emitting aperture of each VCSEL element, thereby achieving the uniformity of the injected current in the VCSEL array chip, thereby achieving the uniformity of the light emission of the VCSEL array chip (specifically: setting the light-emitting point aperture of the VCSEL element in the middle area of the VCSEL array chip to be larger than the light-emitting point aperture of the VCSEL element in the edge area, that is, reducing the resistance of the middle area and increasing the resistance of the edge area, so that the two tend to balance, thereby achieving the uniformity of the near-field light emission of the VCSEL array chip). However, when the light-emitting point aperture of the VCSEL element in the middle area is larger than the light-emitting point aperture of the VCSEL element in the edge area, the light-emitting point aperture in the middle area increases, the threshold increases, the voltage decreases, and the light-emitting power decreases, which will only aggravate the current VCSEL array near-field light emission non-uniformity; at the same time, due to the increase in the light-emitting point aperture of the VCSEL element in the central area, the current injected into the light-emitting point per unit area is reduced, the pump source excitation is reduced, the resonant cavity gain is reduced, the number of stimulated radiation particles is reduced, and the final radiated laser energy is reduced.
[0005] In view of this, the inventor specially designed a vertical cavity surface emitting laser and a preparation method thereof, which resulted in this case. Summary of the invention
[0006] The object of the present invention is to provide a vertical cavity surface emitting laser and a method for preparing the same, so as to solve the problem of light emission uniformity of a VCSEL with an array structure.
[0007] In order to achieve the above object, the technical solution adopted by the present invention is as follows:
[0008] A vertical cavity surface emitting laser, comprising:
[0009] Back electrode layer;
[0010] A plurality of independent VCSEL light-emitting units are stacked on one side surface of the back electrode layer through a substrate; wherein the aperture of the light-emitting holes of each VCSEL light-emitting unit is consistent;
[0011] an isolation layer, which covers each of the VCSEL light-emitting units and has a through hole, wherein the through hole at least exposes a portion of the peripheral area of the light-emitting hole of each of the VCSEL light-emitting units;
[0012] The electrode connection layer connects two adjacent VCSEL light-emitting units through the surface of the isolation layer by embedding the through hole, and an electrode wiring area for external electrical connection is preset on the surface of the electrode connection layer.
[0013] Preferably, the distance between two adjacent VCSEL light emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light emitting units and the electrode bonding area decreases.
[0014] Preferably, the electrode bonding area is arranged at an edge of the vertical cavity surface emitting laser.
[0015] Preferably, the electrode bonding area is arranged in a ring shape at the edge of the vertical cavity surface emitting laser.
[0016] Preferably, along the extension direction from the center to the edge of the vertical cavity surface emitting laser, the distance between two adjacent VCSEL light emitting units gradually decreases.
[0017] Preferably, each of the VCSEL light-emitting units comprises: a first-type DBR layer, an active layer, an oxidation restriction layer and a second-type DBR layer sequentially stacked along a first direction, and the VCSEL light-emitting unit forms an oxidation hole through the oxidation restriction layer.
[0018] Preferably, the oxidation limiting layer forms a current limiting region and a conductive region by selectively oxidizing a semiconductor compound, so as to obtain the oxidation limiting layer having the oxidation holes.
[0019] Preferably, a protective layer is provided on the surface of the electrode connection layer except the electrode wiring area.
[0020] Preferably, the through hole may also expose the light exit hole.
[0021] A method for preparing a vertical cavity surface emitting laser, the method comprising the following steps:
[0022] S01, providing a substrate;
[0023] S02, sequentially growing a first type DBR layer, an active layer, an oxidation restriction layer and a second type DBR layer on the surface of the substrate to obtain an epitaxial structure; wherein the oxidation restriction layer has a plurality of oxidation holes;
[0024] S03, forming a plurality of VCSEL light-emitting units isolated from each other by channels through the epitaxial structure through an etching process, wherein the apertures of the light-emitting holes of the VCSEL light-emitting units are consistent;
[0025] S04, manufacturing an isolation layer, which covers each of the VCSEL light-emitting units and has a through hole, wherein the through hole at least exposes a portion of the peripheral area of the light-emitting hole of each of the VCSEL light-emitting units;
[0026] S05, manufacturing an electrode connection layer, which connects two adjacent VCSEL light-emitting units through the surface of the isolation layer by embedding the through hole;
[0027] S06, manufacturing a back electrode layer, which is disposed on a surface of the substrate facing away from the VCSEL light-emitting unit;
[0028] S07, manufacturing a protection layer, which is disposed on the surface of the electrode connection layer and exposes a portion of the electrode connection layer so that it has an electrode wiring area for external electrical connection.
[0029] Preferably, the intervals between two adjacent VCSEL light emitting units are not completely the same.
[0030] Preferably, the electrode bonding area is arranged at the edge of the vertical cavity surface emitting laser, and the spacing between two adjacent VCSEL light emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light emitting units and the electrode bonding area decreases.
[0031] Preferably, the electrode bonding area is arranged in a ring shape at the edge of the vertical cavity surface emitting laser, and the distance between two adjacent VCSEL light-emitting units gradually decreases along the extension direction from the center to the edge of the vertical cavity surface emitting laser.
[0032] Through the above technical solution, it can be known that the vertical cavity surface emitting laser provided by the present invention includes: a back electrode layer; a plurality of independent VCSEL light-emitting units stacked on one side surface of the back electrode layer through a substrate; wherein the aperture of the light-emitting hole of each VCSEL light-emitting unit is consistent; an isolation layer, which covers each VCSEL light-emitting unit and has a through hole, and the through hole at least exposes a part of the peripheral area of the light-emitting hole of each VCSEL light-emitting unit; an electrode connection layer, which connects two adjacent VCSEL light-emitting units through the surface of the isolation layer by embedding the through hole, and an electrode wiring area for external electrical connection is preset on the surface of the electrode connection layer. Based on the application of the consistent aperture of the light-emitting hole of each VCSEL light-emitting unit, the two adjacent VCSEL light-emitting units are connected through the electrode connection layer, and an electrode wiring area for external electrical connection is preset on the surface of the electrode connection layer to achieve uniformity of light-emitting points and unified control of each VCSEL light-emitting unit.
[0033] Then, by setting the spacing between two adjacent VCSEL light-emitting units, the spacing decreases as the distance between the center of the corresponding two adjacent VCSEL light-emitting units and the electrode wiring area decreases. Based on this, the center spacing distance of the VCSEL light-emitting units adjacent to the electrode wiring area is made smaller, the injection current is larger, the heat generation is more, and the chip temperature is increased, so as to increase the radiation loss such as Auger recombination of the VCSEL light-emitting units adjacent to the electrode wiring area, thereby reducing the phenomenon of stimulated radiation energy being released in the form of light emission, thereby reducing the difference in luminous energy between the VCSEL light-emitting units adjacent to the electrode wiring area and those far away from the electrode wiring area, and achieving the uniformity of the light emission of the laser chip. At the same time, by setting the spacing between the two adjacent VCSEL light-emitting units to be not completely the same, the light-emitting area can be maximized to obtain more VCSEL light-emitting units without changing the size of the laser, and the near-field uniformity optimization of the VCSEL light-emitting unit array can be achieved.
[0034] Finally, by providing a protective layer on the surface of the electrode connection layer except the electrode wiring area, it helps to reduce the impact of the environment on the device surface (such as moisture-proofing and avoiding scratches, etc.) and avoid leakage current, thereby improving the stability and reliability of the device.
[0035] The present invention also provides a method for preparing a vertical cavity surface emitting laser, which, while achieving the beneficial effects of the above-mentioned laser, has a simple and convenient manufacturing process and is easy to produce. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.
[0037] Figure 1 A schematic diagram of the structure of a vertical cavity surface emitting laser provided in Example 1 of the present invention;
[0038] Figure 2 A top view of a vertical cavity surface emitting laser provided by an embodiment of the present invention;
[0039] Figure 3 A top view of a vertical cavity surface emitting laser provided by another embodiment of the present invention;
[0040] Figure 4 A top view of a vertical cavity surface emitting laser provided by another embodiment of the present invention;
[0041] Figure 5 A schematic diagram of the structure of an active layer provided by an embodiment of the present invention;
[0042] Figure 6 A schematic diagram of the structure of a tunnel junction provided by an embodiment of the present invention;
[0043] Figures 7 to 12 A schematic structural diagram corresponding to the steps of the method for preparing a vertical cavity surface emitting laser provided in Example 1 of the present invention;
[0044] Fig.13 A schematic diagram of the structure of a vertical cavity surface emitting laser provided in Example 2 of the present invention;
[0045] Explanation of symbols in the figure:
[0046] 1. Back electrode layer;
[0047] 2. Substrate;
[0048] 3. Type I DBR layer;
[0049] 4, active layer, 4a, well layer, 4b, barrier layer;
[0050] 5. Oxidation restriction layer;
[0051] 6. Type II DBR layer;
[0052] 7. Ohmic contact layer;
[0053] 8. Isolation layer;
[0054] 9. Electrode connection layer;
[0055] 10. Light hole;
[0056] 11. Electrode bonding area;
[0057] 12. Protective layer;
[0058] 13. High refractive index film;
[0059] 14. Low refractive index film;
[0060] 15. Through hole. DETAILED DESCRIPTION
[0061] To make the content of the present invention clearer, the content of the present invention is further described below in conjunction with the accompanying drawings. The present invention is not limited to this specific embodiment. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0062] Example 1
[0063] like Figure 1 As shown, a vertical cavity surface emitting laser comprises:
[0064] Back electrode layer 1;
[0065] A plurality of independent VCSEL light-emitting units are stacked on one side surface of the back electrode layer 1 through a substrate 2; wherein the apertures of the light-emitting holes 10 of the VCSEL light-emitting units are consistent;
[0066] An isolation layer 8, which covers each of the VCSEL light-emitting units and has a through hole 15, wherein the through hole 15 exposes at least a portion of the peripheral area of the light-emitting hole 10 of each of the VCSEL light-emitting units;
[0067] The electrode connection layer 9 connects two adjacent VCSEL light-emitting units through the surface of the isolation layer 8 by embedding the through hole 15 , and an electrode wiring area 11 for external electrical connection is preset on the surface of the electrode connection layer 9 .
[0068] It should be noted that the VCSEL light-emitting unit includes but is not limited to an arsenide-based VCSEL light-emitting structure, the isolation layer 8 may be made of silicon nitride or silicon oxide, the electrode connection layer 9 may be made of but is not limited to indium tin oxide, zinc tin oxide, indium zinc tin oxide, indium aluminum tin oxide, indium gallium tin oxide, aluminum zinc oxide, antimony tin oxide, gallium zinc oxide, IrOx, RuOx, indium, tin, aluminum, Au, platinum, zinc, silver, titanium, lead, nickel, rhodium, and molybdenum, any one or any combination thereof, and the back electrode layer 1 may be one of Au, In, Ni, Sn, Ag, and Cu or an alloy formed by at least two of them; this application is not limited thereto.
[0069] Further, based on the above-mentioned embodiment of the present invention, the spacing between two adjacent VCSEL light-emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light-emitting units and the electrode wiring area 11 decreases. Correspondingly, when the number of the electrode wiring area 11 is single, the spacing between two adjacent VCSEL light-emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light-emitting units and the electrode wiring area 11 (which can be understood as the shortest distance / vertical distance) decreases, such as Figure 2 As shown; when the number of the electrode wiring area 11 is multiple, the spacing between two adjacent VCSEL light-emitting units decreases as the distance between the center of the corresponding two adjacent VCSEL light-emitting units and the adjacent electrode wiring area 11 (which can be understood as the shortest distance) decreases; wherein, Figure 3 The diagram shows the case where the number of the electrode wiring areas 11 is 2. In the embodiments of the present application, the number can also be 3, 4, ..., as long as the spacing between two adjacent VCSEL light-emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light-emitting units and the adjacent electrode wiring areas decreases. This application will not elaborate on this.
[0070] Further, based on the above-mentioned embodiment of the present invention, the electrode bonding area 11 is arranged at the edge of the vertical cavity surface emitting laser. Specifically, the number of the electrode bonding area 11 can be single, which is arranged at any side edge of the vertical cavity surface emitting laser; the number of the electrode bonding area 11 can be multiple, such as 2 or 3 or 4, etc., which are respectively arranged at multiple side edges of the vertical cavity surface emitting laser, depending on the specific situation, and this application does not limit this.
[0071] Further, based on the above embodiments of the present invention, Figure 4 As shown, the electrode bonding area 11 is arranged in a ring shape at the edge of the vertical cavity surface emitting laser.
[0072] Further, based on the above-mentioned embodiment of the present invention, along the extension direction from the center to the edge of the vertical cavity surface emitting laser, the distance between two adjacent VCSEL light emitting units gradually decreases.
[0073] Further, based on the above embodiments of the present invention, each of the VCSEL light-emitting units includes: a first-type DBR layer 3, an active layer 4, an oxidation restriction layer 5 and a second-type DBR layer 6 stacked in sequence along a first direction, and the VCSEL light-emitting unit forms an oxidation hole through the oxidation restriction layer 5.
[0074] Furthermore, the first type DBR layer 3 includes an N type DBR layer, and the second type DBR layer 6 includes a P type DBR layer. Figure 5 As shown, the active layer 4 includes well layers 4a and barrier layers 4b which are alternately stacked.
[0075] It should be noted that the present embodiment does not limit the material composition of the substrate 2 and each of the VCSEL light-emitting units. For example, when the substrate 2 is a GaAs substrate 2, the active layer 4 includes an InGaAs / AlGaAs quantum well structure or an InGaAs / GaAsP quantum well structure; that is, in one embodiment of the present invention, the well layer 4a includes an InGaAs layer, and the barrier layer 4b includes an AlGaAs layer or GaAsP. In other embodiments of the present invention, the well layer 4a may include an InAlGaAs layer, and the barrier layer 4b may include an AlGaAsP barrier layer 4b, and the present invention does not limit this.
[0076] Specifically, Figure 6 As shown, the N-type DBR reflective layer and the P-type DBR reflective layer both include a high refractive index film 13 and a low refractive index film 14, and the high refractive index film 13 and the low refractive index film 14 are arranged alternately. Adjacent high refractive index films 13 and low refractive index films 14 constitute a period. It should be noted that the thickness of each film layer in the N-type DBR reflective layer and the P-type DBR reflective layer is 1 / 4n of the reflection center wavelength (n is the refractive index of the film layer material); at the same time, this embodiment does not limit the number of periods of the N-type DBR reflective layer and the P-type DBR reflective layer. For example, the N-type DBR reflective layer and the P-type DBR reflective layer can be arranged alternately in sequence (Al z Ga 1-z ) x In 1-x P / Al y Ga 1-y As film, wherein 0<x≤1, 0≤y<1, and the values of x and y can be different. In one embodiment, the N-type DBR reflective layer and the P-type DBR reflective layer can be arranged alternately in sequence (Al 0.4 Ga 0.6 )0.5 In 0.5 P / Al 0.5 Ga 0.5 As thin film, but the present invention is not limited to this.
[0077] Further, based on the above-mentioned embodiment of the present invention, the oxidation limiting layer 5 forms a current limiting region and a conductive region by selectively oxidizing the semiconductor compound to obtain the oxidation limiting layer 5 having the oxidation hole. This embodiment does not limit the oxidation layer. For example, in some embodiments, the material of the conductive region of the oxidation layer is aluminum gallium arsenide (AlGaAs); the material of the insulating region of the oxidation layer is aluminum oxide (Al2O3) or aluminum gallium oxide.
[0078] Furthermore, based on the above-mentioned embodiment of the present invention, a protective layer 12 is provided on the surface of the electrode connection layer 9 except the electrode wiring area 11. The protective layer 12 can be made of silicon nitride material or silicon oxide material, which is not limited in the present application.
[0079] The present invention also provides a method for preparing a vertical cavity surface emitting laser, the method comprising the following steps:
[0080] S01, such as Figure 7 As shown, a substrate 2 is provided;
[0081] Specifically, in one embodiment of the present application, the substrate 2 includes but is not limited to a GaAs substrate 2 .
[0082] S02, such as Figure 8 As shown, a first type DBR layer 3, an active layer 4, an oxidation restriction layer 5 and a second type DBR layer 6 are sequentially grown on the surface of the substrate 2 to obtain an epitaxial structure; wherein the oxidation restriction layer 5 has a plurality of oxidation holes;
[0083] Specifically, in one embodiment of the present application, the first type DBR layer 3 includes an N-type DBR layer, and the second type DBR layer 6 includes a P-type DBR layer. Figure 5 As shown, the active layer 4 includes well layers 4 a and barrier layers 4 b that are alternately stacked.
[0084] It should be noted that this embodiment does not limit the material composition of each VCSEL light-emitting unit. For example, when the substrate 2 is a GaAs substrate 2, the active layer 4 includes an InGaAs / AlGaAs quantum well structure or an InGaAs / GaAsP quantum well structure; that is, in one embodiment of the present invention, the well layer 4a includes an InGaAs layer, and the barrier layer 4b includes an AlGaAs layer or GaAsP. In other embodiments of the present invention, the well layer 4a may include an InAlGaAs layer, and the barrier layer 4b may include an AlGaAsP barrier layer 4b, and the present invention does not limit this.
[0085] Specifically, Figure 6 As shown, the N-type DBR reflective layer and the P-type DBR reflective layer both include a high refractive index film 13 and a low refractive index film 14, and the high refractive index film 13 and the low refractive index film 14 are arranged alternately. Adjacent high refractive index films 13 and low refractive index films 14 constitute a period. It should be noted that the thickness of each film layer in the N-type DBR reflective layer and the P-type DBR reflective layer is 1 / 4n of the reflection center wavelength (n is the refractive index of the film layer material); at the same time, this embodiment does not limit the number of periods of the N-type DBR reflective layer and the P-type DBR reflective layer. For example, the N-type DBR reflective layer and the P-type DBR reflective layer can be arranged alternately in sequence (Al z Ga 1-z ) x In 1-x P / Al y Ga 1-y As film, wherein 0<x≤1, 0≤y<1, and the values of x and y can be different. In one embodiment, the N-type DBR reflective layer and the P-type DBR reflective layer can be arranged alternately in sequence (Al 0.4 Ga 0.6 ) 0.5 In 0.5 P / Al 0.5 Ga 0.5 As thin film, but the present invention is not limited to this.
[0086] S03, such as Fig. 9 As shown, the epitaxial structure is formed into a plurality of VCSEL light-emitting units isolated from each other by channels through an etching process, wherein the aperture of the light-emitting holes of each VCSEL light-emitting unit is consistent;
[0087] Specifically, the isolation road can be manufactured by ICP dry etching, solution wet etching, or a combination of dry and wet etching processes, but the present application is not limited thereto.
[0088] S04, such as Fig.10As shown, an isolation layer 8 is manufactured, which covers each of the VCSEL light-emitting units and has a through hole 15, and the through hole 15 exposes a part of the peripheral area of the light-emitting hole 10 of each of the VCSEL light-emitting units;
[0089] Specifically, the through hole 15 can be formed by a photolithography process after the isolation layer 8 is deposited, and the through hole 15 exposes part of the peripheral area of the light exit hole 10 of each VCSEL light emitting unit. Further, in order to better achieve the anti-reflection of the VCSEL light emitting unit, the isolation layer 8 is also simultaneously provided on the surface of the light exit hole 10, so that it serves as an anti-reflection film, and the thickness of the isolation layer on the surface of the light exit hole 10 is λ / 2n, where λ is the light emission wavelength of the resonant cavity of the VCSEL light emitting unit. The isolation layer 8 can be made of silicon nitride material or silicon oxide material, but this application does not limit this.
[0090] S05, such as Fig.11 As shown, an electrode connection layer 9 is manufactured, which connects two adjacent VCSEL light-emitting units through the surface of the isolation layer 8 by embedding the through hole 15;
[0091] Specifically, the electrode connection layer 9 includes but is not limited to any one or any combination of indium tin oxide, zinc tin oxide, indium zinc tin oxide, indium aluminum tin oxide, indium gallium tin oxide, aluminum zinc oxide, antimony tin oxide, gallium zinc oxide, IrOx, RuOx, indium, tin, aluminum, Au, platinum, zinc, silver, titanium, lead, nickel, rhodium, and molybdenum.
[0092] S06, such as Fig.12 As shown, a back electrode layer 1 is manufactured and arranged on a surface of the substrate 2 which is away from the VCSEL light-emitting unit;
[0093] Specifically, the back electrode layer 1 may be one of Au, In, Ni, Sn, Ag, and Cu, or an alloy formed by at least two of them.
[0094] S07, making a protective layer 12, which is arranged on the surface of the electrode connection layer 9 and exposes a portion of the electrode connection layer 9 so that it has an electrode wiring area 11 for external electrical connection; see Figures 2 to 4 .
[0095] Specifically, the protective layer 12 may be made of silicon nitride material or silicon oxide material, which is not limited in the present application.
[0096] Furthermore, based on the above-mentioned embodiment of the present invention, the electrode bonding area 11 is arranged at the edge of the vertical cavity surface emitting laser, and the spacing between two adjacent VCSEL light-emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light-emitting units and the electrode bonding area 11 decreases.
[0097] Further, based on the above embodiment of the present invention, the electrode bonding area 11 is arranged in a ring shape at the edge of the vertical cavity surface emitting laser, and the distance between two adjacent VCSEL light-emitting units gradually decreases along the extension direction from the center to the edge of the vertical cavity surface emitting laser.
[0098] Through the above technical solutions, it can be known that the vertical cavity surface emitting laser provided by the present invention comprises: a back electrode layer 1; a plurality of independent VCSEL light-emitting units stacked on one side surface of the back electrode layer 1 through a substrate 2; wherein the aperture of the light-emitting hole 10 of each VCSEL light-emitting unit is consistent; an isolation layer 8, which covers each VCSEL light-emitting unit and has a through hole 15, and the through hole 15 exposes at least part of the peripheral area of the light-emitting hole 10 of each VCSEL light-emitting unit; an electrode connection layer 9, which connects two adjacent VCSEL light-emitting units through the surface of the isolation layer 8 by embedding the through hole 15, and an electrode wiring area 11 for external electrical connection is preset on the surface of the electrode connection layer 9. Based on the application of the consistent aperture of the light-emitting hole 10 of each VCSEL light-emitting unit, the two adjacent VCSEL light-emitting units are connected through the electrode connection layer 9, and an electrode wiring area 11 for external electrical connection is preset on the surface of the electrode connection layer 9, so as to achieve uniformity of light-emitting points and unified control of each VCSEL light-emitting unit. Furthermore, the electrode connection layer 9 connects two adjacent VCSEL light-emitting units by being embedded in the through hole 15 located in the peripheral area of the light-emitting hole 10. Based on this, the electrode connection layer has a larger setting space on the surface of the VCSEL light-emitting unit, which can better realize the functions of current expansion and ohmic contact, so that the steps of evaporating and photolithography of the ohmic contact layer can be omitted.
[0099] Then, by setting the spacing between two adjacent VCSEL light-emitting units, the spacing decreases as the distance between the center of the corresponding two adjacent VCSEL light-emitting units and the electrode wiring area 11 decreases. Based on this, the center spacing distance of the VCSEL light-emitting units adjacent to the electrode wiring area 11 is made smaller, the injection current is larger, the heat generation is more, and the chip temperature is increased, so as to increase the radiation loss such as Auger recombination of the VCSEL light-emitting units adjacent to the electrode wiring area 11, thereby reducing the phenomenon of stimulated radiation energy being released in the form of light emission, thereby reducing the difference in luminous energy between the VCSEL light-emitting units adjacent to the electrode wiring area 11 and those far away from the electrode wiring area 11, and achieving the uniformity of the light emission of the laser chip. At the same time, by setting the spacing between the two adjacent VCSEL light-emitting units to be not completely the same, the light-emitting area can be maximized to obtain more VCSEL light-emitting units without changing the size of the laser, and the near-field uniformity optimization of the VCSEL light-emitting unit array can be achieved.
[0100] Finally, by providing a protective layer 12 on the surface of the electrode connection layer 9 except the electrode wiring area 11, it helps to reduce the impact of the environment on the device surface (such as moisture-proof and scratch-avoiding, etc.) and avoid leakage current, thereby improving the stability and reliability of the device.
[0101] The present invention also provides a method for preparing a vertical cavity surface emitting laser, which, while achieving the beneficial effects of the above-mentioned laser, has a simple and convenient manufacturing process and is easy to produce.
[0102] Example 2
[0103] The only difference between this embodiment and embodiment 1 is that, in this embodiment, Fig.13 As shown, the isolation layer 8 covers each of the VCSEL light-emitting units and has a through hole 15, and the through hole 15 exposes the light-emitting hole 10 of each of the VCSEL light-emitting units and part of the peripheral area thereof. Based on this, the electrode connection layer has a relatively limited setting space on the surface of the VCSEL light-emitting unit. Therefore, in this embodiment, it is necessary to set an ohmic contact layer 7 on the surface of the second-type DBR layer 6 to further achieve the function of current expansion and ohmic contact.
[0104] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0105] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that an article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such article or device. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the article or device including the above elements.
[0106] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A vertical cavity surface emitting laser, It is characterized in that include: Back electrode layer; A plurality of independent VCSEL light-emitting units are stacked on one side surface of the back electrode layer through a substrate; wherein the aperture of the light-emitting holes of each VCSEL light-emitting unit is consistent; an isolation layer, which covers each of the VCSEL light-emitting units and has a through hole, wherein the through hole at least exposes a portion of the peripheral area of the light-emitting hole of each of the VCSEL light-emitting units; The electrode connection layer connects two adjacent VCSEL light-emitting units through the surface of the isolation layer by embedding the through hole, and an electrode wiring area for external electrical connection is preset on the surface of the electrode connection layer.
2. The vertical cavity surface emitting laser according to claim 1, It is characterized in that The distance between two adjacent VCSEL light emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light emitting units and the electrode wiring area decreases.
3. The vertical cavity surface emitting laser according to claim 1, It is characterized in that The electrode bonding area is arranged at the edge of the vertical cavity surface emitting laser.
4. The vertical cavity surface emitting laser according to claim 3, It is characterized in that The electrode bonding area is arranged in a ring shape at the edge of the vertical cavity surface emitting laser.
5. The vertical cavity surface emitting laser according to claim 4, It is characterized in that Along the extension direction from the center to the edge of the vertical cavity surface emitting laser, the distance between two adjacent VCSEL light emitting units gradually decreases.
6. The vertical cavity surface emitting laser according to claim 1, It is characterized in that Each of the VCSEL light-emitting units comprises: a first-type DBR layer, an active layer, an oxidation restriction layer and a second-type DBR layer which are sequentially stacked along a first direction, and the VCSEL light-emitting unit forms an oxidation hole through the oxidation restriction layer.
7. The vertical cavity surface emitting laser according to claim 1, It is characterized in that A protective layer is also provided on the surface of the electrode connection layer except the electrode wiring area.
8. The vertical cavity surface emitting laser according to claim 1, It is characterized in that The through hole may also expose the light exit hole.
9. A method for preparing a vertical cavity surface emitting laser, It is characterized in that The preparation method comprises the following steps: S01, providing a substrate; S02, sequentially growing a first type DBR layer, an active layer, an oxidation restriction layer and a second type DBR layer on the surface of the substrate to obtain an epitaxial structure; wherein the oxidation restriction layer has a plurality of oxidation holes; S03, forming a plurality of VCSEL light-emitting units isolated from each other by channels through the epitaxial structure through an etching process, wherein the apertures of the light-emitting holes of the VCSEL light-emitting units are consistent; S04, manufacturing an isolation layer, which covers each of the VCSEL light-emitting units and has a through hole, wherein the through hole at least exposes a portion of the peripheral area of the light-emitting hole of each of the VCSEL light-emitting units; S05, manufacturing an electrode connection layer, which connects two adjacent VCSEL light-emitting units through the surface of the isolation layer by embedding the through hole; S06, manufacturing a back electrode layer, which is disposed on a surface of the substrate facing away from the VCSEL light-emitting unit; S07, manufacturing a protection layer, which is disposed on the surface of the electrode connection layer and exposes a portion of the electrode connection layer so that it has an electrode wiring area for external electrical connection.
10. The method for preparing a vertical cavity surface emitting laser according to claim 9, It is characterized in that The distances between two adjacent VCSEL light-emitting units are not completely the same.
11. The method for preparing a vertical cavity surface emitting laser according to claim 9, It is characterized in that The electrode bonding area is arranged at the edge of the vertical cavity surface emitting laser, and the spacing between two adjacent VCSEL light emitting units decreases as the distance between the centers of the corresponding two adjacent VCSEL light emitting units and the electrode bonding area decreases.
12. The method for preparing a vertical cavity surface emitting laser according to claim 9, It is characterized in that The electrode bonding area is arranged in a ring shape at the edge of the vertical cavity surface emitting laser, and the distance between two adjacent VCSEL light-emitting units gradually decreases along the extension direction from the center to the edge of the vertical cavity surface emitting laser.
Citation Information
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